WIP FPC-III support
[linux/fpc-iii.git] / drivers / reset / tegra / reset-bpmp.c
blob24d3395964cc4ba2d3934a32299fef3f667cd45f
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2016 NVIDIA Corporation
4 */
6 #include <linux/reset-controller.h>
8 #include <soc/tegra/bpmp.h>
9 #include <soc/tegra/bpmp-abi.h>
11 static struct tegra_bpmp *to_tegra_bpmp(struct reset_controller_dev *rstc)
13 return container_of(rstc, struct tegra_bpmp, rstc);
16 static int tegra_bpmp_reset_common(struct reset_controller_dev *rstc,
17 enum mrq_reset_commands command,
18 unsigned int id)
20 struct tegra_bpmp *bpmp = to_tegra_bpmp(rstc);
21 struct mrq_reset_request request;
22 struct tegra_bpmp_message msg;
24 memset(&request, 0, sizeof(request));
25 request.cmd = command;
26 request.reset_id = id;
28 memset(&msg, 0, sizeof(msg));
29 msg.mrq = MRQ_RESET;
30 msg.tx.data = &request;
31 msg.tx.size = sizeof(request);
33 return tegra_bpmp_transfer(bpmp, &msg);
36 static int tegra_bpmp_reset_module(struct reset_controller_dev *rstc,
37 unsigned long id)
39 return tegra_bpmp_reset_common(rstc, CMD_RESET_MODULE, id);
42 static int tegra_bpmp_reset_assert(struct reset_controller_dev *rstc,
43 unsigned long id)
45 return tegra_bpmp_reset_common(rstc, CMD_RESET_ASSERT, id);
48 static int tegra_bpmp_reset_deassert(struct reset_controller_dev *rstc,
49 unsigned long id)
51 return tegra_bpmp_reset_common(rstc, CMD_RESET_DEASSERT, id);
54 static const struct reset_control_ops tegra_bpmp_reset_ops = {
55 .reset = tegra_bpmp_reset_module,
56 .assert = tegra_bpmp_reset_assert,
57 .deassert = tegra_bpmp_reset_deassert,
60 int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp)
62 bpmp->rstc.ops = &tegra_bpmp_reset_ops;
63 bpmp->rstc.owner = THIS_MODULE;
64 bpmp->rstc.of_node = bpmp->dev->of_node;
65 bpmp->rstc.nr_resets = bpmp->soc->num_resets;
67 return devm_reset_controller_register(bpmp->dev, &bpmp->rstc);