WIP FPC-III support
[linux/fpc-iii.git] / drivers / scsi / arm / fas216.h
blob847413ce14cf68a1dda048e0dd2b7c3a8c78f985
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * linux/drivers/acorn/scsi/fas216.h
5 * Copyright (C) 1997-2000 Russell King
7 * FAS216 generic driver
8 */
9 #ifndef FAS216_H
10 #define FAS216_H
12 #include <scsi/scsi_eh.h>
14 #include "queue.h"
15 #include "msgqueue.h"
17 /* FAS register definitions */
19 /* transfer count low */
20 #define REG_CTCL (0)
21 #define REG_STCL (0)
23 /* transfer count medium */
24 #define REG_CTCM (1)
25 #define REG_STCM (1)
27 /* fifo data */
28 #define REG_FF (2)
30 /* command */
31 #define REG_CMD (3)
32 #define CMD_NOP 0x00
33 #define CMD_FLUSHFIFO 0x01
34 #define CMD_RESETCHIP 0x02
35 #define CMD_RESETSCSI 0x03
37 #define CMD_TRANSFERINFO 0x10
38 #define CMD_INITCMDCOMPLETE 0x11
39 #define CMD_MSGACCEPTED 0x12
40 #define CMD_PADBYTES 0x18
41 #define CMD_SETATN 0x1a
42 #define CMD_RSETATN 0x1b
44 #define CMD_SELECTWOATN 0x41
45 #define CMD_SELECTATN 0x42
46 #define CMD_SELECTATNSTOP 0x43
47 #define CMD_ENABLESEL 0x44
48 #define CMD_DISABLESEL 0x45
49 #define CMD_SELECTATN3 0x46
50 #define CMD_RESEL3 0x47
52 #define CMD_WITHDMA 0x80
54 /* status register (read) */
55 #define REG_STAT (4)
56 #define STAT_IO (1 << 0) /* IO phase */
57 #define STAT_CD (1 << 1) /* CD phase */
58 #define STAT_MSG (1 << 2) /* MSG phase */
59 #define STAT_TRANSFERDONE (1 << 3) /* Transfer completed */
60 #define STAT_TRANSFERCNTZ (1 << 4) /* Transfer counter is zero */
61 #define STAT_PARITYERROR (1 << 5) /* Parity error */
62 #define STAT_REALBAD (1 << 6) /* Something bad */
63 #define STAT_INT (1 << 7) /* Interrupt */
65 #define STAT_BUSMASK (STAT_MSG|STAT_CD|STAT_IO)
66 #define STAT_DATAOUT (0) /* Data out */
67 #define STAT_DATAIN (STAT_IO) /* Data in */
68 #define STAT_COMMAND (STAT_CD) /* Command out */
69 #define STAT_STATUS (STAT_CD|STAT_IO) /* Status In */
70 #define STAT_MESGOUT (STAT_MSG|STAT_CD) /* Message out */
71 #define STAT_MESGIN (STAT_MSG|STAT_CD|STAT_IO) /* Message In */
73 /* bus ID for select / reselect */
74 #define REG_SDID (4)
75 #define BUSID(target) ((target) & 7)
77 /* Interrupt status register (read) */
78 #define REG_INST (5)
79 #define INST_SELWOATN (1 << 0) /* Select w/o ATN */
80 #define INST_SELATN (1 << 1) /* Select w/ATN */
81 #define INST_RESELECTED (1 << 2) /* Reselected */
82 #define INST_FUNCDONE (1 << 3) /* Function done */
83 #define INST_BUSSERVICE (1 << 4) /* Bus service */
84 #define INST_DISCONNECT (1 << 5) /* Disconnect */
85 #define INST_ILLEGALCMD (1 << 6) /* Illegal command */
86 #define INST_BUSRESET (1 << 7) /* SCSI Bus reset */
88 /* Timeout register (write) */
89 #define REG_STIM (5)
91 /* Sequence step register (read) */
92 #define REG_IS (6)
93 #define IS_BITS 0x07
94 #define IS_SELARB 0x00 /* Select & Arb ok */
95 #define IS_MSGBYTESENT 0x01 /* One byte message sent*/
96 #define IS_NOTCOMMAND 0x02 /* Not in command state */
97 #define IS_EARLYPHASE 0x03 /* Early phase change */
98 #define IS_COMPLETE 0x04 /* Command ok */
99 #define IS_SOF 0x08 /* Sync off flag */
101 /* Transfer period step (write) */
102 #define REG_STP (6)
104 /* Synchronous Offset (write) */
105 #define REG_SOF (7)
107 /* Fifo state register (read) */
108 #define REG_CFIS (7)
109 #define CFIS_CF 0x1f /* Num bytes in FIFO */
110 #define CFIS_IS 0xe0 /* Step */
112 /* config register 1 */
113 #define REG_CNTL1 (8)
114 #define CNTL1_CID (7 << 0) /* Chip ID */
115 #define CNTL1_STE (1 << 3) /* Self test enable */
116 #define CNTL1_PERE (1 << 4) /* Parity enable reporting en. */
117 #define CNTL1_PTE (1 << 5) /* Parity test enable */
118 #define CNTL1_DISR (1 << 6) /* Disable Irq on SCSI reset */
119 #define CNTL1_ETM (1 << 7) /* Extended Timing Mode */
121 /* Clock conversion factor (read) */
122 #define REG_CLKF (9)
123 #define CLKF_F37MHZ 0x00 /* 35.01 - 40 MHz */
124 #define CLKF_F10MHZ 0x02 /* 10 MHz */
125 #define CLKF_F12MHZ 0x03 /* 10.01 - 15 MHz */
126 #define CLKF_F17MHZ 0x04 /* 15.01 - 20 MHz */
127 #define CLKF_F22MHZ 0x05 /* 20.01 - 25 MHz */
128 #define CLKF_F27MHZ 0x06 /* 25.01 - 30 MHz */
129 #define CLKF_F32MHZ 0x07 /* 30.01 - 35 MHz */
131 /* Chip test register (write) */
132 #define REG_FTM (10)
133 #define TEST_FTM 0x01 /* Force target mode */
134 #define TEST_FIM 0x02 /* Force initiator mode */
135 #define TEST_FHI 0x04 /* Force high impedance mode */
137 /* Configuration register 2 (read/write) */
138 #define REG_CNTL2 (11)
139 #define CNTL2_PGDP (1 << 0) /* Pass Th/Generate Data Parity */
140 #define CNTL2_PGRP (1 << 1) /* Pass Th/Generate Reg Parity */
141 #define CNTL2_ACDPE (1 << 2) /* Abort on Cmd/Data Parity Err */
142 #define CNTL2_S2FE (1 << 3) /* SCSI2 Features Enable */
143 #define CNTL2_TSDR (1 << 4) /* Tristate DREQ */
144 #define CNTL2_SBO (1 << 5) /* Select Byte Order */
145 #define CNTL2_ENF (1 << 6) /* Enable features */
146 #define CNTL2_DAE (1 << 7) /* Data Alignment Enable */
148 /* Configuration register 3 (read/write) */
149 #define REG_CNTL3 (12)
150 #define CNTL3_BS8 (1 << 0) /* Burst size 8 */
151 #define CNTL3_MDM (1 << 1) /* Modify DMA mode */
152 #define CNTL3_LBTM (1 << 2) /* Last Byte Transfer mode */
153 #define CNTL3_FASTCLK (1 << 3) /* Fast SCSI clocking */
154 #define CNTL3_FASTSCSI (1 << 4) /* Fast SCSI */
155 #define CNTL3_G2CB (1 << 5) /* Group2 SCSI support */
156 #define CNTL3_QTAG (1 << 6) /* Enable 3 byte msgs */
157 #define CNTL3_ADIDCHK (1 << 7) /* Additional ID check */
159 /* High transfer count (read/write) */
160 #define REG_CTCH (14)
161 #define REG_STCH (14)
163 /* ID register (read only) */
164 #define REG_ID (14)
166 /* Data alignment */
167 #define REG_DAL (15)
169 typedef enum {
170 PHASE_IDLE, /* we're not planning on doing anything */
171 PHASE_SELECTION, /* selecting a device */
172 PHASE_SELSTEPS, /* selection with command steps */
173 PHASE_COMMAND, /* command sent */
174 PHASE_MESSAGESENT, /* selected, and we're sending cmd */
175 PHASE_DATAOUT, /* data out to device */
176 PHASE_DATAIN, /* data in from device */
177 PHASE_MSGIN, /* message in from device */
178 PHASE_MSGIN_DISCONNECT, /* disconnecting from bus */
179 PHASE_MSGOUT, /* after message out phase */
180 PHASE_MSGOUT_EXPECT, /* expecting message out */
181 PHASE_STATUS, /* status from device */
182 PHASE_DONE /* Command complete */
183 } phase_t;
185 typedef enum {
186 DMA_OUT, /* DMA from memory to chip */
187 DMA_IN /* DMA from chip to memory */
188 } fasdmadir_t;
190 typedef enum {
191 fasdma_none, /* No dma */
192 fasdma_pio, /* PIO mode */
193 fasdma_pseudo, /* Pseudo DMA */
194 fasdma_real_block, /* Real DMA, on block by block basis */
195 fasdma_real_all /* Real DMA, on request by request */
196 } fasdmatype_t;
198 typedef enum {
199 neg_wait, /* Negotiate with device */
200 neg_inprogress, /* Negotiation sent */
201 neg_complete, /* Negotiation complete */
202 neg_targcomplete, /* Target completed negotiation */
203 neg_invalid /* Negotiation not supported */
204 } neg_t;
206 #define MAGIC 0x441296bdUL
207 #define NR_MSGS 8
209 #define FASCAP_DMA (1 << 0)
210 #define FASCAP_PSEUDODMA (1 << 1)
212 typedef struct {
213 unsigned long magic_start;
214 spinlock_t host_lock;
215 struct Scsi_Host *host; /* host */
216 struct scsi_cmnd *SCpnt; /* currently processing command */
217 struct scsi_cmnd *origSCpnt; /* original connecting command */
218 struct scsi_cmnd *reqSCpnt; /* request sense command */
219 struct scsi_cmnd *rstSCpnt; /* reset command */
220 struct scsi_cmnd *pending_SCpnt[8]; /* per-device pending commands */
221 int next_pending; /* next pending device */
224 * Error recovery
226 wait_queue_head_t eh_wait;
227 struct timer_list eh_timer;
228 unsigned int rst_dev_status;
229 unsigned int rst_bus_status;
231 /* driver information */
232 struct {
233 phase_t phase; /* current phase */
234 void __iomem *io_base; /* iomem base of FAS216 */
235 unsigned int io_shift; /* shift to adjust reg offsets by */
236 unsigned char cfg[4]; /* configuration registers */
237 const char *type; /* chip type */
238 unsigned int irq; /* interrupt */
239 int dma; /* dma channel */
241 struct scsi_pointer SCp; /* current commands data pointer */
243 MsgQueue_t msgs; /* message queue for connected device */
245 unsigned int async_stp; /* Async transfer STP value */
246 unsigned char msgin_fifo; /* bytes in fifo at time of message in */
247 unsigned char message[256]; /* last message received from device */
249 unsigned char disconnectable:1; /* this command can be disconnected */
250 unsigned char aborting:1; /* aborting command */
251 } scsi;
253 /* statistics information */
254 struct {
255 unsigned int queues;
256 unsigned int removes;
257 unsigned int fins;
258 unsigned int reads;
259 unsigned int writes;
260 unsigned int miscs;
261 unsigned int disconnects;
262 unsigned int aborts;
263 unsigned int bus_resets;
264 unsigned int host_resets;
265 } stats;
267 /* configuration information */
268 struct {
269 unsigned char clockrate; /* clock rate of FAS device (MHz) */
270 unsigned char select_timeout; /* timeout (R5) */
271 unsigned char sync_max_depth; /* Synchronous xfer max fifo depth */
272 unsigned char wide_max_size; /* Maximum wide transfer size */
273 unsigned char cntl3; /* Control Reg 3 */
274 unsigned int asyncperiod; /* Async transfer period (ns) */
275 unsigned int capabilities; /* driver capabilities */
276 unsigned int disconnect_ok:1; /* Disconnects allowed? */
277 } ifcfg;
279 /* queue handling */
280 struct {
281 Queue_t issue; /* issue queue */
282 Queue_t disconnected; /* disconnected command queue */
283 } queues;
285 /* per-device info */
286 struct fas216_device {
287 unsigned char disconnect_ok:1; /* device can disconnect */
288 unsigned char parity_enabled:1; /* parity checking enabled */
289 unsigned char parity_check:1; /* need to check parity checking */
290 unsigned char period; /* sync xfer period in (*4ns) */
291 unsigned char stp; /* synchronous transfer period */
292 unsigned char sof; /* synchronous offset register */
293 unsigned char wide_xfer; /* currently negociated wide transfer */
294 neg_t sync_state; /* synchronous transfer mode */
295 neg_t wide_state; /* wide transfer mode */
296 } device[8];
297 unsigned long busyluns[64/sizeof(unsigned long)];/* array of bits indicating LUNs busy */
299 /* dma */
300 struct {
301 fasdmatype_t transfer_type; /* current type of DMA transfer */
302 fasdmatype_t (*setup) (struct Scsi_Host *host, struct scsi_pointer *SCp, fasdmadir_t direction, fasdmatype_t min_dma);
303 void (*pseudo)(struct Scsi_Host *host, struct scsi_pointer *SCp, fasdmadir_t direction, int transfer);
304 void (*stop) (struct Scsi_Host *host, struct scsi_pointer *SCp);
305 } dma;
307 /* miscellaneous */
308 int internal_done; /* flag to indicate request done */
309 struct scsi_eh_save ses; /* holds request sense restore info */
310 unsigned long magic_end;
311 } FAS216_Info;
313 /* Function: int fas216_init (struct Scsi_Host *instance)
314 * Purpose : initialise FAS/NCR/AMD SCSI structures.
315 * Params : instance - a driver-specific filled-out structure
316 * Returns : 0 on success
318 extern int fas216_init (struct Scsi_Host *instance);
320 /* Function: int fas216_add (struct Scsi_Host *instance, struct device *dev)
321 * Purpose : initialise FAS/NCR/AMD SCSI ic.
322 * Params : instance - a driver-specific filled-out structure
323 * Returns : 0 on success
325 extern int fas216_add (struct Scsi_Host *instance, struct device *dev);
327 /* Function: int fas216_queue_command(struct Scsi_Host *h, struct scsi_cmnd *SCpnt)
328 * Purpose : queue a command for adapter to process.
329 * Params : h - host adapter
330 * : SCpnt - Command to queue
331 * Returns : 0 - success, else error
333 extern int fas216_queue_command(struct Scsi_Host *h, struct scsi_cmnd *SCpnt);
335 /* Function: int fas216_noqueue_command(struct Scsi_Host *h, struct scsi_cmnd *SCpnt)
336 * Purpose : queue a command for adapter to process, and process it to completion.
337 * Params : h - host adapter
338 * : SCpnt - Command to queue
339 * Returns : 0 - success, else error
341 extern int fas216_noqueue_command(struct Scsi_Host *, struct scsi_cmnd *);
343 /* Function: irqreturn_t fas216_intr (FAS216_Info *info)
344 * Purpose : handle interrupts from the interface to progress a command
345 * Params : info - interface to service
347 extern irqreturn_t fas216_intr (FAS216_Info *info);
349 extern void fas216_remove (struct Scsi_Host *instance);
351 /* Function: void fas216_release (struct Scsi_Host *instance)
352 * Purpose : release all resources and put everything to bed for FAS/NCR/AMD SCSI ic.
353 * Params : instance - a driver-specific filled-out structure
354 * Returns : 0 on success
356 extern void fas216_release (struct Scsi_Host *instance);
358 extern void fas216_print_host(FAS216_Info *info, struct seq_file *m);
359 extern void fas216_print_stats(FAS216_Info *info, struct seq_file *m);
360 extern void fas216_print_devices(FAS216_Info *info, struct seq_file *m);
362 /* Function: int fas216_eh_abort(struct scsi_cmnd *SCpnt)
363 * Purpose : abort this command
364 * Params : SCpnt - command to abort
365 * Returns : FAILED if unable to abort
367 extern int fas216_eh_abort(struct scsi_cmnd *SCpnt);
369 /* Function: int fas216_eh_device_reset(struct scsi_cmnd *SCpnt)
370 * Purpose : Reset the device associated with this command
371 * Params : SCpnt - command specifing device to reset
372 * Returns : FAILED if unable to reset
374 extern int fas216_eh_device_reset(struct scsi_cmnd *SCpnt);
376 /* Function: int fas216_eh_bus_reset(struct scsi_cmnd *SCpnt)
377 * Purpose : Reset the complete bus associated with this command
378 * Params : SCpnt - command specifing bus to reset
379 * Returns : FAILED if unable to reset
381 extern int fas216_eh_bus_reset(struct scsi_cmnd *SCpnt);
383 /* Function: int fas216_eh_host_reset(struct scsi_cmnd *SCpnt)
384 * Purpose : Reset the host associated with this command
385 * Params : SCpnt - command specifing host to reset
386 * Returns : FAILED if unable to reset
388 extern int fas216_eh_host_reset(struct scsi_cmnd *SCpnt);
390 #endif /* FAS216_H */