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WIP FPC-III support
[linux/fpc-iii.git] / drivers / scsi / hpsa.c
blobf4d3747cfa0b06a531c77a2b644d94bdd9d6b77a
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
4 * Copyright 2016 Microsemi Corporation
5 * Copyright 2014-2015 PMC-Sierra, Inc.
6 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
15 * NON INFRINGEMENT. See the GNU General Public License for more details.
16 *
17 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
18 *
19 */
20
21 #include <linux/module.h>
22 #include <linux/interrupt.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
35 #include <linux/io.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
56 #include "hpsa_cmd.h"
57 #include "hpsa.h"
58
59 /*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
63 #define HPSA_DRIVER_VERSION "3.4.20-200"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65 #define HPSA "hpsa"
66
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
73
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
76 /* How long to wait before giving up on a command */
77 #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
78
79 /* Embedded module documentation macros - see modules.h */
80 MODULE_AUTHOR("Hewlett-Packard Company");
81 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
82 HPSA_DRIVER_VERSION);
83 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
84 MODULE_VERSION(HPSA_DRIVER_VERSION);
85 MODULE_LICENSE("GPL");
86 MODULE_ALIAS("cciss");
87
88 static int hpsa_simple_mode;
89 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
90 MODULE_PARM_DESC(hpsa_simple_mode,
91 "Use 'simple mode' rather than 'performant mode'");
92
93 /* define the PCI info for the cards we can control */
94 static const struct pci_device_id hpsa_pci_device_id[] = {
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
136 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
142 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
146 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
147 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
148 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
150 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
151 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
152 {0,}
153 };
154
155 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
156
157 /* board_id = Subsystem Device ID & Vendor ID
158 * product = Marketing Name for the board
159 * access = Address of the struct of function pointers
160 */
161 static struct board_type products[] = {
162 {0x40700E11, "Smart Array 5300", &SA5A_access},
163 {0x40800E11, "Smart Array 5i", &SA5B_access},
164 {0x40820E11, "Smart Array 532", &SA5B_access},
165 {0x40830E11, "Smart Array 5312", &SA5B_access},
166 {0x409A0E11, "Smart Array 641", &SA5A_access},
167 {0x409B0E11, "Smart Array 642", &SA5A_access},
168 {0x409C0E11, "Smart Array 6400", &SA5A_access},
169 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
170 {0x40910E11, "Smart Array 6i", &SA5A_access},
171 {0x3225103C, "Smart Array P600", &SA5A_access},
172 {0x3223103C, "Smart Array P800", &SA5A_access},
173 {0x3234103C, "Smart Array P400", &SA5A_access},
174 {0x3235103C, "Smart Array P400i", &SA5A_access},
175 {0x3211103C, "Smart Array E200i", &SA5A_access},
176 {0x3212103C, "Smart Array E200", &SA5A_access},
177 {0x3213103C, "Smart Array E200i", &SA5A_access},
178 {0x3214103C, "Smart Array E200i", &SA5A_access},
179 {0x3215103C, "Smart Array E200i", &SA5A_access},
180 {0x3237103C, "Smart Array E500", &SA5A_access},
181 {0x323D103C, "Smart Array P700m", &SA5A_access},
182 {0x3241103C, "Smart Array P212", &SA5_access},
183 {0x3243103C, "Smart Array P410", &SA5_access},
184 {0x3245103C, "Smart Array P410i", &SA5_access},
185 {0x3247103C, "Smart Array P411", &SA5_access},
186 {0x3249103C, "Smart Array P812", &SA5_access},
187 {0x324A103C, "Smart Array P712m", &SA5_access},
188 {0x324B103C, "Smart Array P711m", &SA5_access},
189 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
190 {0x3350103C, "Smart Array P222", &SA5_access},
191 {0x3351103C, "Smart Array P420", &SA5_access},
192 {0x3352103C, "Smart Array P421", &SA5_access},
193 {0x3353103C, "Smart Array P822", &SA5_access},
194 {0x3354103C, "Smart Array P420i", &SA5_access},
195 {0x3355103C, "Smart Array P220i", &SA5_access},
196 {0x3356103C, "Smart Array P721m", &SA5_access},
197 {0x1920103C, "Smart Array P430i", &SA5_access},
198 {0x1921103C, "Smart Array P830i", &SA5_access},
199 {0x1922103C, "Smart Array P430", &SA5_access},
200 {0x1923103C, "Smart Array P431", &SA5_access},
201 {0x1924103C, "Smart Array P830", &SA5_access},
202 {0x1925103C, "Smart Array P831", &SA5_access},
203 {0x1926103C, "Smart Array P731m", &SA5_access},
204 {0x1928103C, "Smart Array P230i", &SA5_access},
205 {0x1929103C, "Smart Array P530", &SA5_access},
206 {0x21BD103C, "Smart Array P244br", &SA5_access},
207 {0x21BE103C, "Smart Array P741m", &SA5_access},
208 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
209 {0x21C0103C, "Smart Array P440ar", &SA5_access},
210 {0x21C1103C, "Smart Array P840ar", &SA5_access},
211 {0x21C2103C, "Smart Array P440", &SA5_access},
212 {0x21C3103C, "Smart Array P441", &SA5_access},
213 {0x21C4103C, "Smart Array", &SA5_access},
214 {0x21C5103C, "Smart Array P841", &SA5_access},
215 {0x21C6103C, "Smart HBA H244br", &SA5_access},
216 {0x21C7103C, "Smart HBA H240", &SA5_access},
217 {0x21C8103C, "Smart HBA H241", &SA5_access},
218 {0x21C9103C, "Smart Array", &SA5_access},
219 {0x21CA103C, "Smart Array P246br", &SA5_access},
220 {0x21CB103C, "Smart Array P840", &SA5_access},
221 {0x21CC103C, "Smart Array", &SA5_access},
222 {0x21CD103C, "Smart Array", &SA5_access},
223 {0x21CE103C, "Smart HBA", &SA5_access},
224 {0x05809005, "SmartHBA-SA", &SA5_access},
225 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
226 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
227 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
228 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
229 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
230 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
231 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
232 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
233 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
234 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
235 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
236 };
237
238 static struct scsi_transport_template *hpsa_sas_transport_template;
239 static int hpsa_add_sas_host(struct ctlr_info *h);
240 static void hpsa_delete_sas_host(struct ctlr_info *h);
241 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
242 struct hpsa_scsi_dev_t *device);
243 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
244 static struct hpsa_scsi_dev_t
245 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
246 struct sas_rphy *rphy);
247
248 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
249 static const struct scsi_cmnd hpsa_cmd_busy;
250 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
251 static const struct scsi_cmnd hpsa_cmd_idle;
252 static int number_of_controllers;
253
254 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
255 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
256 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
257 void __user *arg);
258 static int hpsa_passthru_ioctl(struct ctlr_info *h,
259 IOCTL_Command_struct *iocommand);
260 static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
261 BIG_IOCTL_Command_struct *ioc);
262
263 #ifdef CONFIG_COMPAT
264 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
265 void __user *arg);
266 #endif
267
268 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
269 static struct CommandList *cmd_alloc(struct ctlr_info *h);
270 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
271 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
272 struct scsi_cmnd *scmd);
273 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
274 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
275 int cmd_type);
276 static void hpsa_free_cmd_pool(struct ctlr_info *h);
277 #define VPD_PAGE (1 << 8)
278 #define HPSA_SIMPLE_ERROR_BITS 0x03
279
280 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
281 static void hpsa_scan_start(struct Scsi_Host *);
282 static int hpsa_scan_finished(struct Scsi_Host *sh,
283 unsigned long elapsed_time);
284 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
285
286 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
287 static int hpsa_slave_alloc(struct scsi_device *sdev);
288 static int hpsa_slave_configure(struct scsi_device *sdev);
289 static void hpsa_slave_destroy(struct scsi_device *sdev);
290
291 static void hpsa_update_scsi_devices(struct ctlr_info *h);
292 static int check_for_unit_attention(struct ctlr_info *h,
293 struct CommandList *c);
294 static void check_ioctl_unit_attention(struct ctlr_info *h,
295 struct CommandList *c);
296 /* performant mode helper functions */
297 static void calc_bucket_map(int *bucket, int num_buckets,
298 int nsgs, int min_blocks, u32 *bucket_map);
299 static void hpsa_free_performant_mode(struct ctlr_info *h);
300 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
301 static inline u32 next_command(struct ctlr_info *h, u8 q);
302 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
303 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
304 u64 *cfg_offset);
305 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
306 unsigned long *memory_bar);
307 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
308 bool *legacy_board);
309 static int wait_for_device_to_become_ready(struct ctlr_info *h,
310 unsigned char lunaddr[],
311 int reply_queue);
312 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
313 int wait_for_ready);
314 static inline void finish_cmd(struct CommandList *c);
315 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
316 #define BOARD_NOT_READY 0
317 #define BOARD_READY 1
318 static void hpsa_drain_accel_commands(struct ctlr_info *h);
319 static void hpsa_flush_cache(struct ctlr_info *h);
320 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
321 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
322 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
323 static void hpsa_command_resubmit_worker(struct work_struct *work);
324 static u32 lockup_detected(struct ctlr_info *h);
325 static int detect_controller_lockup(struct ctlr_info *h);
326 static void hpsa_disable_rld_caching(struct ctlr_info *h);
327 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
328 struct ReportExtendedLUNdata *buf, int bufsize);
329 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
330 unsigned char scsi3addr[], u8 page);
331 static int hpsa_luns_changed(struct ctlr_info *h);
332 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
333 struct hpsa_scsi_dev_t *dev,
334 unsigned char *scsi3addr);
335
336 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
337 {
338 unsigned long *priv = shost_priv(sdev->host);
339 return (struct ctlr_info *) *priv;
340 }
341
342 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
343 {
344 unsigned long *priv = shost_priv(sh);
345 return (struct ctlr_info *) *priv;
346 }
347
348 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
349 {
350 return c->scsi_cmd == SCSI_CMD_IDLE;
351 }
352
353 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
354 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
355 u8 *sense_key, u8 *asc, u8 *ascq)
356 {
357 struct scsi_sense_hdr sshdr;
358 bool rc;
359
360 *sense_key = -1;
361 *asc = -1;
362 *ascq = -1;
363
364 if (sense_data_len < 1)
365 return;
366
367 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
368 if (rc) {
369 *sense_key = sshdr.sense_key;
370 *asc = sshdr.asc;
371 *ascq = sshdr.ascq;
372 }
373 }
374
375 static int check_for_unit_attention(struct ctlr_info *h,
376 struct CommandList *c)
377 {
378 u8 sense_key, asc, ascq;
379 int sense_len;
380
381 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
382 sense_len = sizeof(c->err_info->SenseInfo);
383 else
384 sense_len = c->err_info->SenseLen;
385
386 decode_sense_data(c->err_info->SenseInfo, sense_len,
387 &sense_key, &asc, &ascq);
388 if (sense_key != UNIT_ATTENTION || asc == 0xff)
389 return 0;
390
391 switch (asc) {
392 case STATE_CHANGED:
393 dev_warn(&h->pdev->dev,
394 "%s: a state change detected, command retried\n",
395 h->devname);
396 break;
397 case LUN_FAILED:
398 dev_warn(&h->pdev->dev,
399 "%s: LUN failure detected\n", h->devname);
400 break;
401 case REPORT_LUNS_CHANGED:
402 dev_warn(&h->pdev->dev,
403 "%s: report LUN data changed\n", h->devname);
404 /*
405 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
406 * target (array) devices.
407 */
408 break;
409 case POWER_OR_RESET:
410 dev_warn(&h->pdev->dev,
411 "%s: a power on or device reset detected\n",
412 h->devname);
413 break;
414 case UNIT_ATTENTION_CLEARED:
415 dev_warn(&h->pdev->dev,
416 "%s: unit attention cleared by another initiator\n",
417 h->devname);
418 break;
419 default:
420 dev_warn(&h->pdev->dev,
421 "%s: unknown unit attention detected\n",
422 h->devname);
423 break;
424 }
425 return 1;
426 }
427
428 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
429 {
430 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
431 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
432 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
433 return 0;
434 dev_warn(&h->pdev->dev, HPSA "device busy");
435 return 1;
436 }
437
438 static u32 lockup_detected(struct ctlr_info *h);
439 static ssize_t host_show_lockup_detected(struct device *dev,
440 struct device_attribute *attr, char *buf)
441 {
442 int ld;
443 struct ctlr_info *h;
444 struct Scsi_Host *shost = class_to_shost(dev);
445
446 h = shost_to_hba(shost);
447 ld = lockup_detected(h);
448
449 return sprintf(buf, "ld=%d\n", ld);
450 }
451
452 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
453 struct device_attribute *attr,
454 const char *buf, size_t count)
455 {
456 int status, len;
457 struct ctlr_info *h;
458 struct Scsi_Host *shost = class_to_shost(dev);
459 char tmpbuf[10];
460
461 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
462 return -EACCES;
463 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
464 strncpy(tmpbuf, buf, len);
465 tmpbuf[len] = '\0';
466 if (sscanf(tmpbuf, "%d", &status) != 1)
467 return -EINVAL;
468 h = shost_to_hba(shost);
469 h->acciopath_status = !!status;
470 dev_warn(&h->pdev->dev,
471 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
472 h->acciopath_status ? "enabled" : "disabled");
473 return count;
474 }
475
476 static ssize_t host_store_raid_offload_debug(struct device *dev,
477 struct device_attribute *attr,
478 const char *buf, size_t count)
479 {
480 int debug_level, len;
481 struct ctlr_info *h;
482 struct Scsi_Host *shost = class_to_shost(dev);
483 char tmpbuf[10];
484
485 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
486 return -EACCES;
487 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
488 strncpy(tmpbuf, buf, len);
489 tmpbuf[len] = '\0';
490 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
491 return -EINVAL;
492 if (debug_level < 0)
493 debug_level = 0;
494 h = shost_to_hba(shost);
495 h->raid_offload_debug = debug_level;
496 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
497 h->raid_offload_debug);
498 return count;
499 }
500
501 static ssize_t host_store_rescan(struct device *dev,
502 struct device_attribute *attr,
503 const char *buf, size_t count)
504 {
505 struct ctlr_info *h;
506 struct Scsi_Host *shost = class_to_shost(dev);
507 h = shost_to_hba(shost);
508 hpsa_scan_start(h->scsi_host);
509 return count;
510 }
511
512 static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device)
513 {
514 device->offload_enabled = 0;
515 device->offload_to_be_enabled = 0;
516 }
517
518 static ssize_t host_show_firmware_revision(struct device *dev,
519 struct device_attribute *attr, char *buf)
520 {
521 struct ctlr_info *h;
522 struct Scsi_Host *shost = class_to_shost(dev);
523 unsigned char *fwrev;
524
525 h = shost_to_hba(shost);
526 if (!h->hba_inquiry_data)
527 return 0;
528 fwrev = &h->hba_inquiry_data[32];
529 return snprintf(buf, 20, "%c%c%c%c\n",
530 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
531 }
532
533 static ssize_t host_show_commands_outstanding(struct device *dev,
534 struct device_attribute *attr, char *buf)
535 {
536 struct Scsi_Host *shost = class_to_shost(dev);
537 struct ctlr_info *h = shost_to_hba(shost);
538
539 return snprintf(buf, 20, "%d\n",
540 atomic_read(&h->commands_outstanding));
541 }
542
543 static ssize_t host_show_transport_mode(struct device *dev,
544 struct device_attribute *attr, char *buf)
545 {
546 struct ctlr_info *h;
547 struct Scsi_Host *shost = class_to_shost(dev);
548
549 h = shost_to_hba(shost);
550 return snprintf(buf, 20, "%s\n",
551 h->transMethod & CFGTBL_Trans_Performant ?
552 "performant" : "simple");
553 }
554
555 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
556 struct device_attribute *attr, char *buf)
557 {
558 struct ctlr_info *h;
559 struct Scsi_Host *shost = class_to_shost(dev);
560
561 h = shost_to_hba(shost);
562 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
563 (h->acciopath_status == 1) ? "enabled" : "disabled");
564 }
565
566 /* List of controllers which cannot be hard reset on kexec with reset_devices */
567 static u32 unresettable_controller[] = {
568 0x324a103C, /* Smart Array P712m */
569 0x324b103C, /* Smart Array P711m */
570 0x3223103C, /* Smart Array P800 */
571 0x3234103C, /* Smart Array P400 */
572 0x3235103C, /* Smart Array P400i */
573 0x3211103C, /* Smart Array E200i */
574 0x3212103C, /* Smart Array E200 */
575 0x3213103C, /* Smart Array E200i */
576 0x3214103C, /* Smart Array E200i */
577 0x3215103C, /* Smart Array E200i */
578 0x3237103C, /* Smart Array E500 */
579 0x323D103C, /* Smart Array P700m */
580 0x40800E11, /* Smart Array 5i */
581 0x409C0E11, /* Smart Array 6400 */
582 0x409D0E11, /* Smart Array 6400 EM */
583 0x40700E11, /* Smart Array 5300 */
584 0x40820E11, /* Smart Array 532 */
585 0x40830E11, /* Smart Array 5312 */
586 0x409A0E11, /* Smart Array 641 */
587 0x409B0E11, /* Smart Array 642 */
588 0x40910E11, /* Smart Array 6i */
589 };
590
591 /* List of controllers which cannot even be soft reset */
592 static u32 soft_unresettable_controller[] = {
593 0x40800E11, /* Smart Array 5i */
594 0x40700E11, /* Smart Array 5300 */
595 0x40820E11, /* Smart Array 532 */
596 0x40830E11, /* Smart Array 5312 */
597 0x409A0E11, /* Smart Array 641 */
598 0x409B0E11, /* Smart Array 642 */
599 0x40910E11, /* Smart Array 6i */
600 /* Exclude 640x boards. These are two pci devices in one slot
601 * which share a battery backed cache module. One controls the
602 * cache, the other accesses the cache through the one that controls
603 * it. If we reset the one controlling the cache, the other will
604 * likely not be happy. Just forbid resetting this conjoined mess.
605 * The 640x isn't really supported by hpsa anyway.
606 */
607 0x409C0E11, /* Smart Array 6400 */
608 0x409D0E11, /* Smart Array 6400 EM */
609 };
610
611 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
612 {
613 int i;
614
615 for (i = 0; i < nelems; i++)
616 if (a[i] == board_id)
617 return 1;
618 return 0;
619 }
620
621 static int ctlr_is_hard_resettable(u32 board_id)
622 {
623 return !board_id_in_array(unresettable_controller,
624 ARRAY_SIZE(unresettable_controller), board_id);
625 }
626
627 static int ctlr_is_soft_resettable(u32 board_id)
628 {
629 return !board_id_in_array(soft_unresettable_controller,
630 ARRAY_SIZE(soft_unresettable_controller), board_id);
631 }
632
633 static int ctlr_is_resettable(u32 board_id)
634 {
635 return ctlr_is_hard_resettable(board_id) ||
636 ctlr_is_soft_resettable(board_id);
637 }
638
639 static ssize_t host_show_resettable(struct device *dev,
640 struct device_attribute *attr, char *buf)
641 {
642 struct ctlr_info *h;
643 struct Scsi_Host *shost = class_to_shost(dev);
644
645 h = shost_to_hba(shost);
646 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
647 }
648
649 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
650 {
651 return (scsi3addr[3] & 0xC0) == 0x40;
652 }
653
654 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
655 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
656 };
657 #define HPSA_RAID_0 0
658 #define HPSA_RAID_4 1
659 #define HPSA_RAID_1 2 /* also used for RAID 10 */
660 #define HPSA_RAID_5 3 /* also used for RAID 50 */
661 #define HPSA_RAID_51 4
662 #define HPSA_RAID_6 5 /* also used for RAID 60 */
663 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
664 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
665 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
666
667 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
668 {
669 return !device->physical_device;
670 }
671
672 static ssize_t raid_level_show(struct device *dev,
673 struct device_attribute *attr, char *buf)
674 {
675 ssize_t l = 0;
676 unsigned char rlevel;
677 struct ctlr_info *h;
678 struct scsi_device *sdev;
679 struct hpsa_scsi_dev_t *hdev;
680 unsigned long flags;
681
682 sdev = to_scsi_device(dev);
683 h = sdev_to_hba(sdev);
684 spin_lock_irqsave(&h->lock, flags);
685 hdev = sdev->hostdata;
686 if (!hdev) {
687 spin_unlock_irqrestore(&h->lock, flags);
688 return -ENODEV;
689 }
690
691 /* Is this even a logical drive? */
692 if (!is_logical_device(hdev)) {
693 spin_unlock_irqrestore(&h->lock, flags);
694 l = snprintf(buf, PAGE_SIZE, "N/A\n");
695 return l;
696 }
697
698 rlevel = hdev->raid_level;
699 spin_unlock_irqrestore(&h->lock, flags);
700 if (rlevel > RAID_UNKNOWN)
701 rlevel = RAID_UNKNOWN;
702 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
703 return l;
704 }
705
706 static ssize_t lunid_show(struct device *dev,
707 struct device_attribute *attr, char *buf)
708 {
709 struct ctlr_info *h;
710 struct scsi_device *sdev;
711 struct hpsa_scsi_dev_t *hdev;
712 unsigned long flags;
713 unsigned char lunid[8];
714
715 sdev = to_scsi_device(dev);
716 h = sdev_to_hba(sdev);
717 spin_lock_irqsave(&h->lock, flags);
718 hdev = sdev->hostdata;
719 if (!hdev) {
720 spin_unlock_irqrestore(&h->lock, flags);
721 return -ENODEV;
722 }
723 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
724 spin_unlock_irqrestore(&h->lock, flags);
725 return snprintf(buf, 20, "0x%8phN\n", lunid);
726 }
727
728 static ssize_t unique_id_show(struct device *dev,
729 struct device_attribute *attr, char *buf)
730 {
731 struct ctlr_info *h;
732 struct scsi_device *sdev;
733 struct hpsa_scsi_dev_t *hdev;
734 unsigned long flags;
735 unsigned char sn[16];
736
737 sdev = to_scsi_device(dev);
738 h = sdev_to_hba(sdev);
739 spin_lock_irqsave(&h->lock, flags);
740 hdev = sdev->hostdata;
741 if (!hdev) {
742 spin_unlock_irqrestore(&h->lock, flags);
743 return -ENODEV;
744 }
745 memcpy(sn, hdev->device_id, sizeof(sn));
746 spin_unlock_irqrestore(&h->lock, flags);
747 return snprintf(buf, 16 * 2 + 2,
748 "%02X%02X%02X%02X%02X%02X%02X%02X"
749 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
750 sn[0], sn[1], sn[2], sn[3],
751 sn[4], sn[5], sn[6], sn[7],
752 sn[8], sn[9], sn[10], sn[11],
753 sn[12], sn[13], sn[14], sn[15]);
754 }
755
756 static ssize_t sas_address_show(struct device *dev,
757 struct device_attribute *attr, char *buf)
758 {
759 struct ctlr_info *h;
760 struct scsi_device *sdev;
761 struct hpsa_scsi_dev_t *hdev;
762 unsigned long flags;
763 u64 sas_address;
764
765 sdev = to_scsi_device(dev);
766 h = sdev_to_hba(sdev);
767 spin_lock_irqsave(&h->lock, flags);
768 hdev = sdev->hostdata;
769 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
770 spin_unlock_irqrestore(&h->lock, flags);
771 return -ENODEV;
772 }
773 sas_address = hdev->sas_address;
774 spin_unlock_irqrestore(&h->lock, flags);
775
776 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
777 }
778
779 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
780 struct device_attribute *attr, char *buf)
781 {
782 struct ctlr_info *h;
783 struct scsi_device *sdev;
784 struct hpsa_scsi_dev_t *hdev;
785 unsigned long flags;
786 int offload_enabled;
787
788 sdev = to_scsi_device(dev);
789 h = sdev_to_hba(sdev);
790 spin_lock_irqsave(&h->lock, flags);
791 hdev = sdev->hostdata;
792 if (!hdev) {
793 spin_unlock_irqrestore(&h->lock, flags);
794 return -ENODEV;
795 }
796 offload_enabled = hdev->offload_enabled;
797 spin_unlock_irqrestore(&h->lock, flags);
798
799 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
800 return snprintf(buf, 20, "%d\n", offload_enabled);
801 else
802 return snprintf(buf, 40, "%s\n",
803 "Not applicable for a controller");
804 }
805
806 #define MAX_PATHS 8
807 static ssize_t path_info_show(struct device *dev,
808 struct device_attribute *attr, char *buf)
809 {
810 struct ctlr_info *h;
811 struct scsi_device *sdev;
812 struct hpsa_scsi_dev_t *hdev;
813 unsigned long flags;
814 int i;
815 int output_len = 0;
816 u8 box;
817 u8 bay;
818 u8 path_map_index = 0;
819 char *active;
820 unsigned char phys_connector[2];
821
822 sdev = to_scsi_device(dev);
823 h = sdev_to_hba(sdev);
824 spin_lock_irqsave(&h->devlock, flags);
825 hdev = sdev->hostdata;
826 if (!hdev) {
827 spin_unlock_irqrestore(&h->devlock, flags);
828 return -ENODEV;
829 }
830
831 bay = hdev->bay;
832 for (i = 0; i < MAX_PATHS; i++) {
833 path_map_index = 1<<i;
834 if (i == hdev->active_path_index)
835 active = "Active";
836 else if (hdev->path_map & path_map_index)
837 active = "Inactive";
838 else
839 continue;
840
841 output_len += scnprintf(buf + output_len,
842 PAGE_SIZE - output_len,
843 "[%d:%d:%d:%d] %20.20s ",
844 h->scsi_host->host_no,
845 hdev->bus, hdev->target, hdev->lun,
846 scsi_device_type(hdev->devtype));
847
848 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
849 output_len += scnprintf(buf + output_len,
850 PAGE_SIZE - output_len,
851 "%s\n", active);
852 continue;
853 }
854
855 box = hdev->box[i];
856 memcpy(&phys_connector, &hdev->phys_connector[i],
857 sizeof(phys_connector));
858 if (phys_connector[0] < '0')
859 phys_connector[0] = '0';
860 if (phys_connector[1] < '0')
861 phys_connector[1] = '0';
862 output_len += scnprintf(buf + output_len,
863 PAGE_SIZE - output_len,
864 "PORT: %.2s ",
865 phys_connector);
866 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
867 hdev->expose_device) {
868 if (box == 0 || box == 0xFF) {
869 output_len += scnprintf(buf + output_len,
870 PAGE_SIZE - output_len,
871 "BAY: %hhu %s\n",
872 bay, active);
873 } else {
874 output_len += scnprintf(buf + output_len,
875 PAGE_SIZE - output_len,
876 "BOX: %hhu BAY: %hhu %s\n",
877 box, bay, active);
878 }
879 } else if (box != 0 && box != 0xFF) {
880 output_len += scnprintf(buf + output_len,
881 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
882 box, active);
883 } else
884 output_len += scnprintf(buf + output_len,
885 PAGE_SIZE - output_len, "%s\n", active);
886 }
887
888 spin_unlock_irqrestore(&h->devlock, flags);
889 return output_len;
890 }
891
892 static ssize_t host_show_ctlr_num(struct device *dev,
893 struct device_attribute *attr, char *buf)
894 {
895 struct ctlr_info *h;
896 struct Scsi_Host *shost = class_to_shost(dev);
897
898 h = shost_to_hba(shost);
899 return snprintf(buf, 20, "%d\n", h->ctlr);
900 }
901
902 static ssize_t host_show_legacy_board(struct device *dev,
903 struct device_attribute *attr, char *buf)
904 {
905 struct ctlr_info *h;
906 struct Scsi_Host *shost = class_to_shost(dev);
907
908 h = shost_to_hba(shost);
909 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
910 }
911
912 static DEVICE_ATTR_RO(raid_level);
913 static DEVICE_ATTR_RO(lunid);
914 static DEVICE_ATTR_RO(unique_id);
915 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
916 static DEVICE_ATTR_RO(sas_address);
917 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
918 host_show_hp_ssd_smart_path_enabled, NULL);
919 static DEVICE_ATTR_RO(path_info);
920 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
921 host_show_hp_ssd_smart_path_status,
922 host_store_hp_ssd_smart_path_status);
923 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
924 host_store_raid_offload_debug);
925 static DEVICE_ATTR(firmware_revision, S_IRUGO,
926 host_show_firmware_revision, NULL);
927 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
928 host_show_commands_outstanding, NULL);
929 static DEVICE_ATTR(transport_mode, S_IRUGO,
930 host_show_transport_mode, NULL);
931 static DEVICE_ATTR(resettable, S_IRUGO,
932 host_show_resettable, NULL);
933 static DEVICE_ATTR(lockup_detected, S_IRUGO,
934 host_show_lockup_detected, NULL);
935 static DEVICE_ATTR(ctlr_num, S_IRUGO,
936 host_show_ctlr_num, NULL);
937 static DEVICE_ATTR(legacy_board, S_IRUGO,
938 host_show_legacy_board, NULL);
939
940 static struct device_attribute *hpsa_sdev_attrs[] = {
941 &dev_attr_raid_level,
942 &dev_attr_lunid,
943 &dev_attr_unique_id,
944 &dev_attr_hp_ssd_smart_path_enabled,
945 &dev_attr_path_info,
946 &dev_attr_sas_address,
947 NULL,
948 };
949
950 static struct device_attribute *hpsa_shost_attrs[] = {
951 &dev_attr_rescan,
952 &dev_attr_firmware_revision,
953 &dev_attr_commands_outstanding,
954 &dev_attr_transport_mode,
955 &dev_attr_resettable,
956 &dev_attr_hp_ssd_smart_path_status,
957 &dev_attr_raid_offload_debug,
958 &dev_attr_lockup_detected,
959 &dev_attr_ctlr_num,
960 &dev_attr_legacy_board,
961 NULL,
962 };
963
964 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
965 HPSA_MAX_CONCURRENT_PASSTHRUS)
966
967 static struct scsi_host_template hpsa_driver_template = {
968 .module = THIS_MODULE,
969 .name = HPSA,
970 .proc_name = HPSA,
971 .queuecommand = hpsa_scsi_queue_command,
972 .scan_start = hpsa_scan_start,
973 .scan_finished = hpsa_scan_finished,
974 .change_queue_depth = hpsa_change_queue_depth,
975 .this_id = -1,
976 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
977 .ioctl = hpsa_ioctl,
978 .slave_alloc = hpsa_slave_alloc,
979 .slave_configure = hpsa_slave_configure,
980 .slave_destroy = hpsa_slave_destroy,
981 #ifdef CONFIG_COMPAT
982 .compat_ioctl = hpsa_compat_ioctl,
983 #endif
984 .sdev_attrs = hpsa_sdev_attrs,
985 .shost_attrs = hpsa_shost_attrs,
986 .max_sectors = 2048,
987 .no_write_same = 1,
988 };
989
990 static inline u32 next_command(struct ctlr_info *h, u8 q)
991 {
992 u32 a;
993 struct reply_queue_buffer *rq = &h->reply_queue[q];
994
995 if (h->transMethod & CFGTBL_Trans_io_accel1)
996 return h->access.command_completed(h, q);
997
998 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
999 return h->access.command_completed(h, q);
1000
1001 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
1002 a = rq->head[rq->current_entry];
1003 rq->current_entry++;
1004 atomic_dec(&h->commands_outstanding);
1005 } else {
1006 a = FIFO_EMPTY;
1007 }
1008 /* Check for wraparound */
1009 if (rq->current_entry == h->max_commands) {
1010 rq->current_entry = 0;
1011 rq->wraparound ^= 1;
1012 }
1013 return a;
1014 }
1015
1016 /*
1017 * There are some special bits in the bus address of the
1018 * command that we have to set for the controller to know
1019 * how to process the command:
1020 *
1021 * Normal performant mode:
1022 * bit 0: 1 means performant mode, 0 means simple mode.
1023 * bits 1-3 = block fetch table entry
1024 * bits 4-6 = command type (== 0)
1025 *
1026 * ioaccel1 mode:
1027 * bit 0 = "performant mode" bit.
1028 * bits 1-3 = block fetch table entry
1029 * bits 4-6 = command type (== 110)
1030 * (command type is needed because ioaccel1 mode
1031 * commands are submitted through the same register as normal
1032 * mode commands, so this is how the controller knows whether
1033 * the command is normal mode or ioaccel1 mode.)
1034 *
1035 * ioaccel2 mode:
1036 * bit 0 = "performant mode" bit.
1037 * bits 1-4 = block fetch table entry (note extra bit)
1038 * bits 4-6 = not needed, because ioaccel2 mode has
1039 * a separate special register for submitting commands.
1040 */
1041
1042 /*
1043 * set_performant_mode: Modify the tag for cciss performant
1044 * set bit 0 for pull model, bits 3-1 for block fetch
1045 * register number
1046 */
1047 #define DEFAULT_REPLY_QUEUE (-1)
1048 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1049 int reply_queue)
1050 {
1051 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1052 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1053 if (unlikely(!h->msix_vectors))
1054 return;
1055 c->Header.ReplyQueue = reply_queue;
1056 }
1057 }
1058
1059 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1060 struct CommandList *c,
1061 int reply_queue)
1062 {
1063 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1064
1065 /*
1066 * Tell the controller to post the reply to the queue for this
1067 * processor. This seems to give the best I/O throughput.
1068 */
1069 cp->ReplyQueue = reply_queue;
1070 /*
1071 * Set the bits in the address sent down to include:
1072 * - performant mode bit (bit 0)
1073 * - pull count (bits 1-3)
1074 * - command type (bits 4-6)
1075 */
1076 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1077 IOACCEL1_BUSADDR_CMDTYPE;
1078 }
1079
1080 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1081 struct CommandList *c,
1082 int reply_queue)
1083 {
1084 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1085 &h->ioaccel2_cmd_pool[c->cmdindex];
1086
1087 /* Tell the controller to post the reply to the queue for this
1088 * processor. This seems to give the best I/O throughput.
1089 */
1090 cp->reply_queue = reply_queue;
1091 /* Set the bits in the address sent down to include:
1092 * - performant mode bit not used in ioaccel mode 2
1093 * - pull count (bits 0-3)
1094 * - command type isn't needed for ioaccel2
1095 */
1096 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1097 }
1098
1099 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1100 struct CommandList *c,
1101 int reply_queue)
1102 {
1103 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1104
1105 /*
1106 * Tell the controller to post the reply to the queue for this
1107 * processor. This seems to give the best I/O throughput.
1108 */
1109 cp->reply_queue = reply_queue;
1110 /*
1111 * Set the bits in the address sent down to include:
1112 * - performant mode bit not used in ioaccel mode 2
1113 * - pull count (bits 0-3)
1114 * - command type isn't needed for ioaccel2
1115 */
1116 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1117 }
1118
1119 static int is_firmware_flash_cmd(u8 *cdb)
1120 {
1121 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1122 }
1123
1124 /*
1125 * During firmware flash, the heartbeat register may not update as frequently
1126 * as it should. So we dial down lockup detection during firmware flash. and
1127 * dial it back up when firmware flash completes.
1128 */
1129 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1130 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1131 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1132 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1133 struct CommandList *c)
1134 {
1135 if (!is_firmware_flash_cmd(c->Request.CDB))
1136 return;
1137 atomic_inc(&h->firmware_flash_in_progress);
1138 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1139 }
1140
1141 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1142 struct CommandList *c)
1143 {
1144 if (is_firmware_flash_cmd(c->Request.CDB) &&
1145 atomic_dec_and_test(&h->firmware_flash_in_progress))
1146 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1147 }
1148
1149 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1150 struct CommandList *c, int reply_queue)
1151 {
1152 dial_down_lockup_detection_during_fw_flash(h, c);
1153 atomic_inc(&h->commands_outstanding);
1154 if (c->device)
1155 atomic_inc(&c->device->commands_outstanding);
1156
1157 reply_queue = h->reply_map[raw_smp_processor_id()];
1158 switch (c->cmd_type) {
1159 case CMD_IOACCEL1:
1160 set_ioaccel1_performant_mode(h, c, reply_queue);
1161 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1162 break;
1163 case CMD_IOACCEL2:
1164 set_ioaccel2_performant_mode(h, c, reply_queue);
1165 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1166 break;
1167 case IOACCEL2_TMF:
1168 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1169 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1170 break;
1171 default:
1172 set_performant_mode(h, c, reply_queue);
1173 h->access.submit_command(h, c);
1174 }
1175 }
1176
1177 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1178 {
1179 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1180 }
1181
1182 static inline int is_hba_lunid(unsigned char scsi3addr[])
1183 {
1184 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1185 }
1186
1187 static inline int is_scsi_rev_5(struct ctlr_info *h)
1188 {
1189 if (!h->hba_inquiry_data)
1190 return 0;
1191 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1192 return 1;
1193 return 0;
1194 }
1195
1196 static int hpsa_find_target_lun(struct ctlr_info *h,
1197 unsigned char scsi3addr[], int bus, int *target, int *lun)
1198 {
1199 /* finds an unused bus, target, lun for a new physical device
1200 * assumes h->devlock is held
1201 */
1202 int i, found = 0;
1203 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1204
1205 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1206
1207 for (i = 0; i < h->ndevices; i++) {
1208 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1209 __set_bit(h->dev[i]->target, lun_taken);
1210 }
1211
1212 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1213 if (i < HPSA_MAX_DEVICES) {
1214 /* *bus = 1; */
1215 *target = i;
1216 *lun = 0;
1217 found = 1;
1218 }
1219 return !found;
1220 }
1221
1222 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1223 struct hpsa_scsi_dev_t *dev, char *description)
1224 {
1225 #define LABEL_SIZE 25
1226 char label[LABEL_SIZE];
1227
1228 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1229 return;
1230
1231 switch (dev->devtype) {
1232 case TYPE_RAID:
1233 snprintf(label, LABEL_SIZE, "controller");
1234 break;
1235 case TYPE_ENCLOSURE:
1236 snprintf(label, LABEL_SIZE, "enclosure");
1237 break;
1238 case TYPE_DISK:
1239 case TYPE_ZBC:
1240 if (dev->external)
1241 snprintf(label, LABEL_SIZE, "external");
1242 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1243 snprintf(label, LABEL_SIZE, "%s",
1244 raid_label[PHYSICAL_DRIVE]);
1245 else
1246 snprintf(label, LABEL_SIZE, "RAID-%s",
1247 dev->raid_level > RAID_UNKNOWN ? "?" :
1248 raid_label[dev->raid_level]);
1249 break;
1250 case TYPE_ROM:
1251 snprintf(label, LABEL_SIZE, "rom");
1252 break;
1253 case TYPE_TAPE:
1254 snprintf(label, LABEL_SIZE, "tape");
1255 break;
1256 case TYPE_MEDIUM_CHANGER:
1257 snprintf(label, LABEL_SIZE, "changer");
1258 break;
1259 default:
1260 snprintf(label, LABEL_SIZE, "UNKNOWN");
1261 break;
1262 }
1263
1264 dev_printk(level, &h->pdev->dev,
1265 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1266 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1267 description,
1268 scsi_device_type(dev->devtype),
1269 dev->vendor,
1270 dev->model,
1271 label,
1272 dev->offload_config ? '+' : '-',
1273 dev->offload_to_be_enabled ? '+' : '-',
1274 dev->expose_device);
1275 }
1276
1277 /* Add an entry into h->dev[] array. */
1278 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1279 struct hpsa_scsi_dev_t *device,
1280 struct hpsa_scsi_dev_t *added[], int *nadded)
1281 {
1282 /* assumes h->devlock is held */
1283 int n = h->ndevices;
1284 int i;
1285 unsigned char addr1[8], addr2[8];
1286 struct hpsa_scsi_dev_t *sd;
1287
1288 if (n >= HPSA_MAX_DEVICES) {
1289 dev_err(&h->pdev->dev, "too many devices, some will be "
1290 "inaccessible.\n");
1291 return -1;
1292 }
1293
1294 /* physical devices do not have lun or target assigned until now. */
1295 if (device->lun != -1)
1296 /* Logical device, lun is already assigned. */
1297 goto lun_assigned;
1298
1299 /* If this device a non-zero lun of a multi-lun device
1300 * byte 4 of the 8-byte LUN addr will contain the logical
1301 * unit no, zero otherwise.
1302 */
1303 if (device->scsi3addr[4] == 0) {
1304 /* This is not a non-zero lun of a multi-lun device */
1305 if (hpsa_find_target_lun(h, device->scsi3addr,
1306 device->bus, &device->target, &device->lun) != 0)
1307 return -1;
1308 goto lun_assigned;
1309 }
1310
1311 /* This is a non-zero lun of a multi-lun device.
1312 * Search through our list and find the device which
1313 * has the same 8 byte LUN address, excepting byte 4 and 5.
1314 * Assign the same bus and target for this new LUN.
1315 * Use the logical unit number from the firmware.
1316 */
1317 memcpy(addr1, device->scsi3addr, 8);
1318 addr1[4] = 0;
1319 addr1[5] = 0;
1320 for (i = 0; i < n; i++) {
1321 sd = h->dev[i];
1322 memcpy(addr2, sd->scsi3addr, 8);
1323 addr2[4] = 0;
1324 addr2[5] = 0;
1325 /* differ only in byte 4 and 5? */
1326 if (memcmp(addr1, addr2, 8) == 0) {
1327 device->bus = sd->bus;
1328 device->target = sd->target;
1329 device->lun = device->scsi3addr[4];
1330 break;
1331 }
1332 }
1333 if (device->lun == -1) {
1334 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1335 " suspect firmware bug or unsupported hardware "
1336 "configuration.\n");
1337 return -1;
1338 }
1339
1340 lun_assigned:
1341
1342 h->dev[n] = device;
1343 h->ndevices++;
1344 added[*nadded] = device;
1345 (*nadded)++;
1346 hpsa_show_dev_msg(KERN_INFO, h, device,
1347 device->expose_device ? "added" : "masked");
1348 return 0;
1349 }
1350
1351 /*
1352 * Called during a scan operation.
1353 *
1354 * Update an entry in h->dev[] array.
1355 */
1356 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1357 int entry, struct hpsa_scsi_dev_t *new_entry)
1358 {
1359 /* assumes h->devlock is held */
1360 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1361
1362 /* Raid level changed. */
1363 h->dev[entry]->raid_level = new_entry->raid_level;
1364
1365 /*
1366 * ioacccel_handle may have changed for a dual domain disk
1367 */
1368 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1369
1370 /* Raid offload parameters changed. Careful about the ordering. */
1371 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1372 /*
1373 * if drive is newly offload_enabled, we want to copy the
1374 * raid map data first. If previously offload_enabled and
1375 * offload_config were set, raid map data had better be
1376 * the same as it was before. If raid map data has changed
1377 * then it had better be the case that
1378 * h->dev[entry]->offload_enabled is currently 0.
1379 */
1380 h->dev[entry]->raid_map = new_entry->raid_map;
1381 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1382 }
1383 if (new_entry->offload_to_be_enabled) {
1384 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1385 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1386 }
1387 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1388 h->dev[entry]->offload_config = new_entry->offload_config;
1389 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1390 h->dev[entry]->queue_depth = new_entry->queue_depth;
1391
1392 /*
1393 * We can turn off ioaccel offload now, but need to delay turning
1394 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1395 * can't do that until all the devices are updated.
1396 */
1397 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1398
1399 /*
1400 * turn ioaccel off immediately if told to do so.
1401 */
1402 if (!new_entry->offload_to_be_enabled)
1403 h->dev[entry]->offload_enabled = 0;
1404
1405 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1406 }
1407
1408 /* Replace an entry from h->dev[] array. */
1409 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1410 int entry, struct hpsa_scsi_dev_t *new_entry,
1411 struct hpsa_scsi_dev_t *added[], int *nadded,
1412 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1413 {
1414 /* assumes h->devlock is held */
1415 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1416 removed[*nremoved] = h->dev[entry];
1417 (*nremoved)++;
1418
1419 /*
1420 * New physical devices won't have target/lun assigned yet
1421 * so we need to preserve the values in the slot we are replacing.
1422 */
1423 if (new_entry->target == -1) {
1424 new_entry->target = h->dev[entry]->target;
1425 new_entry->lun = h->dev[entry]->lun;
1426 }
1427
1428 h->dev[entry] = new_entry;
1429 added[*nadded] = new_entry;
1430 (*nadded)++;
1431
1432 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1433 }
1434
1435 /* Remove an entry from h->dev[] array. */
1436 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1437 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1438 {
1439 /* assumes h->devlock is held */
1440 int i;
1441 struct hpsa_scsi_dev_t *sd;
1442
1443 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1444
1445 sd = h->dev[entry];
1446 removed[*nremoved] = h->dev[entry];
1447 (*nremoved)++;
1448
1449 for (i = entry; i < h->ndevices-1; i++)
1450 h->dev[i] = h->dev[i+1];
1451 h->ndevices--;
1452 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1453 }
1454
1455 #define SCSI3ADDR_EQ(a, b) ( \
1456 (a)[7] == (b)[7] && \
1457 (a)[6] == (b)[6] && \
1458 (a)[5] == (b)[5] && \
1459 (a)[4] == (b)[4] && \
1460 (a)[3] == (b)[3] && \
1461 (a)[2] == (b)[2] && \
1462 (a)[1] == (b)[1] && \
1463 (a)[0] == (b)[0])
1464
1465 static void fixup_botched_add(struct ctlr_info *h,
1466 struct hpsa_scsi_dev_t *added)
1467 {
1468 /* called when scsi_add_device fails in order to re-adjust
1469 * h->dev[] to match the mid layer's view.
1470 */
1471 unsigned long flags;
1472 int i, j;
1473
1474 spin_lock_irqsave(&h->lock, flags);
1475 for (i = 0; i < h->ndevices; i++) {
1476 if (h->dev[i] == added) {
1477 for (j = i; j < h->ndevices-1; j++)
1478 h->dev[j] = h->dev[j+1];
1479 h->ndevices--;
1480 break;
1481 }
1482 }
1483 spin_unlock_irqrestore(&h->lock, flags);
1484 kfree(added);
1485 }
1486
1487 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1488 struct hpsa_scsi_dev_t *dev2)
1489 {
1490 /* we compare everything except lun and target as these
1491 * are not yet assigned. Compare parts likely
1492 * to differ first
1493 */
1494 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1495 sizeof(dev1->scsi3addr)) != 0)
1496 return 0;
1497 if (memcmp(dev1->device_id, dev2->device_id,
1498 sizeof(dev1->device_id)) != 0)
1499 return 0;
1500 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1501 return 0;
1502 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1503 return 0;
1504 if (dev1->devtype != dev2->devtype)
1505 return 0;
1506 if (dev1->bus != dev2->bus)
1507 return 0;
1508 return 1;
1509 }
1510
1511 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1512 struct hpsa_scsi_dev_t *dev2)
1513 {
1514 /* Device attributes that can change, but don't mean
1515 * that the device is a different device, nor that the OS
1516 * needs to be told anything about the change.
1517 */
1518 if (dev1->raid_level != dev2->raid_level)
1519 return 1;
1520 if (dev1->offload_config != dev2->offload_config)
1521 return 1;
1522 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1523 return 1;
1524 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1525 if (dev1->queue_depth != dev2->queue_depth)
1526 return 1;
1527 /*
1528 * This can happen for dual domain devices. An active
1529 * path change causes the ioaccel handle to change
1530 *
1531 * for example note the handle differences between p0 and p1
1532 * Device WWN ,WWN hash,Handle
1533 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1534 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004
1535 */
1536 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1537 return 1;
1538 return 0;
1539 }
1540
1541 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1542 * and return needle location in *index. If scsi3addr matches, but not
1543 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1544 * location in *index.
1545 * In the case of a minor device attribute change, such as RAID level, just
1546 * return DEVICE_UPDATED, along with the updated device's location in index.
1547 * If needle not found, return DEVICE_NOT_FOUND.
1548 */
1549 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1550 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1551 int *index)
1552 {
1553 int i;
1554 #define DEVICE_NOT_FOUND 0
1555 #define DEVICE_CHANGED 1
1556 #define DEVICE_SAME 2
1557 #define DEVICE_UPDATED 3
1558 if (needle == NULL)
1559 return DEVICE_NOT_FOUND;
1560
1561 for (i = 0; i < haystack_size; i++) {
1562 if (haystack[i] == NULL) /* previously removed. */
1563 continue;
1564 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1565 *index = i;
1566 if (device_is_the_same(needle, haystack[i])) {
1567 if (device_updated(needle, haystack[i]))
1568 return DEVICE_UPDATED;
1569 return DEVICE_SAME;
1570 } else {
1571 /* Keep offline devices offline */
1572 if (needle->volume_offline)
1573 return DEVICE_NOT_FOUND;
1574 return DEVICE_CHANGED;
1575 }
1576 }
1577 }
1578 *index = -1;
1579 return DEVICE_NOT_FOUND;
1580 }
1581
1582 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1583 unsigned char scsi3addr[])
1584 {
1585 struct offline_device_entry *device;
1586 unsigned long flags;
1587
1588 /* Check to see if device is already on the list */
1589 spin_lock_irqsave(&h->offline_device_lock, flags);
1590 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1591 if (memcmp(device->scsi3addr, scsi3addr,
1592 sizeof(device->scsi3addr)) == 0) {
1593 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1594 return;
1595 }
1596 }
1597 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1598
1599 /* Device is not on the list, add it. */
1600 device = kmalloc(sizeof(*device), GFP_KERNEL);
1601 if (!device)
1602 return;
1603
1604 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1605 spin_lock_irqsave(&h->offline_device_lock, flags);
1606 list_add_tail(&device->offline_list, &h->offline_device_list);
1607 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1608 }
1609
1610 /* Print a message explaining various offline volume states */
1611 static void hpsa_show_volume_status(struct ctlr_info *h,
1612 struct hpsa_scsi_dev_t *sd)
1613 {
1614 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1615 dev_info(&h->pdev->dev,
1616 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1617 h->scsi_host->host_no,
1618 sd->bus, sd->target, sd->lun);
1619 switch (sd->volume_offline) {
1620 case HPSA_LV_OK:
1621 break;
1622 case HPSA_LV_UNDERGOING_ERASE:
1623 dev_info(&h->pdev->dev,
1624 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1625 h->scsi_host->host_no,
1626 sd->bus, sd->target, sd->lun);
1627 break;
1628 case HPSA_LV_NOT_AVAILABLE:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1633 break;
1634 case HPSA_LV_UNDERGOING_RPI:
1635 dev_info(&h->pdev->dev,
1636 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1637 h->scsi_host->host_no,
1638 sd->bus, sd->target, sd->lun);
1639 break;
1640 case HPSA_LV_PENDING_RPI:
1641 dev_info(&h->pdev->dev,
1642 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1643 h->scsi_host->host_no,
1644 sd->bus, sd->target, sd->lun);
1645 break;
1646 case HPSA_LV_ENCRYPTED_NO_KEY:
1647 dev_info(&h->pdev->dev,
1648 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1649 h->scsi_host->host_no,
1650 sd->bus, sd->target, sd->lun);
1651 break;
1652 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1653 dev_info(&h->pdev->dev,
1654 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1655 h->scsi_host->host_no,
1656 sd->bus, sd->target, sd->lun);
1657 break;
1658 case HPSA_LV_UNDERGOING_ENCRYPTION:
1659 dev_info(&h->pdev->dev,
1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1661 h->scsi_host->host_no,
1662 sd->bus, sd->target, sd->lun);
1663 break;
1664 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1665 dev_info(&h->pdev->dev,
1666 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1667 h->scsi_host->host_no,
1668 sd->bus, sd->target, sd->lun);
1669 break;
1670 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1671 dev_info(&h->pdev->dev,
1672 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1673 h->scsi_host->host_no,
1674 sd->bus, sd->target, sd->lun);
1675 break;
1676 case HPSA_LV_PENDING_ENCRYPTION:
1677 dev_info(&h->pdev->dev,
1678 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1679 h->scsi_host->host_no,
1680 sd->bus, sd->target, sd->lun);
1681 break;
1682 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1683 dev_info(&h->pdev->dev,
1684 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1685 h->scsi_host->host_no,
1686 sd->bus, sd->target, sd->lun);
1687 break;
1688 }
1689 }
1690
1691 /*
1692 * Figure the list of physical drive pointers for a logical drive with
1693 * raid offload configured.
1694 */
1695 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1696 struct hpsa_scsi_dev_t *dev[], int ndevices,
1697 struct hpsa_scsi_dev_t *logical_drive)
1698 {
1699 struct raid_map_data *map = &logical_drive->raid_map;
1700 struct raid_map_disk_data *dd = &map->data[0];
1701 int i, j;
1702 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1703 le16_to_cpu(map->metadata_disks_per_row);
1704 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1705 le16_to_cpu(map->layout_map_count) *
1706 total_disks_per_row;
1707 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1708 total_disks_per_row;
1709 int qdepth;
1710
1711 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1712 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1713
1714 logical_drive->nphysical_disks = nraid_map_entries;
1715
1716 qdepth = 0;
1717 for (i = 0; i < nraid_map_entries; i++) {
1718 logical_drive->phys_disk[i] = NULL;
1719 if (!logical_drive->offload_config)
1720 continue;
1721 for (j = 0; j < ndevices; j++) {
1722 if (dev[j] == NULL)
1723 continue;
1724 if (dev[j]->devtype != TYPE_DISK &&
1725 dev[j]->devtype != TYPE_ZBC)
1726 continue;
1727 if (is_logical_device(dev[j]))
1728 continue;
1729 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1730 continue;
1731
1732 logical_drive->phys_disk[i] = dev[j];
1733 if (i < nphys_disk)
1734 qdepth = min(h->nr_cmds, qdepth +
1735 logical_drive->phys_disk[i]->queue_depth);
1736 break;
1737 }
1738
1739 /*
1740 * This can happen if a physical drive is removed and
1741 * the logical drive is degraded. In that case, the RAID
1742 * map data will refer to a physical disk which isn't actually
1743 * present. And in that case offload_enabled should already
1744 * be 0, but we'll turn it off here just in case
1745 */
1746 if (!logical_drive->phys_disk[i]) {
1747 dev_warn(&h->pdev->dev,
1748 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1749 __func__,
1750 h->scsi_host->host_no, logical_drive->bus,
1751 logical_drive->target, logical_drive->lun);
1752 hpsa_turn_off_ioaccel_for_device(logical_drive);
1753 logical_drive->queue_depth = 8;
1754 }
1755 }
1756 if (nraid_map_entries)
1757 /*
1758 * This is correct for reads, too high for full stripe writes,
1759 * way too high for partial stripe writes
1760 */
1761 logical_drive->queue_depth = qdepth;
1762 else {
1763 if (logical_drive->external)
1764 logical_drive->queue_depth = EXTERNAL_QD;
1765 else
1766 logical_drive->queue_depth = h->nr_cmds;
1767 }
1768 }
1769
1770 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1771 struct hpsa_scsi_dev_t *dev[], int ndevices)
1772 {
1773 int i;
1774
1775 for (i = 0; i < ndevices; i++) {
1776 if (dev[i] == NULL)
1777 continue;
1778 if (dev[i]->devtype != TYPE_DISK &&
1779 dev[i]->devtype != TYPE_ZBC)
1780 continue;
1781 if (!is_logical_device(dev[i]))
1782 continue;
1783
1784 /*
1785 * If offload is currently enabled, the RAID map and
1786 * phys_disk[] assignment *better* not be changing
1787 * because we would be changing ioaccel phsy_disk[] pointers
1788 * on a ioaccel volume processing I/O requests.
1789 *
1790 * If an ioaccel volume status changed, initially because it was
1791 * re-configured and thus underwent a transformation, or
1792 * a drive failed, we would have received a state change
1793 * request and ioaccel should have been turned off. When the
1794 * transformation completes, we get another state change
1795 * request to turn ioaccel back on. In this case, we need
1796 * to update the ioaccel information.
1797 *
1798 * Thus: If it is not currently enabled, but will be after
1799 * the scan completes, make sure the ioaccel pointers
1800 * are up to date.
1801 */
1802
1803 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1804 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1805 }
1806 }
1807
1808 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1809 {
1810 int rc = 0;
1811
1812 if (!h->scsi_host)
1813 return 1;
1814
1815 if (is_logical_device(device)) /* RAID */
1816 rc = scsi_add_device(h->scsi_host, device->bus,
1817 device->target, device->lun);
1818 else /* HBA */
1819 rc = hpsa_add_sas_device(h->sas_host, device);
1820
1821 return rc;
1822 }
1823
1824 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1825 struct hpsa_scsi_dev_t *dev)
1826 {
1827 int i;
1828 int count = 0;
1829
1830 for (i = 0; i < h->nr_cmds; i++) {
1831 struct CommandList *c = h->cmd_pool + i;
1832 int refcount = atomic_inc_return(&c->refcount);
1833
1834 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1835 dev->scsi3addr)) {
1836 unsigned long flags;
1837
1838 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1839 if (!hpsa_is_cmd_idle(c))
1840 ++count;
1841 spin_unlock_irqrestore(&h->lock, flags);
1842 }
1843
1844 cmd_free(h, c);
1845 }
1846
1847 return count;
1848 }
1849
1850 #define NUM_WAIT 20
1851 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1852 struct hpsa_scsi_dev_t *device)
1853 {
1854 int cmds = 0;
1855 int waits = 0;
1856 int num_wait = NUM_WAIT;
1857
1858 if (device->external)
1859 num_wait = HPSA_EH_PTRAID_TIMEOUT;
1860
1861 while (1) {
1862 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1863 if (cmds == 0)
1864 break;
1865 if (++waits > num_wait)
1866 break;
1867 msleep(1000);
1868 }
1869
1870 if (waits > num_wait) {
1871 dev_warn(&h->pdev->dev,
1872 "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1873 __func__,
1874 h->scsi_host->host_no,
1875 device->bus, device->target, device->lun, cmds);
1876 }
1877 }
1878
1879 static void hpsa_remove_device(struct ctlr_info *h,
1880 struct hpsa_scsi_dev_t *device)
1881 {
1882 struct scsi_device *sdev = NULL;
1883
1884 if (!h->scsi_host)
1885 return;
1886
1887 /*
1888 * Allow for commands to drain
1889 */
1890 device->removed = 1;
1891 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1892
1893 if (is_logical_device(device)) { /* RAID */
1894 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1895 device->target, device->lun);
1896 if (sdev) {
1897 scsi_remove_device(sdev);
1898 scsi_device_put(sdev);
1899 } else {
1900 /*
1901 * We don't expect to get here. Future commands
1902 * to this device will get a selection timeout as
1903 * if the device were gone.
1904 */
1905 hpsa_show_dev_msg(KERN_WARNING, h, device,
1906 "didn't find device for removal.");
1907 }
1908 } else { /* HBA */
1909
1910 hpsa_remove_sas_device(device);
1911 }
1912 }
1913
1914 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1915 struct hpsa_scsi_dev_t *sd[], int nsds)
1916 {
1917 /* sd contains scsi3 addresses and devtypes, and inquiry
1918 * data. This function takes what's in sd to be the current
1919 * reality and updates h->dev[] to reflect that reality.
1920 */
1921 int i, entry, device_change, changes = 0;
1922 struct hpsa_scsi_dev_t *csd;
1923 unsigned long flags;
1924 struct hpsa_scsi_dev_t **added, **removed;
1925 int nadded, nremoved;
1926
1927 /*
1928 * A reset can cause a device status to change
1929 * re-schedule the scan to see what happened.
1930 */
1931 spin_lock_irqsave(&h->reset_lock, flags);
1932 if (h->reset_in_progress) {
1933 h->drv_req_rescan = 1;
1934 spin_unlock_irqrestore(&h->reset_lock, flags);
1935 return;
1936 }
1937 spin_unlock_irqrestore(&h->reset_lock, flags);
1938
1939 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
1940 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1941
1942 if (!added || !removed) {
1943 dev_warn(&h->pdev->dev, "out of memory in "
1944 "adjust_hpsa_scsi_table\n");
1945 goto free_and_out;
1946 }
1947
1948 spin_lock_irqsave(&h->devlock, flags);
1949
1950 /* find any devices in h->dev[] that are not in
1951 * sd[] and remove them from h->dev[], and for any
1952 * devices which have changed, remove the old device
1953 * info and add the new device info.
1954 * If minor device attributes change, just update
1955 * the existing device structure.
1956 */
1957 i = 0;
1958 nremoved = 0;
1959 nadded = 0;
1960 while (i < h->ndevices) {
1961 csd = h->dev[i];
1962 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1963 if (device_change == DEVICE_NOT_FOUND) {
1964 changes++;
1965 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1966 continue; /* remove ^^^, hence i not incremented */
1967 } else if (device_change == DEVICE_CHANGED) {
1968 changes++;
1969 hpsa_scsi_replace_entry(h, i, sd[entry],
1970 added, &nadded, removed, &nremoved);
1971 /* Set it to NULL to prevent it from being freed
1972 * at the bottom of hpsa_update_scsi_devices()
1973 */
1974 sd[entry] = NULL;
1975 } else if (device_change == DEVICE_UPDATED) {
1976 hpsa_scsi_update_entry(h, i, sd[entry]);
1977 }
1978 i++;
1979 }
1980
1981 /* Now, make sure every device listed in sd[] is also
1982 * listed in h->dev[], adding them if they aren't found
1983 */
1984
1985 for (i = 0; i < nsds; i++) {
1986 if (!sd[i]) /* if already added above. */
1987 continue;
1988
1989 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1990 * as the SCSI mid-layer does not handle such devices well.
1991 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1992 * at 160Hz, and prevents the system from coming up.
1993 */
1994 if (sd[i]->volume_offline) {
1995 hpsa_show_volume_status(h, sd[i]);
1996 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1997 continue;
1998 }
1999
2000 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
2001 h->ndevices, &entry);
2002 if (device_change == DEVICE_NOT_FOUND) {
2003 changes++;
2004 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
2005 break;
2006 sd[i] = NULL; /* prevent from being freed later. */
2007 } else if (device_change == DEVICE_CHANGED) {
2008 /* should never happen... */
2009 changes++;
2010 dev_warn(&h->pdev->dev,
2011 "device unexpectedly changed.\n");
2012 /* but if it does happen, we just ignore that device */
2013 }
2014 }
2015 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2016
2017 /*
2018 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2019 * any logical drives that need it enabled.
2020 *
2021 * The raid map should be current by now.
2022 *
2023 * We are updating the device list used for I/O requests.
2024 */
2025 for (i = 0; i < h->ndevices; i++) {
2026 if (h->dev[i] == NULL)
2027 continue;
2028 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2029 }
2030
2031 spin_unlock_irqrestore(&h->devlock, flags);
2032
2033 /* Monitor devices which are in one of several NOT READY states to be
2034 * brought online later. This must be done without holding h->devlock,
2035 * so don't touch h->dev[]
2036 */
2037 for (i = 0; i < nsds; i++) {
2038 if (!sd[i]) /* if already added above. */
2039 continue;
2040 if (sd[i]->volume_offline)
2041 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2042 }
2043
2044 /* Don't notify scsi mid layer of any changes the first time through
2045 * (or if there are no changes) scsi_scan_host will do it later the
2046 * first time through.
2047 */
2048 if (!changes)
2049 goto free_and_out;
2050
2051 /* Notify scsi mid layer of any removed devices */
2052 for (i = 0; i < nremoved; i++) {
2053 if (removed[i] == NULL)
2054 continue;
2055 if (removed[i]->expose_device)
2056 hpsa_remove_device(h, removed[i]);
2057 kfree(removed[i]);
2058 removed[i] = NULL;
2059 }
2060
2061 /* Notify scsi mid layer of any added devices */
2062 for (i = 0; i < nadded; i++) {
2063 int rc = 0;
2064
2065 if (added[i] == NULL)
2066 continue;
2067 if (!(added[i]->expose_device))
2068 continue;
2069 rc = hpsa_add_device(h, added[i]);
2070 if (!rc)
2071 continue;
2072 dev_warn(&h->pdev->dev,
2073 "addition failed %d, device not added.", rc);
2074 /* now we have to remove it from h->dev,
2075 * since it didn't get added to scsi mid layer
2076 */
2077 fixup_botched_add(h, added[i]);
2078 h->drv_req_rescan = 1;
2079 }
2080
2081 free_and_out:
2082 kfree(added);
2083 kfree(removed);
2084 }
2085
2086 /*
2087 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2088 * Assume's h->devlock is held.
2089 */
2090 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2091 int bus, int target, int lun)
2092 {
2093 int i;
2094 struct hpsa_scsi_dev_t *sd;
2095
2096 for (i = 0; i < h->ndevices; i++) {
2097 sd = h->dev[i];
2098 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2099 return sd;
2100 }
2101 return NULL;
2102 }
2103
2104 static int hpsa_slave_alloc(struct scsi_device *sdev)
2105 {
2106 struct hpsa_scsi_dev_t *sd = NULL;
2107 unsigned long flags;
2108 struct ctlr_info *h;
2109
2110 h = sdev_to_hba(sdev);
2111 spin_lock_irqsave(&h->devlock, flags);
2112 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2113 struct scsi_target *starget;
2114 struct sas_rphy *rphy;
2115
2116 starget = scsi_target(sdev);
2117 rphy = target_to_rphy(starget);
2118 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2119 if (sd) {
2120 sd->target = sdev_id(sdev);
2121 sd->lun = sdev->lun;
2122 }
2123 }
2124 if (!sd)
2125 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2126 sdev_id(sdev), sdev->lun);
2127
2128 if (sd && sd->expose_device) {
2129 atomic_set(&sd->ioaccel_cmds_out, 0);
2130 sdev->hostdata = sd;
2131 } else
2132 sdev->hostdata = NULL;
2133 spin_unlock_irqrestore(&h->devlock, flags);
2134 return 0;
2135 }
2136
2137 /* configure scsi device based on internal per-device structure */
2138 #define CTLR_TIMEOUT (120 * HZ)
2139 static int hpsa_slave_configure(struct scsi_device *sdev)
2140 {
2141 struct hpsa_scsi_dev_t *sd;
2142 int queue_depth;
2143
2144 sd = sdev->hostdata;
2145 sdev->no_uld_attach = !sd || !sd->expose_device;
2146
2147 if (sd) {
2148 sd->was_removed = 0;
2149 queue_depth = sd->queue_depth != 0 ?
2150 sd->queue_depth : sdev->host->can_queue;
2151 if (sd->external) {
2152 queue_depth = EXTERNAL_QD;
2153 sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2154 blk_queue_rq_timeout(sdev->request_queue,
2155 HPSA_EH_PTRAID_TIMEOUT);
2156 }
2157 if (is_hba_lunid(sd->scsi3addr)) {
2158 sdev->eh_timeout = CTLR_TIMEOUT;
2159 blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT);
2160 }
2161 } else {
2162 queue_depth = sdev->host->can_queue;
2163 }
2164
2165 scsi_change_queue_depth(sdev, queue_depth);
2166
2167 return 0;
2168 }
2169
2170 static void hpsa_slave_destroy(struct scsi_device *sdev)
2171 {
2172 struct hpsa_scsi_dev_t *hdev = NULL;
2173
2174 hdev = sdev->hostdata;
2175
2176 if (hdev)
2177 hdev->was_removed = 1;
2178 }
2179
2180 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2181 {
2182 int i;
2183
2184 if (!h->ioaccel2_cmd_sg_list)
2185 return;
2186 for (i = 0; i < h->nr_cmds; i++) {
2187 kfree(h->ioaccel2_cmd_sg_list[i]);
2188 h->ioaccel2_cmd_sg_list[i] = NULL;
2189 }
2190 kfree(h->ioaccel2_cmd_sg_list);
2191 h->ioaccel2_cmd_sg_list = NULL;
2192 }
2193
2194 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2195 {
2196 int i;
2197
2198 if (h->chainsize <= 0)
2199 return 0;
2200
2201 h->ioaccel2_cmd_sg_list =
2202 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2203 GFP_KERNEL);
2204 if (!h->ioaccel2_cmd_sg_list)
2205 return -ENOMEM;
2206 for (i = 0; i < h->nr_cmds; i++) {
2207 h->ioaccel2_cmd_sg_list[i] =
2208 kmalloc_array(h->maxsgentries,
2209 sizeof(*h->ioaccel2_cmd_sg_list[i]),
2210 GFP_KERNEL);
2211 if (!h->ioaccel2_cmd_sg_list[i])
2212 goto clean;
2213 }
2214 return 0;
2215
2216 clean:
2217 hpsa_free_ioaccel2_sg_chain_blocks(h);
2218 return -ENOMEM;
2219 }
2220
2221 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2222 {
2223 int i;
2224
2225 if (!h->cmd_sg_list)
2226 return;
2227 for (i = 0; i < h->nr_cmds; i++) {
2228 kfree(h->cmd_sg_list[i]);
2229 h->cmd_sg_list[i] = NULL;
2230 }
2231 kfree(h->cmd_sg_list);
2232 h->cmd_sg_list = NULL;
2233 }
2234
2235 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2236 {
2237 int i;
2238
2239 if (h->chainsize <= 0)
2240 return 0;
2241
2242 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
2243 GFP_KERNEL);
2244 if (!h->cmd_sg_list)
2245 return -ENOMEM;
2246
2247 for (i = 0; i < h->nr_cmds; i++) {
2248 h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2249 sizeof(*h->cmd_sg_list[i]),
2250 GFP_KERNEL);
2251 if (!h->cmd_sg_list[i])
2252 goto clean;
2253
2254 }
2255 return 0;
2256
2257 clean:
2258 hpsa_free_sg_chain_blocks(h);
2259 return -ENOMEM;
2260 }
2261
2262 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2263 struct io_accel2_cmd *cp, struct CommandList *c)
2264 {
2265 struct ioaccel2_sg_element *chain_block;
2266 u64 temp64;
2267 u32 chain_size;
2268
2269 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2270 chain_size = le32_to_cpu(cp->sg[0].length);
2271 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
2272 DMA_TO_DEVICE);
2273 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2274 /* prevent subsequent unmapping */
2275 cp->sg->address = 0;
2276 return -1;
2277 }
2278 cp->sg->address = cpu_to_le64(temp64);
2279 return 0;
2280 }
2281
2282 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2283 struct io_accel2_cmd *cp)
2284 {
2285 struct ioaccel2_sg_element *chain_sg;
2286 u64 temp64;
2287 u32 chain_size;
2288
2289 chain_sg = cp->sg;
2290 temp64 = le64_to_cpu(chain_sg->address);
2291 chain_size = le32_to_cpu(cp->sg[0].length);
2292 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2293 }
2294
2295 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2296 struct CommandList *c)
2297 {
2298 struct SGDescriptor *chain_sg, *chain_block;
2299 u64 temp64;
2300 u32 chain_len;
2301
2302 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2303 chain_block = h->cmd_sg_list[c->cmdindex];
2304 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2305 chain_len = sizeof(*chain_sg) *
2306 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2307 chain_sg->Len = cpu_to_le32(chain_len);
2308 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
2309 DMA_TO_DEVICE);
2310 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2311 /* prevent subsequent unmapping */
2312 chain_sg->Addr = cpu_to_le64(0);
2313 return -1;
2314 }
2315 chain_sg->Addr = cpu_to_le64(temp64);
2316 return 0;
2317 }
2318
2319 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2320 struct CommandList *c)
2321 {
2322 struct SGDescriptor *chain_sg;
2323
2324 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2325 return;
2326
2327 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2328 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
2329 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
2330 }
2331
2332
2333 /* Decode the various types of errors on ioaccel2 path.
2334 * Return 1 for any error that should generate a RAID path retry.
2335 * Return 0 for errors that don't require a RAID path retry.
2336 */
2337 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2338 struct CommandList *c,
2339 struct scsi_cmnd *cmd,
2340 struct io_accel2_cmd *c2,
2341 struct hpsa_scsi_dev_t *dev)
2342 {
2343 int data_len;
2344 int retry = 0;
2345 u32 ioaccel2_resid = 0;
2346
2347 switch (c2->error_data.serv_response) {
2348 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2349 switch (c2->error_data.status) {
2350 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2351 if (cmd)
2352 cmd->result = 0;
2353 break;
2354 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2355 cmd->result |= SAM_STAT_CHECK_CONDITION;
2356 if (c2->error_data.data_present !=
2357 IOACCEL2_SENSE_DATA_PRESENT) {
2358 memset(cmd->sense_buffer, 0,
2359 SCSI_SENSE_BUFFERSIZE);
2360 break;
2361 }
2362 /* copy the sense data */
2363 data_len = c2->error_data.sense_data_len;
2364 if (data_len > SCSI_SENSE_BUFFERSIZE)
2365 data_len = SCSI_SENSE_BUFFERSIZE;
2366 if (data_len > sizeof(c2->error_data.sense_data_buff))
2367 data_len =
2368 sizeof(c2->error_data.sense_data_buff);
2369 memcpy(cmd->sense_buffer,
2370 c2->error_data.sense_data_buff, data_len);
2371 retry = 1;
2372 break;
2373 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2374 retry = 1;
2375 break;
2376 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2377 retry = 1;
2378 break;
2379 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2380 retry = 1;
2381 break;
2382 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2383 retry = 1;
2384 break;
2385 default:
2386 retry = 1;
2387 break;
2388 }
2389 break;
2390 case IOACCEL2_SERV_RESPONSE_FAILURE:
2391 switch (c2->error_data.status) {
2392 case IOACCEL2_STATUS_SR_IO_ERROR:
2393 case IOACCEL2_STATUS_SR_IO_ABORTED:
2394 case IOACCEL2_STATUS_SR_OVERRUN:
2395 retry = 1;
2396 break;
2397 case IOACCEL2_STATUS_SR_UNDERRUN:
2398 cmd->result = (DID_OK << 16); /* host byte */
2399 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2400 ioaccel2_resid = get_unaligned_le32(
2401 &c2->error_data.resid_cnt[0]);
2402 scsi_set_resid(cmd, ioaccel2_resid);
2403 break;
2404 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2405 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2406 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2407 /*
2408 * Did an HBA disk disappear? We will eventually
2409 * get a state change event from the controller but
2410 * in the meantime, we need to tell the OS that the
2411 * HBA disk is no longer there and stop I/O
2412 * from going down. This allows the potential re-insert
2413 * of the disk to get the same device node.
2414 */
2415 if (dev->physical_device && dev->expose_device) {
2416 cmd->result = DID_NO_CONNECT << 16;
2417 dev->removed = 1;
2418 h->drv_req_rescan = 1;
2419 dev_warn(&h->pdev->dev,
2420 "%s: device is gone!\n", __func__);
2421 } else
2422 /*
2423 * Retry by sending down the RAID path.
2424 * We will get an event from ctlr to
2425 * trigger rescan regardless.
2426 */
2427 retry = 1;
2428 break;
2429 default:
2430 retry = 1;
2431 }
2432 break;
2433 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2434 break;
2435 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2436 break;
2437 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2438 retry = 1;
2439 break;
2440 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2441 break;
2442 default:
2443 retry = 1;
2444 break;
2445 }
2446
2447 if (dev->in_reset)
2448 retry = 0;
2449
2450 return retry; /* retry on raid path? */
2451 }
2452
2453 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2454 struct CommandList *c)
2455 {
2456 struct hpsa_scsi_dev_t *dev = c->device;
2457
2458 /*
2459 * Reset c->scsi_cmd here so that the reset handler will know
2460 * this command has completed. Then, check to see if the handler is
2461 * waiting for this command, and, if so, wake it.
2462 */
2463 c->scsi_cmd = SCSI_CMD_IDLE;
2464 mb(); /* Declare command idle before checking for pending events. */
2465 if (dev) {
2466 atomic_dec(&dev->commands_outstanding);
2467 if (dev->in_reset &&
2468 atomic_read(&dev->commands_outstanding) <= 0)
2469 wake_up_all(&h->event_sync_wait_queue);
2470 }
2471 }
2472
2473 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2474 struct CommandList *c)
2475 {
2476 hpsa_cmd_resolve_events(h, c);
2477 cmd_tagged_free(h, c);
2478 }
2479
2480 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2481 struct CommandList *c, struct scsi_cmnd *cmd)
2482 {
2483 hpsa_cmd_resolve_and_free(h, c);
2484 if (cmd && cmd->scsi_done)
2485 cmd->scsi_done(cmd);
2486 }
2487
2488 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2489 {
2490 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2491 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2492 }
2493
2494 static void process_ioaccel2_completion(struct ctlr_info *h,
2495 struct CommandList *c, struct scsi_cmnd *cmd,
2496 struct hpsa_scsi_dev_t *dev)
2497 {
2498 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2499
2500 /* check for good status */
2501 if (likely(c2->error_data.serv_response == 0 &&
2502 c2->error_data.status == 0)) {
2503 cmd->result = 0;
2504 return hpsa_cmd_free_and_done(h, c, cmd);
2505 }
2506
2507 /*
2508 * Any RAID offload error results in retry which will use
2509 * the normal I/O path so the controller can handle whatever is
2510 * wrong.
2511 */
2512 if (is_logical_device(dev) &&
2513 c2->error_data.serv_response ==
2514 IOACCEL2_SERV_RESPONSE_FAILURE) {
2515 if (c2->error_data.status ==
2516 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2517 hpsa_turn_off_ioaccel_for_device(dev);
2518 }
2519
2520 if (dev->in_reset) {
2521 cmd->result = DID_RESET << 16;
2522 return hpsa_cmd_free_and_done(h, c, cmd);
2523 }
2524
2525 return hpsa_retry_cmd(h, c);
2526 }
2527
2528 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2529 return hpsa_retry_cmd(h, c);
2530
2531 return hpsa_cmd_free_and_done(h, c, cmd);
2532 }
2533
2534 /* Returns 0 on success, < 0 otherwise. */
2535 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2536 struct CommandList *cp)
2537 {
2538 u8 tmf_status = cp->err_info->ScsiStatus;
2539
2540 switch (tmf_status) {
2541 case CISS_TMF_COMPLETE:
2542 /*
2543 * CISS_TMF_COMPLETE never happens, instead,
2544 * ei->CommandStatus == 0 for this case.
2545 */
2546 case CISS_TMF_SUCCESS:
2547 return 0;
2548 case CISS_TMF_INVALID_FRAME:
2549 case CISS_TMF_NOT_SUPPORTED:
2550 case CISS_TMF_FAILED:
2551 case CISS_TMF_WRONG_LUN:
2552 case CISS_TMF_OVERLAPPED_TAG:
2553 break;
2554 default:
2555 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2556 tmf_status);
2557 break;
2558 }
2559 return -tmf_status;
2560 }
2561
2562 static void complete_scsi_command(struct CommandList *cp)
2563 {
2564 struct scsi_cmnd *cmd;
2565 struct ctlr_info *h;
2566 struct ErrorInfo *ei;
2567 struct hpsa_scsi_dev_t *dev;
2568 struct io_accel2_cmd *c2;
2569
2570 u8 sense_key;
2571 u8 asc; /* additional sense code */
2572 u8 ascq; /* additional sense code qualifier */
2573 unsigned long sense_data_size;
2574
2575 ei = cp->err_info;
2576 cmd = cp->scsi_cmd;
2577 h = cp->h;
2578
2579 if (!cmd->device) {
2580 cmd->result = DID_NO_CONNECT << 16;
2581 return hpsa_cmd_free_and_done(h, cp, cmd);
2582 }
2583
2584 dev = cmd->device->hostdata;
2585 if (!dev) {
2586 cmd->result = DID_NO_CONNECT << 16;
2587 return hpsa_cmd_free_and_done(h, cp, cmd);
2588 }
2589 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2590
2591 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2592 if ((cp->cmd_type == CMD_SCSI) &&
2593 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2594 hpsa_unmap_sg_chain_block(h, cp);
2595
2596 if ((cp->cmd_type == CMD_IOACCEL2) &&
2597 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2598 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2599
2600 cmd->result = (DID_OK << 16); /* host byte */
2601 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2602
2603 /* SCSI command has already been cleaned up in SML */
2604 if (dev->was_removed) {
2605 hpsa_cmd_resolve_and_free(h, cp);
2606 return;
2607 }
2608
2609 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2610 if (dev->physical_device && dev->expose_device &&
2611 dev->removed) {
2612 cmd->result = DID_NO_CONNECT << 16;
2613 return hpsa_cmd_free_and_done(h, cp, cmd);
2614 }
2615 if (likely(cp->phys_disk != NULL))
2616 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2617 }
2618
2619 /*
2620 * We check for lockup status here as it may be set for
2621 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2622 * fail_all_oustanding_cmds()
2623 */
2624 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2625 /* DID_NO_CONNECT will prevent a retry */
2626 cmd->result = DID_NO_CONNECT << 16;
2627 return hpsa_cmd_free_and_done(h, cp, cmd);
2628 }
2629
2630 if (cp->cmd_type == CMD_IOACCEL2)
2631 return process_ioaccel2_completion(h, cp, cmd, dev);
2632
2633 scsi_set_resid(cmd, ei->ResidualCnt);
2634 if (ei->CommandStatus == 0)
2635 return hpsa_cmd_free_and_done(h, cp, cmd);
2636
2637 /* For I/O accelerator commands, copy over some fields to the normal
2638 * CISS header used below for error handling.
2639 */
2640 if (cp->cmd_type == CMD_IOACCEL1) {
2641 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2642 cp->Header.SGList = scsi_sg_count(cmd);
2643 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2644 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2645 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2646 cp->Header.tag = c->tag;
2647 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2648 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2649
2650 /* Any RAID offload error results in retry which will use
2651 * the normal I/O path so the controller can handle whatever's
2652 * wrong.
2653 */
2654 if (is_logical_device(dev)) {
2655 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2656 dev->offload_enabled = 0;
2657 return hpsa_retry_cmd(h, cp);
2658 }
2659 }
2660
2661 /* an error has occurred */
2662 switch (ei->CommandStatus) {
2663
2664 case CMD_TARGET_STATUS:
2665 cmd->result |= ei->ScsiStatus;
2666 /* copy the sense data */
2667 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2668 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2669 else
2670 sense_data_size = sizeof(ei->SenseInfo);
2671 if (ei->SenseLen < sense_data_size)
2672 sense_data_size = ei->SenseLen;
2673 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2674 if (ei->ScsiStatus)
2675 decode_sense_data(ei->SenseInfo, sense_data_size,
2676 &sense_key, &asc, &ascq);
2677 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2678 switch (sense_key) {
2679 case ABORTED_COMMAND:
2680 cmd->result |= DID_SOFT_ERROR << 16;
2681 break;
2682 case UNIT_ATTENTION:
2683 if (asc == 0x3F && ascq == 0x0E)
2684 h->drv_req_rescan = 1;
2685 break;
2686 case ILLEGAL_REQUEST:
2687 if (asc == 0x25 && ascq == 0x00) {
2688 dev->removed = 1;
2689 cmd->result = DID_NO_CONNECT << 16;
2690 }
2691 break;
2692 }
2693 break;
2694 }
2695 /* Problem was not a check condition
2696 * Pass it up to the upper layers...
2697 */
2698 if (ei->ScsiStatus) {
2699 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2700 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2701 "Returning result: 0x%x\n",
2702 cp, ei->ScsiStatus,
2703 sense_key, asc, ascq,
2704 cmd->result);
2705 } else { /* scsi status is zero??? How??? */
2706 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2707 "Returning no connection.\n", cp),
2708
2709 /* Ordinarily, this case should never happen,
2710 * but there is a bug in some released firmware
2711 * revisions that allows it to happen if, for
2712 * example, a 4100 backplane loses power and
2713 * the tape drive is in it. We assume that
2714 * it's a fatal error of some kind because we
2715 * can't show that it wasn't. We will make it
2716 * look like selection timeout since that is
2717 * the most common reason for this to occur,
2718 * and it's severe enough.
2719 */
2720
2721 cmd->result = DID_NO_CONNECT << 16;
2722 }
2723 break;
2724
2725 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2726 break;
2727 case CMD_DATA_OVERRUN:
2728 dev_warn(&h->pdev->dev,
2729 "CDB %16phN data overrun\n", cp->Request.CDB);
2730 break;
2731 case CMD_INVALID: {
2732 /* print_bytes(cp, sizeof(*cp), 1, 0);
2733 print_cmd(cp); */
2734 /* We get CMD_INVALID if you address a non-existent device
2735 * instead of a selection timeout (no response). You will
2736 * see this if you yank out a drive, then try to access it.
2737 * This is kind of a shame because it means that any other
2738 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2739 * missing target. */
2740 cmd->result = DID_NO_CONNECT << 16;
2741 }
2742 break;
2743 case CMD_PROTOCOL_ERR:
2744 cmd->result = DID_ERROR << 16;
2745 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2746 cp->Request.CDB);
2747 break;
2748 case CMD_HARDWARE_ERR:
2749 cmd->result = DID_ERROR << 16;
2750 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2751 cp->Request.CDB);
2752 break;
2753 case CMD_CONNECTION_LOST:
2754 cmd->result = DID_ERROR << 16;
2755 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2756 cp->Request.CDB);
2757 break;
2758 case CMD_ABORTED:
2759 cmd->result = DID_ABORT << 16;
2760 break;
2761 case CMD_ABORT_FAILED:
2762 cmd->result = DID_ERROR << 16;
2763 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2764 cp->Request.CDB);
2765 break;
2766 case CMD_UNSOLICITED_ABORT:
2767 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2768 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2769 cp->Request.CDB);
2770 break;
2771 case CMD_TIMEOUT:
2772 cmd->result = DID_TIME_OUT << 16;
2773 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2774 cp->Request.CDB);
2775 break;
2776 case CMD_UNABORTABLE:
2777 cmd->result = DID_ERROR << 16;
2778 dev_warn(&h->pdev->dev, "Command unabortable\n");
2779 break;
2780 case CMD_TMF_STATUS:
2781 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2782 cmd->result = DID_ERROR << 16;
2783 break;
2784 case CMD_IOACCEL_DISABLED:
2785 /* This only handles the direct pass-through case since RAID
2786 * offload is handled above. Just attempt a retry.
2787 */
2788 cmd->result = DID_SOFT_ERROR << 16;
2789 dev_warn(&h->pdev->dev,
2790 "cp %p had HP SSD Smart Path error\n", cp);
2791 break;
2792 default:
2793 cmd->result = DID_ERROR << 16;
2794 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2795 cp, ei->CommandStatus);
2796 }
2797
2798 return hpsa_cmd_free_and_done(h, cp, cmd);
2799 }
2800
2801 static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
2802 int sg_used, enum dma_data_direction data_direction)
2803 {
2804 int i;
2805
2806 for (i = 0; i < sg_used; i++)
2807 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
2808 le32_to_cpu(c->SG[i].Len),
2809 data_direction);
2810 }
2811
2812 static int hpsa_map_one(struct pci_dev *pdev,
2813 struct CommandList *cp,
2814 unsigned char *buf,
2815 size_t buflen,
2816 enum dma_data_direction data_direction)
2817 {
2818 u64 addr64;
2819
2820 if (buflen == 0 || data_direction == DMA_NONE) {
2821 cp->Header.SGList = 0;
2822 cp->Header.SGTotal = cpu_to_le16(0);
2823 return 0;
2824 }
2825
2826 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2827 if (dma_mapping_error(&pdev->dev, addr64)) {
2828 /* Prevent subsequent unmap of something never mapped */
2829 cp->Header.SGList = 0;
2830 cp->Header.SGTotal = cpu_to_le16(0);
2831 return -1;
2832 }
2833 cp->SG[0].Addr = cpu_to_le64(addr64);
2834 cp->SG[0].Len = cpu_to_le32(buflen);
2835 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2836 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2837 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2838 return 0;
2839 }
2840
2841 #define NO_TIMEOUT ((unsigned long) -1)
2842 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2843 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2844 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2845 {
2846 DECLARE_COMPLETION_ONSTACK(wait);
2847
2848 c->waiting = &wait;
2849 __enqueue_cmd_and_start_io(h, c, reply_queue);
2850 if (timeout_msecs == NO_TIMEOUT) {
2851 /* TODO: get rid of this no-timeout thing */
2852 wait_for_completion_io(&wait);
2853 return IO_OK;
2854 }
2855 if (!wait_for_completion_io_timeout(&wait,
2856 msecs_to_jiffies(timeout_msecs))) {
2857 dev_warn(&h->pdev->dev, "Command timed out.\n");
2858 return -ETIMEDOUT;
2859 }
2860 return IO_OK;
2861 }
2862
2863 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2864 int reply_queue, unsigned long timeout_msecs)
2865 {
2866 if (unlikely(lockup_detected(h))) {
2867 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2868 return IO_OK;
2869 }
2870 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2871 }
2872
2873 static u32 lockup_detected(struct ctlr_info *h)
2874 {
2875 int cpu;
2876 u32 rc, *lockup_detected;
2877
2878 cpu = get_cpu();
2879 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2880 rc = *lockup_detected;
2881 put_cpu();
2882 return rc;
2883 }
2884
2885 #define MAX_DRIVER_CMD_RETRIES 25
2886 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2887 struct CommandList *c, enum dma_data_direction data_direction,
2888 unsigned long timeout_msecs)
2889 {
2890 int backoff_time = 10, retry_count = 0;
2891 int rc;
2892
2893 do {
2894 memset(c->err_info, 0, sizeof(*c->err_info));
2895 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2896 timeout_msecs);
2897 if (rc)
2898 break;
2899 retry_count++;
2900 if (retry_count > 3) {
2901 msleep(backoff_time);
2902 if (backoff_time < 1000)
2903 backoff_time *= 2;
2904 }
2905 } while ((check_for_unit_attention(h, c) ||
2906 check_for_busy(h, c)) &&
2907 retry_count <= MAX_DRIVER_CMD_RETRIES);
2908 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2909 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2910 rc = -EIO;
2911 return rc;
2912 }
2913
2914 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2915 struct CommandList *c)
2916 {
2917 const u8 *cdb = c->Request.CDB;
2918 const u8 *lun = c->Header.LUN.LunAddrBytes;
2919
2920 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2921 txt, lun, cdb);
2922 }
2923
2924 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2925 struct CommandList *cp)
2926 {
2927 const struct ErrorInfo *ei = cp->err_info;
2928 struct device *d = &cp->h->pdev->dev;
2929 u8 sense_key, asc, ascq;
2930 int sense_len;
2931
2932 switch (ei->CommandStatus) {
2933 case CMD_TARGET_STATUS:
2934 if (ei->SenseLen > sizeof(ei->SenseInfo))
2935 sense_len = sizeof(ei->SenseInfo);
2936 else
2937 sense_len = ei->SenseLen;
2938 decode_sense_data(ei->SenseInfo, sense_len,
2939 &sense_key, &asc, &ascq);
2940 hpsa_print_cmd(h, "SCSI status", cp);
2941 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2942 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2943 sense_key, asc, ascq);
2944 else
2945 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2946 if (ei->ScsiStatus == 0)
2947 dev_warn(d, "SCSI status is abnormally zero. "
2948 "(probably indicates selection timeout "
2949 "reported incorrectly due to a known "
2950 "firmware bug, circa July, 2001.)\n");
2951 break;
2952 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2953 break;
2954 case CMD_DATA_OVERRUN:
2955 hpsa_print_cmd(h, "overrun condition", cp);
2956 break;
2957 case CMD_INVALID: {
2958 /* controller unfortunately reports SCSI passthru's
2959 * to non-existent targets as invalid commands.
2960 */
2961 hpsa_print_cmd(h, "invalid command", cp);
2962 dev_warn(d, "probably means device no longer present\n");
2963 }
2964 break;
2965 case CMD_PROTOCOL_ERR:
2966 hpsa_print_cmd(h, "protocol error", cp);
2967 break;
2968 case CMD_HARDWARE_ERR:
2969 hpsa_print_cmd(h, "hardware error", cp);
2970 break;
2971 case CMD_CONNECTION_LOST:
2972 hpsa_print_cmd(h, "connection lost", cp);
2973 break;
2974 case CMD_ABORTED:
2975 hpsa_print_cmd(h, "aborted", cp);
2976 break;
2977 case CMD_ABORT_FAILED:
2978 hpsa_print_cmd(h, "abort failed", cp);
2979 break;
2980 case CMD_UNSOLICITED_ABORT:
2981 hpsa_print_cmd(h, "unsolicited abort", cp);
2982 break;
2983 case CMD_TIMEOUT:
2984 hpsa_print_cmd(h, "timed out", cp);
2985 break;
2986 case CMD_UNABORTABLE:
2987 hpsa_print_cmd(h, "unabortable", cp);
2988 break;
2989 case CMD_CTLR_LOCKUP:
2990 hpsa_print_cmd(h, "controller lockup detected", cp);
2991 break;
2992 default:
2993 hpsa_print_cmd(h, "unknown status", cp);
2994 dev_warn(d, "Unknown command status %x\n",
2995 ei->CommandStatus);
2996 }
2997 }
2998
2999 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
3000 u8 page, u8 *buf, size_t bufsize)
3001 {
3002 int rc = IO_OK;
3003 struct CommandList *c;
3004 struct ErrorInfo *ei;
3005
3006 c = cmd_alloc(h);
3007 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
3008 page, scsi3addr, TYPE_CMD)) {
3009 rc = -1;
3010 goto out;
3011 }
3012 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3013 NO_TIMEOUT);
3014 if (rc)
3015 goto out;
3016 ei = c->err_info;
3017 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3018 hpsa_scsi_interpret_error(h, c);
3019 rc = -1;
3020 }
3021 out:
3022 cmd_free(h, c);
3023 return rc;
3024 }
3025
3026 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
3027 u8 *scsi3addr)
3028 {
3029 u8 *buf;
3030 u64 sa = 0;
3031 int rc = 0;
3032
3033 buf = kzalloc(1024, GFP_KERNEL);
3034 if (!buf)
3035 return 0;
3036
3037 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3038 buf, 1024);
3039
3040 if (rc)
3041 goto out;
3042
3043 sa = get_unaligned_be64(buf+12);
3044
3045 out:
3046 kfree(buf);
3047 return sa;
3048 }
3049
3050 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3051 u16 page, unsigned char *buf,
3052 unsigned char bufsize)
3053 {
3054 int rc = IO_OK;
3055 struct CommandList *c;
3056 struct ErrorInfo *ei;
3057
3058 c = cmd_alloc(h);
3059
3060 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3061 page, scsi3addr, TYPE_CMD)) {
3062 rc = -1;
3063 goto out;
3064 }
3065 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3066 NO_TIMEOUT);
3067 if (rc)
3068 goto out;
3069 ei = c->err_info;
3070 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3071 hpsa_scsi_interpret_error(h, c);
3072 rc = -1;
3073 }
3074 out:
3075 cmd_free(h, c);
3076 return rc;
3077 }
3078
3079 static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3080 u8 reset_type, int reply_queue)
3081 {
3082 int rc = IO_OK;
3083 struct CommandList *c;
3084 struct ErrorInfo *ei;
3085
3086 c = cmd_alloc(h);
3087 c->device = dev;
3088
3089 /* fill_cmd can't fail here, no data buffer to map. */
3090 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
3091 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3092 if (rc) {
3093 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3094 goto out;
3095 }
3096 /* no unmap needed here because no data xfer. */
3097
3098 ei = c->err_info;
3099 if (ei->CommandStatus != 0) {
3100 hpsa_scsi_interpret_error(h, c);
3101 rc = -1;
3102 }
3103 out:
3104 cmd_free(h, c);
3105 return rc;
3106 }
3107
3108 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3109 struct hpsa_scsi_dev_t *dev,
3110 unsigned char *scsi3addr)
3111 {
3112 int i;
3113 bool match = false;
3114 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3115 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3116
3117 if (hpsa_is_cmd_idle(c))
3118 return false;
3119
3120 switch (c->cmd_type) {
3121 case CMD_SCSI:
3122 case CMD_IOCTL_PEND:
3123 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3124 sizeof(c->Header.LUN.LunAddrBytes));
3125 break;
3126
3127 case CMD_IOACCEL1:
3128 case CMD_IOACCEL2:
3129 if (c->phys_disk == dev) {
3130 /* HBA mode match */
3131 match = true;
3132 } else {
3133 /* Possible RAID mode -- check each phys dev. */
3134 /* FIXME: Do we need to take out a lock here? If
3135 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3136 * instead. */
3137 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3138 /* FIXME: an alternate test might be
3139 *
3140 * match = dev->phys_disk[i]->ioaccel_handle
3141 * == c2->scsi_nexus; */
3142 match = dev->phys_disk[i] == c->phys_disk;
3143 }
3144 }
3145 break;
3146
3147 case IOACCEL2_TMF:
3148 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3149 match = dev->phys_disk[i]->ioaccel_handle ==
3150 le32_to_cpu(ac->it_nexus);
3151 }
3152 break;
3153
3154 case 0: /* The command is in the middle of being initialized. */
3155 match = false;
3156 break;
3157
3158 default:
3159 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3160 c->cmd_type);
3161 BUG();
3162 }
3163
3164 return match;
3165 }
3166
3167 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3168 u8 reset_type, int reply_queue)
3169 {
3170 int rc = 0;
3171
3172 /* We can really only handle one reset at a time */
3173 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3174 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3175 return -EINTR;
3176 }
3177
3178 rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3179 if (!rc) {
3180 /* incremented by sending the reset request */
3181 atomic_dec(&dev->commands_outstanding);
3182 wait_event(h->event_sync_wait_queue,
3183 atomic_read(&dev->commands_outstanding) <= 0 ||
3184 lockup_detected(h));
3185 }
3186
3187 if (unlikely(lockup_detected(h))) {
3188 dev_warn(&h->pdev->dev,
3189 "Controller lockup detected during reset wait\n");
3190 rc = -ENODEV;
3191 }
3192
3193 if (!rc)
3194 rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3195
3196 mutex_unlock(&h->reset_mutex);
3197 return rc;
3198 }
3199
3200 static void hpsa_get_raid_level(struct ctlr_info *h,
3201 unsigned char *scsi3addr, unsigned char *raid_level)
3202 {
3203 int rc;
3204 unsigned char *buf;
3205
3206 *raid_level = RAID_UNKNOWN;
3207 buf = kzalloc(64, GFP_KERNEL);
3208 if (!buf)
3209 return;
3210
3211 if (!hpsa_vpd_page_supported(h, scsi3addr,
3212 HPSA_VPD_LV_DEVICE_GEOMETRY))
3213 goto exit;
3214
3215 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3216 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3217
3218 if (rc == 0)
3219 *raid_level = buf[8];
3220 if (*raid_level > RAID_UNKNOWN)
3221 *raid_level = RAID_UNKNOWN;
3222 exit:
3223 kfree(buf);
3224 return;
3225 }
3226
3227 #define HPSA_MAP_DEBUG
3228 #ifdef HPSA_MAP_DEBUG
3229 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3230 struct raid_map_data *map_buff)
3231 {
3232 struct raid_map_disk_data *dd = &map_buff->data[0];
3233 int map, row, col;
3234 u16 map_cnt, row_cnt, disks_per_row;
3235
3236 if (rc != 0)
3237 return;
3238
3239 /* Show details only if debugging has been activated. */
3240 if (h->raid_offload_debug < 2)
3241 return;
3242
3243 dev_info(&h->pdev->dev, "structure_size = %u\n",
3244 le32_to_cpu(map_buff->structure_size));
3245 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3246 le32_to_cpu(map_buff->volume_blk_size));
3247 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3248 le64_to_cpu(map_buff->volume_blk_cnt));
3249 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3250 map_buff->phys_blk_shift);
3251 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3252 map_buff->parity_rotation_shift);
3253 dev_info(&h->pdev->dev, "strip_size = %u\n",
3254 le16_to_cpu(map_buff->strip_size));
3255 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3256 le64_to_cpu(map_buff->disk_starting_blk));
3257 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3258 le64_to_cpu(map_buff->disk_blk_cnt));
3259 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3260 le16_to_cpu(map_buff->data_disks_per_row));
3261 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3262 le16_to_cpu(map_buff->metadata_disks_per_row));
3263 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3264 le16_to_cpu(map_buff->row_cnt));
3265 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3266 le16_to_cpu(map_buff->layout_map_count));
3267 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3268 le16_to_cpu(map_buff->flags));
3269 dev_info(&h->pdev->dev, "encryption = %s\n",
3270 le16_to_cpu(map_buff->flags) &
3271 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3272 dev_info(&h->pdev->dev, "dekindex = %u\n",
3273 le16_to_cpu(map_buff->dekindex));
3274 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3275 for (map = 0; map < map_cnt; map++) {
3276 dev_info(&h->pdev->dev, "Map%u:\n", map);
3277 row_cnt = le16_to_cpu(map_buff->row_cnt);
3278 for (row = 0; row < row_cnt; row++) {
3279 dev_info(&h->pdev->dev, " Row%u:\n", row);
3280 disks_per_row =
3281 le16_to_cpu(map_buff->data_disks_per_row);
3282 for (col = 0; col < disks_per_row; col++, dd++)
3283 dev_info(&h->pdev->dev,
3284 " D%02u: h=0x%04x xor=%u,%u\n",
3285 col, dd->ioaccel_handle,
3286 dd->xor_mult[0], dd->xor_mult[1]);
3287 disks_per_row =
3288 le16_to_cpu(map_buff->metadata_disks_per_row);
3289 for (col = 0; col < disks_per_row; col++, dd++)
3290 dev_info(&h->pdev->dev,
3291 " M%02u: h=0x%04x xor=%u,%u\n",
3292 col, dd->ioaccel_handle,
3293 dd->xor_mult[0], dd->xor_mult[1]);
3294 }
3295 }
3296 }
3297 #else
3298 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3299 __attribute__((unused)) int rc,
3300 __attribute__((unused)) struct raid_map_data *map_buff)
3301 {
3302 }
3303 #endif
3304
3305 static int hpsa_get_raid_map(struct ctlr_info *h,
3306 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3307 {
3308 int rc = 0;
3309 struct CommandList *c;
3310 struct ErrorInfo *ei;
3311
3312 c = cmd_alloc(h);
3313
3314 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3315 sizeof(this_device->raid_map), 0,
3316 scsi3addr, TYPE_CMD)) {
3317 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3318 cmd_free(h, c);
3319 return -1;
3320 }
3321 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3322 NO_TIMEOUT);
3323 if (rc)
3324 goto out;
3325 ei = c->err_info;
3326 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3327 hpsa_scsi_interpret_error(h, c);
3328 rc = -1;
3329 goto out;
3330 }
3331 cmd_free(h, c);
3332
3333 /* @todo in the future, dynamically allocate RAID map memory */
3334 if (le32_to_cpu(this_device->raid_map.structure_size) >
3335 sizeof(this_device->raid_map)) {
3336 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3337 rc = -1;
3338 }
3339 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3340 return rc;
3341 out:
3342 cmd_free(h, c);
3343 return rc;
3344 }
3345
3346 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3347 unsigned char scsi3addr[], u16 bmic_device_index,
3348 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3349 {
3350 int rc = IO_OK;
3351 struct CommandList *c;
3352 struct ErrorInfo *ei;
3353
3354 c = cmd_alloc(h);
3355
3356 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3357 0, RAID_CTLR_LUNID, TYPE_CMD);
3358 if (rc)
3359 goto out;
3360
3361 c->Request.CDB[2] = bmic_device_index & 0xff;
3362 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3363
3364 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3365 NO_TIMEOUT);
3366 if (rc)
3367 goto out;
3368 ei = c->err_info;
3369 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3370 hpsa_scsi_interpret_error(h, c);
3371 rc = -1;
3372 }
3373 out:
3374 cmd_free(h, c);
3375 return rc;
3376 }
3377
3378 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3379 struct bmic_identify_controller *buf, size_t bufsize)
3380 {
3381 int rc = IO_OK;
3382 struct CommandList *c;
3383 struct ErrorInfo *ei;
3384
3385 c = cmd_alloc(h);
3386
3387 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3388 0, RAID_CTLR_LUNID, TYPE_CMD);
3389 if (rc)
3390 goto out;
3391
3392 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3393 NO_TIMEOUT);
3394 if (rc)
3395 goto out;
3396 ei = c->err_info;
3397 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3398 hpsa_scsi_interpret_error(h, c);
3399 rc = -1;
3400 }
3401 out:
3402 cmd_free(h, c);
3403 return rc;
3404 }
3405
3406 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3407 unsigned char scsi3addr[], u16 bmic_device_index,
3408 struct bmic_identify_physical_device *buf, size_t bufsize)
3409 {
3410 int rc = IO_OK;
3411 struct CommandList *c;
3412 struct ErrorInfo *ei;
3413
3414 c = cmd_alloc(h);
3415 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3416 0, RAID_CTLR_LUNID, TYPE_CMD);
3417 if (rc)
3418 goto out;
3419
3420 c->Request.CDB[2] = bmic_device_index & 0xff;
3421 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3422
3423 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3424 NO_TIMEOUT);
3425 ei = c->err_info;
3426 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3427 hpsa_scsi_interpret_error(h, c);
3428 rc = -1;
3429 }
3430 out:
3431 cmd_free(h, c);
3432
3433 return rc;
3434 }
3435
3436 /*
3437 * get enclosure information
3438 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3439 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3440 * Uses id_physical_device to determine the box_index.
3441 */
3442 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3443 unsigned char *scsi3addr,
3444 struct ReportExtendedLUNdata *rlep, int rle_index,
3445 struct hpsa_scsi_dev_t *encl_dev)
3446 {
3447 int rc = -1;
3448 struct CommandList *c = NULL;
3449 struct ErrorInfo *ei = NULL;
3450 struct bmic_sense_storage_box_params *bssbp = NULL;
3451 struct bmic_identify_physical_device *id_phys = NULL;
3452 struct ext_report_lun_entry *rle;
3453 u16 bmic_device_index = 0;
3454
3455 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
3456 return;
3457
3458 rle = &rlep->LUN[rle_index];
3459
3460 encl_dev->eli =
3461 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3462
3463 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3464
3465 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3466 rc = IO_OK;
3467 goto out;
3468 }
3469
3470 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3471 rc = IO_OK;
3472 goto out;
3473 }
3474
3475 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3476 if (!bssbp)
3477 goto out;
3478
3479 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3480 if (!id_phys)
3481 goto out;
3482
3483 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3484 id_phys, sizeof(*id_phys));
3485 if (rc) {
3486 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3487 __func__, encl_dev->external, bmic_device_index);
3488 goto out;
3489 }
3490
3491 c = cmd_alloc(h);
3492
3493 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3494 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3495
3496 if (rc)
3497 goto out;
3498
3499 if (id_phys->phys_connector[1] == 'E')
3500 c->Request.CDB[5] = id_phys->box_index;
3501 else
3502 c->Request.CDB[5] = 0;
3503
3504 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3505 NO_TIMEOUT);
3506 if (rc)
3507 goto out;
3508
3509 ei = c->err_info;
3510 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3511 rc = -1;
3512 goto out;
3513 }
3514
3515 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3516 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3517 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3518
3519 rc = IO_OK;
3520 out:
3521 kfree(bssbp);
3522 kfree(id_phys);
3523
3524 if (c)
3525 cmd_free(h, c);
3526
3527 if (rc != IO_OK)
3528 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3529 "Error, could not get enclosure information");
3530 }
3531
3532 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3533 unsigned char *scsi3addr)
3534 {
3535 struct ReportExtendedLUNdata *physdev;
3536 u32 nphysicals;
3537 u64 sa = 0;
3538 int i;
3539
3540 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3541 if (!physdev)
3542 return 0;
3543
3544 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3545 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3546 kfree(physdev);
3547 return 0;
3548 }
3549 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3550
3551 for (i = 0; i < nphysicals; i++)
3552 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3553 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3554 break;
3555 }
3556
3557 kfree(physdev);
3558
3559 return sa;
3560 }
3561
3562 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3563 struct hpsa_scsi_dev_t *dev)
3564 {
3565 int rc;
3566 u64 sa = 0;
3567
3568 if (is_hba_lunid(scsi3addr)) {
3569 struct bmic_sense_subsystem_info *ssi;
3570
3571 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3572 if (!ssi)
3573 return;
3574
3575 rc = hpsa_bmic_sense_subsystem_information(h,
3576 scsi3addr, 0, ssi, sizeof(*ssi));
3577 if (rc == 0) {
3578 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3579 h->sas_address = sa;
3580 }
3581
3582 kfree(ssi);
3583 } else
3584 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3585
3586 dev->sas_address = sa;
3587 }
3588
3589 static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3590 struct ReportExtendedLUNdata *physdev)
3591 {
3592 u32 nphysicals;
3593 int i;
3594
3595 if (h->discovery_polling)
3596 return;
3597
3598 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3599
3600 for (i = 0; i < nphysicals; i++) {
3601 if (physdev->LUN[i].device_type ==
3602 BMIC_DEVICE_TYPE_CONTROLLER
3603 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3604 dev_info(&h->pdev->dev,
3605 "External controller present, activate discovery polling and disable rld caching\n");
3606 hpsa_disable_rld_caching(h);
3607 h->discovery_polling = 1;
3608 break;
3609 }
3610 }
3611 }
3612
3613 /* Get a device id from inquiry page 0x83 */
3614 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3615 unsigned char scsi3addr[], u8 page)
3616 {
3617 int rc;
3618 int i;
3619 int pages;
3620 unsigned char *buf, bufsize;
3621
3622 buf = kzalloc(256, GFP_KERNEL);
3623 if (!buf)
3624 return false;
3625
3626 /* Get the size of the page list first */
3627 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3628 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3629 buf, HPSA_VPD_HEADER_SZ);
3630 if (rc != 0)
3631 goto exit_unsupported;
3632 pages = buf[3];
3633 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3634 bufsize = pages + HPSA_VPD_HEADER_SZ;
3635 else
3636 bufsize = 255;
3637
3638 /* Get the whole VPD page list */
3639 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3640 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3641 buf, bufsize);
3642 if (rc != 0)
3643 goto exit_unsupported;
3644
3645 pages = buf[3];
3646 for (i = 1; i <= pages; i++)
3647 if (buf[3 + i] == page)
3648 goto exit_supported;
3649 exit_unsupported:
3650 kfree(buf);
3651 return false;
3652 exit_supported:
3653 kfree(buf);
3654 return true;
3655 }
3656
3657 /*
3658 * Called during a scan operation.
3659 * Sets ioaccel status on the new device list, not the existing device list
3660 *
3661 * The device list used during I/O will be updated later in
3662 * adjust_hpsa_scsi_table.
3663 */
3664 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3665 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3666 {
3667 int rc;
3668 unsigned char *buf;
3669 u8 ioaccel_status;
3670
3671 this_device->offload_config = 0;
3672 this_device->offload_enabled = 0;
3673 this_device->offload_to_be_enabled = 0;
3674
3675 buf = kzalloc(64, GFP_KERNEL);
3676 if (!buf)
3677 return;
3678 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3679 goto out;
3680 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3681 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3682 if (rc != 0)
3683 goto out;
3684
3685 #define IOACCEL_STATUS_BYTE 4
3686 #define OFFLOAD_CONFIGURED_BIT 0x01
3687 #define OFFLOAD_ENABLED_BIT 0x02
3688 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3689 this_device->offload_config =
3690 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3691 if (this_device->offload_config) {
3692 bool offload_enabled =
3693 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3694 /*
3695 * Check to see if offload can be enabled.
3696 */
3697 if (offload_enabled) {
3698 rc = hpsa_get_raid_map(h, scsi3addr, this_device);
3699 if (rc) /* could not load raid_map */
3700 goto out;
3701 this_device->offload_to_be_enabled = 1;
3702 }
3703 }
3704
3705 out:
3706 kfree(buf);
3707 return;
3708 }
3709
3710 /* Get the device id from inquiry page 0x83 */
3711 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3712 unsigned char *device_id, int index, int buflen)
3713 {
3714 int rc;
3715 unsigned char *buf;
3716
3717 /* Does controller have VPD for device id? */
3718 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3719 return 1; /* not supported */
3720
3721 buf = kzalloc(64, GFP_KERNEL);
3722 if (!buf)
3723 return -ENOMEM;
3724
3725 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3726 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3727 if (rc == 0) {
3728 if (buflen > 16)
3729 buflen = 16;
3730 memcpy(device_id, &buf[8], buflen);
3731 }
3732
3733 kfree(buf);
3734
3735 return rc; /*0 - got id, otherwise, didn't */
3736 }
3737
3738 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3739 void *buf, int bufsize,
3740 int extended_response)
3741 {
3742 int rc = IO_OK;
3743 struct CommandList *c;
3744 unsigned char scsi3addr[8];
3745 struct ErrorInfo *ei;
3746
3747 c = cmd_alloc(h);
3748
3749 /* address the controller */
3750 memset(scsi3addr, 0, sizeof(scsi3addr));
3751 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3752 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3753 rc = -EAGAIN;
3754 goto out;
3755 }
3756 if (extended_response)
3757 c->Request.CDB[1] = extended_response;
3758 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3759 NO_TIMEOUT);
3760 if (rc)
3761 goto out;
3762 ei = c->err_info;
3763 if (ei->CommandStatus != 0 &&
3764 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3765 hpsa_scsi_interpret_error(h, c);
3766 rc = -EIO;
3767 } else {
3768 struct ReportLUNdata *rld = buf;
3769
3770 if (rld->extended_response_flag != extended_response) {
3771 if (!h->legacy_board) {
3772 dev_err(&h->pdev->dev,
3773 "report luns requested format %u, got %u\n",
3774 extended_response,
3775 rld->extended_response_flag);
3776 rc = -EINVAL;
3777 } else
3778 rc = -EOPNOTSUPP;
3779 }
3780 }
3781 out:
3782 cmd_free(h, c);
3783 return rc;
3784 }
3785
3786 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3787 struct ReportExtendedLUNdata *buf, int bufsize)
3788 {
3789 int rc;
3790 struct ReportLUNdata *lbuf;
3791
3792 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3793 HPSA_REPORT_PHYS_EXTENDED);
3794 if (!rc || rc != -EOPNOTSUPP)
3795 return rc;
3796
3797 /* REPORT PHYS EXTENDED is not supported */
3798 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3799 if (!lbuf)
3800 return -ENOMEM;
3801
3802 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3803 if (!rc) {
3804 int i;
3805 u32 nphys;
3806
3807 /* Copy ReportLUNdata header */
3808 memcpy(buf, lbuf, 8);
3809 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3810 for (i = 0; i < nphys; i++)
3811 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3812 }
3813 kfree(lbuf);
3814 return rc;
3815 }
3816
3817 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3818 struct ReportLUNdata *buf, int bufsize)
3819 {
3820 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3821 }
3822
3823 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3824 int bus, int target, int lun)
3825 {
3826 device->bus = bus;
3827 device->target = target;
3828 device->lun = lun;
3829 }
3830
3831 /* Use VPD inquiry to get details of volume status */
3832 static int hpsa_get_volume_status(struct ctlr_info *h,
3833 unsigned char scsi3addr[])
3834 {
3835 int rc;
3836 int status;
3837 int size;
3838 unsigned char *buf;
3839
3840 buf = kzalloc(64, GFP_KERNEL);
3841 if (!buf)
3842 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3843
3844 /* Does controller have VPD for logical volume status? */
3845 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3846 goto exit_failed;
3847
3848 /* Get the size of the VPD return buffer */
3849 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3850 buf, HPSA_VPD_HEADER_SZ);
3851 if (rc != 0)
3852 goto exit_failed;
3853 size = buf[3];
3854
3855 /* Now get the whole VPD buffer */
3856 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3857 buf, size + HPSA_VPD_HEADER_SZ);
3858 if (rc != 0)
3859 goto exit_failed;
3860 status = buf[4]; /* status byte */
3861
3862 kfree(buf);
3863 return status;
3864 exit_failed:
3865 kfree(buf);
3866 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3867 }
3868
3869 /* Determine offline status of a volume.
3870 * Return either:
3871 * 0 (not offline)
3872 * 0xff (offline for unknown reasons)
3873 * # (integer code indicating one of several NOT READY states
3874 * describing why a volume is to be kept offline)
3875 */
3876 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3877 unsigned char scsi3addr[])
3878 {
3879 struct CommandList *c;
3880 unsigned char *sense;
3881 u8 sense_key, asc, ascq;
3882 int sense_len;
3883 int rc, ldstat = 0;
3884 #define ASC_LUN_NOT_READY 0x04
3885 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3886 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3887
3888 c = cmd_alloc(h);
3889
3890 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3891 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3892 NO_TIMEOUT);
3893 if (rc) {
3894 cmd_free(h, c);
3895 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3896 }
3897 sense = c->err_info->SenseInfo;
3898 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3899 sense_len = sizeof(c->err_info->SenseInfo);
3900 else
3901 sense_len = c->err_info->SenseLen;
3902 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3903 cmd_free(h, c);
3904
3905 /* Determine the reason for not ready state */
3906 ldstat = hpsa_get_volume_status(h, scsi3addr);
3907
3908 /* Keep volume offline in certain cases: */
3909 switch (ldstat) {
3910 case HPSA_LV_FAILED:
3911 case HPSA_LV_UNDERGOING_ERASE:
3912 case HPSA_LV_NOT_AVAILABLE:
3913 case HPSA_LV_UNDERGOING_RPI:
3914 case HPSA_LV_PENDING_RPI:
3915 case HPSA_LV_ENCRYPTED_NO_KEY:
3916 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3917 case HPSA_LV_UNDERGOING_ENCRYPTION:
3918 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3919 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3920 return ldstat;
3921 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3922 /* If VPD status page isn't available,
3923 * use ASC/ASCQ to determine state
3924 */
3925 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3926 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3927 return ldstat;
3928 break;
3929 default:
3930 break;
3931 }
3932 return HPSA_LV_OK;
3933 }
3934
3935 static int hpsa_update_device_info(struct ctlr_info *h,
3936 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3937 unsigned char *is_OBDR_device)
3938 {
3939
3940 #define OBDR_SIG_OFFSET 43
3941 #define OBDR_TAPE_SIG "$DR-10"
3942 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3943 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3944
3945 unsigned char *inq_buff;
3946 unsigned char *obdr_sig;
3947 int rc = 0;
3948
3949 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3950 if (!inq_buff) {
3951 rc = -ENOMEM;
3952 goto bail_out;
3953 }
3954
3955 /* Do an inquiry to the device to see what it is. */
3956 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3957 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3958 dev_err(&h->pdev->dev,
3959 "%s: inquiry failed, device will be skipped.\n",
3960 __func__);
3961 rc = HPSA_INQUIRY_FAILED;
3962 goto bail_out;
3963 }
3964
3965 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3966 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3967
3968 this_device->devtype = (inq_buff[0] & 0x1f);
3969 memcpy(this_device->scsi3addr, scsi3addr, 8);
3970 memcpy(this_device->vendor, &inq_buff[8],
3971 sizeof(this_device->vendor));
3972 memcpy(this_device->model, &inq_buff[16],
3973 sizeof(this_device->model));
3974 this_device->rev = inq_buff[2];
3975 memset(this_device->device_id, 0,
3976 sizeof(this_device->device_id));
3977 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3978 sizeof(this_device->device_id)) < 0) {
3979 dev_err(&h->pdev->dev,
3980 "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
3981 h->ctlr, __func__,
3982 h->scsi_host->host_no,
3983 this_device->bus, this_device->target,
3984 this_device->lun,
3985 scsi_device_type(this_device->devtype),
3986 this_device->model);
3987 rc = HPSA_LV_FAILED;
3988 goto bail_out;
3989 }
3990
3991 if ((this_device->devtype == TYPE_DISK ||
3992 this_device->devtype == TYPE_ZBC) &&
3993 is_logical_dev_addr_mode(scsi3addr)) {
3994 unsigned char volume_offline;
3995
3996 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3997 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3998 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3999 volume_offline = hpsa_volume_offline(h, scsi3addr);
4000 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
4001 h->legacy_board) {
4002 /*
4003 * Legacy boards might not support volume status
4004 */
4005 dev_info(&h->pdev->dev,
4006 "C0:T%d:L%d Volume status not available, assuming online.\n",
4007 this_device->target, this_device->lun);
4008 volume_offline = 0;
4009 }
4010 this_device->volume_offline = volume_offline;
4011 if (volume_offline == HPSA_LV_FAILED) {
4012 rc = HPSA_LV_FAILED;
4013 dev_err(&h->pdev->dev,
4014 "%s: LV failed, device will be skipped.\n",
4015 __func__);
4016 goto bail_out;
4017 }
4018 } else {
4019 this_device->raid_level = RAID_UNKNOWN;
4020 this_device->offload_config = 0;
4021 hpsa_turn_off_ioaccel_for_device(this_device);
4022 this_device->hba_ioaccel_enabled = 0;
4023 this_device->volume_offline = 0;
4024 this_device->queue_depth = h->nr_cmds;
4025 }
4026
4027 if (this_device->external)
4028 this_device->queue_depth = EXTERNAL_QD;
4029
4030 if (is_OBDR_device) {
4031 /* See if this is a One-Button-Disaster-Recovery device
4032 * by looking for "$DR-10" at offset 43 in inquiry data.
4033 */
4034 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4035 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4036 strncmp(obdr_sig, OBDR_TAPE_SIG,
4037 OBDR_SIG_LEN) == 0);
4038 }
4039 kfree(inq_buff);
4040 return 0;
4041
4042 bail_out:
4043 kfree(inq_buff);
4044 return rc;
4045 }
4046
4047 /*
4048 * Helper function to assign bus, target, lun mapping of devices.
4049 * Logical drive target and lun are assigned at this time, but
4050 * physical device lun and target assignment are deferred (assigned
4051 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4052 */
4053 static void figure_bus_target_lun(struct ctlr_info *h,
4054 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4055 {
4056 u32 lunid = get_unaligned_le32(lunaddrbytes);
4057
4058 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4059 /* physical device, target and lun filled in later */
4060 if (is_hba_lunid(lunaddrbytes)) {
4061 int bus = HPSA_HBA_BUS;
4062
4063 if (!device->rev)
4064 bus = HPSA_LEGACY_HBA_BUS;
4065 hpsa_set_bus_target_lun(device,
4066 bus, 0, lunid & 0x3fff);
4067 } else
4068 /* defer target, lun assignment for physical devices */
4069 hpsa_set_bus_target_lun(device,
4070 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4071 return;
4072 }
4073 /* It's a logical device */
4074 if (device->external) {
4075 hpsa_set_bus_target_lun(device,
4076 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4077 lunid & 0x00ff);
4078 return;
4079 }
4080 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4081 0, lunid & 0x3fff);
4082 }
4083
4084 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4085 int i, int nphysicals, int nlocal_logicals)
4086 {
4087 /* In report logicals, local logicals are listed first,
4088 * then any externals.
4089 */
4090 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4091
4092 if (i == raid_ctlr_position)
4093 return 0;
4094
4095 if (i < logicals_start)
4096 return 0;
4097
4098 /* i is in logicals range, but still within local logicals */
4099 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4100 return 0;
4101
4102 return 1; /* it's an external lun */
4103 }
4104
4105 /*
4106 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4107 * logdev. The number of luns in physdev and logdev are returned in
4108 * *nphysicals and *nlogicals, respectively.
4109 * Returns 0 on success, -1 otherwise.
4110 */
4111 static int hpsa_gather_lun_info(struct ctlr_info *h,
4112 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4113 struct ReportLUNdata *logdev, u32 *nlogicals)
4114 {
4115 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4116 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4117 return -1;
4118 }
4119 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4120 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4121 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4122 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4123 *nphysicals = HPSA_MAX_PHYS_LUN;
4124 }
4125 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4126 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4127 return -1;
4128 }
4129 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4130 /* Reject Logicals in excess of our max capability. */
4131 if (*nlogicals > HPSA_MAX_LUN) {
4132 dev_warn(&h->pdev->dev,
4133 "maximum logical LUNs (%d) exceeded. "
4134 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4135 *nlogicals - HPSA_MAX_LUN);
4136 *nlogicals = HPSA_MAX_LUN;
4137 }
4138 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4139 dev_warn(&h->pdev->dev,
4140 "maximum logical + physical LUNs (%d) exceeded. "
4141 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4142 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4143 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4144 }
4145 return 0;
4146 }
4147
4148 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4149 int i, int nphysicals, int nlogicals,
4150 struct ReportExtendedLUNdata *physdev_list,
4151 struct ReportLUNdata *logdev_list)
4152 {
4153 /* Helper function, figure out where the LUN ID info is coming from
4154 * given index i, lists of physical and logical devices, where in
4155 * the list the raid controller is supposed to appear (first or last)
4156 */
4157
4158 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4159 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4160
4161 if (i == raid_ctlr_position)
4162 return RAID_CTLR_LUNID;
4163
4164 if (i < logicals_start)
4165 return &physdev_list->LUN[i -
4166 (raid_ctlr_position == 0)].lunid[0];
4167
4168 if (i < last_device)
4169 return &logdev_list->LUN[i - nphysicals -
4170 (raid_ctlr_position == 0)][0];
4171 BUG();
4172 return NULL;
4173 }
4174
4175 /* get physical drive ioaccel handle and queue depth */
4176 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4177 struct hpsa_scsi_dev_t *dev,
4178 struct ReportExtendedLUNdata *rlep, int rle_index,
4179 struct bmic_identify_physical_device *id_phys)
4180 {
4181 int rc;
4182 struct ext_report_lun_entry *rle;
4183
4184 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4185 return;
4186
4187 rle = &rlep->LUN[rle_index];
4188
4189 dev->ioaccel_handle = rle->ioaccel_handle;
4190 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4191 dev->hba_ioaccel_enabled = 1;
4192 memset(id_phys, 0, sizeof(*id_phys));
4193 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4194 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4195 sizeof(*id_phys));
4196 if (!rc)
4197 /* Reserve space for FW operations */
4198 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4199 #define DRIVE_QUEUE_DEPTH 7
4200 dev->queue_depth =
4201 le16_to_cpu(id_phys->current_queue_depth_limit) -
4202 DRIVE_CMDS_RESERVED_FOR_FW;
4203 else
4204 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4205 }
4206
4207 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4208 struct ReportExtendedLUNdata *rlep, int rle_index,
4209 struct bmic_identify_physical_device *id_phys)
4210 {
4211 struct ext_report_lun_entry *rle;
4212
4213 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4214 return;
4215
4216 rle = &rlep->LUN[rle_index];
4217
4218 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4219 this_device->hba_ioaccel_enabled = 1;
4220
4221 memcpy(&this_device->active_path_index,
4222 &id_phys->active_path_number,
4223 sizeof(this_device->active_path_index));
4224 memcpy(&this_device->path_map,
4225 &id_phys->redundant_path_present_map,
4226 sizeof(this_device->path_map));
4227 memcpy(&this_device->box,
4228 &id_phys->alternate_paths_phys_box_on_port,
4229 sizeof(this_device->box));
4230 memcpy(&this_device->phys_connector,
4231 &id_phys->alternate_paths_phys_connector,
4232 sizeof(this_device->phys_connector));
4233 memcpy(&this_device->bay,
4234 &id_phys->phys_bay_in_box,
4235 sizeof(this_device->bay));
4236 }
4237
4238 /* get number of local logical disks. */
4239 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4240 struct bmic_identify_controller *id_ctlr,
4241 u32 *nlocals)
4242 {
4243 int rc;
4244
4245 if (!id_ctlr) {
4246 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4247 __func__);
4248 return -ENOMEM;
4249 }
4250 memset(id_ctlr, 0, sizeof(*id_ctlr));
4251 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4252 if (!rc)
4253 if (id_ctlr->configured_logical_drive_count < 255)
4254 *nlocals = id_ctlr->configured_logical_drive_count;
4255 else
4256 *nlocals = le16_to_cpu(
4257 id_ctlr->extended_logical_unit_count);
4258 else
4259 *nlocals = -1;
4260 return rc;
4261 }
4262
4263 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4264 {
4265 struct bmic_identify_physical_device *id_phys;
4266 bool is_spare = false;
4267 int rc;
4268
4269 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4270 if (!id_phys)
4271 return false;
4272
4273 rc = hpsa_bmic_id_physical_device(h,
4274 lunaddrbytes,
4275 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4276 id_phys, sizeof(*id_phys));
4277 if (rc == 0)
4278 is_spare = (id_phys->more_flags >> 6) & 0x01;
4279
4280 kfree(id_phys);
4281 return is_spare;
4282 }
4283
4284 #define RPL_DEV_FLAG_NON_DISK 0x1
4285 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4286 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4287
4288 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4289
4290 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4291 struct ext_report_lun_entry *rle)
4292 {
4293 u8 device_flags;
4294 u8 device_type;
4295
4296 if (!MASKED_DEVICE(lunaddrbytes))
4297 return false;
4298
4299 device_flags = rle->device_flags;
4300 device_type = rle->device_type;
4301
4302 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4303 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4304 return false;
4305 return true;
4306 }
4307
4308 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4309 return false;
4310
4311 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4312 return false;
4313
4314 /*
4315 * Spares may be spun down, we do not want to
4316 * do an Inquiry to a RAID set spare drive as
4317 * that would have them spun up, that is a
4318 * performance hit because I/O to the RAID device
4319 * stops while the spin up occurs which can take
4320 * over 50 seconds.
4321 */
4322 if (hpsa_is_disk_spare(h, lunaddrbytes))
4323 return true;
4324
4325 return false;
4326 }
4327
4328 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4329 {
4330 /* the idea here is we could get notified
4331 * that some devices have changed, so we do a report
4332 * physical luns and report logical luns cmd, and adjust
4333 * our list of devices accordingly.
4334 *
4335 * The scsi3addr's of devices won't change so long as the
4336 * adapter is not reset. That means we can rescan and
4337 * tell which devices we already know about, vs. new
4338 * devices, vs. disappearing devices.
4339 */
4340 struct ReportExtendedLUNdata *physdev_list = NULL;
4341 struct ReportLUNdata *logdev_list = NULL;
4342 struct bmic_identify_physical_device *id_phys = NULL;
4343 struct bmic_identify_controller *id_ctlr = NULL;
4344 u32 nphysicals = 0;
4345 u32 nlogicals = 0;
4346 u32 nlocal_logicals = 0;
4347 u32 ndev_allocated = 0;
4348 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4349 int ncurrent = 0;
4350 int i, ndevs_to_allocate;
4351 int raid_ctlr_position;
4352 bool physical_device;
4353 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4354
4355 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
4356 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4357 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4358 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4359 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4360 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4361
4362 if (!currentsd || !physdev_list || !logdev_list ||
4363 !tmpdevice || !id_phys || !id_ctlr) {
4364 dev_err(&h->pdev->dev, "out of memory\n");
4365 goto out;
4366 }
4367 memset(lunzerobits, 0, sizeof(lunzerobits));
4368
4369 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4370
4371 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4372 logdev_list, &nlogicals)) {
4373 h->drv_req_rescan = 1;
4374 goto out;
4375 }
4376
4377 /* Set number of local logicals (non PTRAID) */
4378 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4379 dev_warn(&h->pdev->dev,
4380 "%s: Can't determine number of local logical devices.\n",
4381 __func__);
4382 }
4383
4384 /* We might see up to the maximum number of logical and physical disks
4385 * plus external target devices, and a device for the local RAID
4386 * controller.
4387 */
4388 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4389
4390 hpsa_ext_ctrl_present(h, physdev_list);
4391
4392 /* Allocate the per device structures */
4393 for (i = 0; i < ndevs_to_allocate; i++) {
4394 if (i >= HPSA_MAX_DEVICES) {
4395 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4396 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4397 ndevs_to_allocate - HPSA_MAX_DEVICES);
4398 break;
4399 }
4400
4401 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4402 if (!currentsd[i]) {
4403 h->drv_req_rescan = 1;
4404 goto out;
4405 }
4406 ndev_allocated++;
4407 }
4408
4409 if (is_scsi_rev_5(h))
4410 raid_ctlr_position = 0;
4411 else
4412 raid_ctlr_position = nphysicals + nlogicals;
4413
4414 /* adjust our table of devices */
4415 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4416 u8 *lunaddrbytes, is_OBDR = 0;
4417 int rc = 0;
4418 int phys_dev_index = i - (raid_ctlr_position == 0);
4419 bool skip_device = false;
4420
4421 memset(tmpdevice, 0, sizeof(*tmpdevice));
4422
4423 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4424
4425 /* Figure out where the LUN ID info is coming from */
4426 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4427 i, nphysicals, nlogicals, physdev_list, logdev_list);
4428
4429 /* Determine if this is a lun from an external target array */
4430 tmpdevice->external =
4431 figure_external_status(h, raid_ctlr_position, i,
4432 nphysicals, nlocal_logicals);
4433
4434 /*
4435 * Skip over some devices such as a spare.
4436 */
4437 if (phys_dev_index >= 0 && !tmpdevice->external &&
4438 physical_device) {
4439 skip_device = hpsa_skip_device(h, lunaddrbytes,
4440 &physdev_list->LUN[phys_dev_index]);
4441 if (skip_device)
4442 continue;
4443 }
4444
4445 /* Get device type, vendor, model, device id, raid_map */
4446 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4447 &is_OBDR);
4448 if (rc == -ENOMEM) {
4449 dev_warn(&h->pdev->dev,
4450 "Out of memory, rescan deferred.\n");
4451 h->drv_req_rescan = 1;
4452 goto out;
4453 }
4454 if (rc) {
4455 h->drv_req_rescan = 1;
4456 continue;
4457 }
4458
4459 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4460 this_device = currentsd[ncurrent];
4461
4462 *this_device = *tmpdevice;
4463 this_device->physical_device = physical_device;
4464
4465 /*
4466 * Expose all devices except for physical devices that
4467 * are masked.
4468 */
4469 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4470 this_device->expose_device = 0;
4471 else
4472 this_device->expose_device = 1;
4473
4474
4475 /*
4476 * Get the SAS address for physical devices that are exposed.
4477 */
4478 if (this_device->physical_device && this_device->expose_device)
4479 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4480
4481 switch (this_device->devtype) {
4482 case TYPE_ROM:
4483 /* We don't *really* support actual CD-ROM devices,
4484 * just "One Button Disaster Recovery" tape drive
4485 * which temporarily pretends to be a CD-ROM drive.
4486 * So we check that the device is really an OBDR tape
4487 * device by checking for "$DR-10" in bytes 43-48 of
4488 * the inquiry data.
4489 */
4490 if (is_OBDR)
4491 ncurrent++;
4492 break;
4493 case TYPE_DISK:
4494 case TYPE_ZBC:
4495 if (this_device->physical_device) {
4496 /* The disk is in HBA mode. */
4497 /* Never use RAID mapper in HBA mode. */
4498 this_device->offload_enabled = 0;
4499 hpsa_get_ioaccel_drive_info(h, this_device,
4500 physdev_list, phys_dev_index, id_phys);
4501 hpsa_get_path_info(this_device,
4502 physdev_list, phys_dev_index, id_phys);
4503 }
4504 ncurrent++;
4505 break;
4506 case TYPE_TAPE:
4507 case TYPE_MEDIUM_CHANGER:
4508 ncurrent++;
4509 break;
4510 case TYPE_ENCLOSURE:
4511 if (!this_device->external)
4512 hpsa_get_enclosure_info(h, lunaddrbytes,
4513 physdev_list, phys_dev_index,
4514 this_device);
4515 ncurrent++;
4516 break;
4517 case TYPE_RAID:
4518 /* Only present the Smartarray HBA as a RAID controller.
4519 * If it's a RAID controller other than the HBA itself
4520 * (an external RAID controller, MSA500 or similar)
4521 * don't present it.
4522 */
4523 if (!is_hba_lunid(lunaddrbytes))
4524 break;
4525 ncurrent++;
4526 break;
4527 default:
4528 break;
4529 }
4530 if (ncurrent >= HPSA_MAX_DEVICES)
4531 break;
4532 }
4533
4534 if (h->sas_host == NULL) {
4535 int rc = 0;
4536
4537 rc = hpsa_add_sas_host(h);
4538 if (rc) {
4539 dev_warn(&h->pdev->dev,
4540 "Could not add sas host %d\n", rc);
4541 goto out;
4542 }
4543 }
4544
4545 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4546 out:
4547 kfree(tmpdevice);
4548 for (i = 0; i < ndev_allocated; i++)
4549 kfree(currentsd[i]);
4550 kfree(currentsd);
4551 kfree(physdev_list);
4552 kfree(logdev_list);
4553 kfree(id_ctlr);
4554 kfree(id_phys);
4555 }
4556
4557 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4558 struct scatterlist *sg)
4559 {
4560 u64 addr64 = (u64) sg_dma_address(sg);
4561 unsigned int len = sg_dma_len(sg);
4562
4563 desc->Addr = cpu_to_le64(addr64);
4564 desc->Len = cpu_to_le32(len);
4565 desc->Ext = 0;
4566 }
4567
4568 /*
4569 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4570 * dma mapping and fills in the scatter gather entries of the
4571 * hpsa command, cp.
4572 */
4573 static int hpsa_scatter_gather(struct ctlr_info *h,
4574 struct CommandList *cp,
4575 struct scsi_cmnd *cmd)
4576 {
4577 struct scatterlist *sg;
4578 int use_sg, i, sg_limit, chained;
4579 struct SGDescriptor *curr_sg;
4580
4581 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4582
4583 use_sg = scsi_dma_map(cmd);
4584 if (use_sg < 0)
4585 return use_sg;
4586
4587 if (!use_sg)
4588 goto sglist_finished;
4589
4590 /*
4591 * If the number of entries is greater than the max for a single list,
4592 * then we have a chained list; we will set up all but one entry in the
4593 * first list (the last entry is saved for link information);
4594 * otherwise, we don't have a chained list and we'll set up at each of
4595 * the entries in the one list.
4596 */
4597 curr_sg = cp->SG;
4598 chained = use_sg > h->max_cmd_sg_entries;
4599 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4600 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4601 hpsa_set_sg_descriptor(curr_sg, sg);
4602 curr_sg++;
4603 }
4604
4605 if (chained) {
4606 /*
4607 * Continue with the chained list. Set curr_sg to the chained
4608 * list. Modify the limit to the total count less the entries
4609 * we've already set up. Resume the scan at the list entry
4610 * where the previous loop left off.
4611 */
4612 curr_sg = h->cmd_sg_list[cp->cmdindex];
4613 sg_limit = use_sg - sg_limit;
4614 for_each_sg(sg, sg, sg_limit, i) {
4615 hpsa_set_sg_descriptor(curr_sg, sg);
4616 curr_sg++;
4617 }
4618 }
4619
4620 /* Back the pointer up to the last entry and mark it as "last". */
4621 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4622
4623 if (use_sg + chained > h->maxSG)
4624 h->maxSG = use_sg + chained;
4625
4626 if (chained) {
4627 cp->Header.SGList = h->max_cmd_sg_entries;
4628 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4629 if (hpsa_map_sg_chain_block(h, cp)) {
4630 scsi_dma_unmap(cmd);
4631 return -1;
4632 }
4633 return 0;
4634 }
4635
4636 sglist_finished:
4637
4638 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4639 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4640 return 0;
4641 }
4642
4643 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4644 u8 *cdb, int cdb_len,
4645 const char *func)
4646 {
4647 dev_warn(&h->pdev->dev,
4648 "%s: Blocking zero-length request: CDB:%*phN\n",
4649 func, cdb_len, cdb);
4650 }
4651
4652 #define IO_ACCEL_INELIGIBLE 1
4653 /* zero-length transfers trigger hardware errors. */
4654 static bool is_zero_length_transfer(u8 *cdb)
4655 {
4656 u32 block_cnt;
4657
4658 /* Block zero-length transfer sizes on certain commands. */
4659 switch (cdb[0]) {
4660 case READ_10:
4661 case WRITE_10:
4662 case VERIFY: /* 0x2F */
4663 case WRITE_VERIFY: /* 0x2E */
4664 block_cnt = get_unaligned_be16(&cdb[7]);
4665 break;
4666 case READ_12:
4667 case WRITE_12:
4668 case VERIFY_12: /* 0xAF */
4669 case WRITE_VERIFY_12: /* 0xAE */
4670 block_cnt = get_unaligned_be32(&cdb[6]);
4671 break;
4672 case READ_16:
4673 case WRITE_16:
4674 case VERIFY_16: /* 0x8F */
4675 block_cnt = get_unaligned_be32(&cdb[10]);
4676 break;
4677 default:
4678 return false;
4679 }
4680
4681 return block_cnt == 0;
4682 }
4683
4684 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4685 {
4686 int is_write = 0;
4687 u32 block;
4688 u32 block_cnt;
4689
4690 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4691 switch (cdb[0]) {
4692 case WRITE_6:
4693 case WRITE_12:
4694 is_write = 1;
4695 fallthrough;
4696 case READ_6:
4697 case READ_12:
4698 if (*cdb_len == 6) {
4699 block = (((cdb[1] & 0x1F) << 16) |
4700 (cdb[2] << 8) |
4701 cdb[3]);
4702 block_cnt = cdb[4];
4703 if (block_cnt == 0)
4704 block_cnt = 256;
4705 } else {
4706 BUG_ON(*cdb_len != 12);
4707 block = get_unaligned_be32(&cdb[2]);
4708 block_cnt = get_unaligned_be32(&cdb[6]);
4709 }
4710 if (block_cnt > 0xffff)
4711 return IO_ACCEL_INELIGIBLE;
4712
4713 cdb[0] = is_write ? WRITE_10 : READ_10;
4714 cdb[1] = 0;
4715 cdb[2] = (u8) (block >> 24);
4716 cdb[3] = (u8) (block >> 16);
4717 cdb[4] = (u8) (block >> 8);
4718 cdb[5] = (u8) (block);
4719 cdb[6] = 0;
4720 cdb[7] = (u8) (block_cnt >> 8);
4721 cdb[8] = (u8) (block_cnt);
4722 cdb[9] = 0;
4723 *cdb_len = 10;
4724 break;
4725 }
4726 return 0;
4727 }
4728
4729 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4730 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4731 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4732 {
4733 struct scsi_cmnd *cmd = c->scsi_cmd;
4734 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4735 unsigned int len;
4736 unsigned int total_len = 0;
4737 struct scatterlist *sg;
4738 u64 addr64;
4739 int use_sg, i;
4740 struct SGDescriptor *curr_sg;
4741 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4742
4743 /* TODO: implement chaining support */
4744 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4745 atomic_dec(&phys_disk->ioaccel_cmds_out);
4746 return IO_ACCEL_INELIGIBLE;
4747 }
4748
4749 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4750
4751 if (is_zero_length_transfer(cdb)) {
4752 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4753 atomic_dec(&phys_disk->ioaccel_cmds_out);
4754 return IO_ACCEL_INELIGIBLE;
4755 }
4756
4757 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4758 atomic_dec(&phys_disk->ioaccel_cmds_out);
4759 return IO_ACCEL_INELIGIBLE;
4760 }
4761
4762 c->cmd_type = CMD_IOACCEL1;
4763
4764 /* Adjust the DMA address to point to the accelerated command buffer */
4765 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4766 (c->cmdindex * sizeof(*cp));
4767 BUG_ON(c->busaddr & 0x0000007F);
4768
4769 use_sg = scsi_dma_map(cmd);
4770 if (use_sg < 0) {
4771 atomic_dec(&phys_disk->ioaccel_cmds_out);
4772 return use_sg;
4773 }
4774
4775 if (use_sg) {
4776 curr_sg = cp->SG;
4777 scsi_for_each_sg(cmd, sg, use_sg, i) {
4778 addr64 = (u64) sg_dma_address(sg);
4779 len = sg_dma_len(sg);
4780 total_len += len;
4781 curr_sg->Addr = cpu_to_le64(addr64);
4782 curr_sg->Len = cpu_to_le32(len);
4783 curr_sg->Ext = cpu_to_le32(0);
4784 curr_sg++;
4785 }
4786 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4787
4788 switch (cmd->sc_data_direction) {
4789 case DMA_TO_DEVICE:
4790 control |= IOACCEL1_CONTROL_DATA_OUT;
4791 break;
4792 case DMA_FROM_DEVICE:
4793 control |= IOACCEL1_CONTROL_DATA_IN;
4794 break;
4795 case DMA_NONE:
4796 control |= IOACCEL1_CONTROL_NODATAXFER;
4797 break;
4798 default:
4799 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4800 cmd->sc_data_direction);
4801 BUG();
4802 break;
4803 }
4804 } else {
4805 control |= IOACCEL1_CONTROL_NODATAXFER;
4806 }
4807
4808 c->Header.SGList = use_sg;
4809 /* Fill out the command structure to submit */
4810 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4811 cp->transfer_len = cpu_to_le32(total_len);
4812 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4813 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4814 cp->control = cpu_to_le32(control);
4815 memcpy(cp->CDB, cdb, cdb_len);
4816 memcpy(cp->CISS_LUN, scsi3addr, 8);
4817 /* Tag was already set at init time. */
4818 enqueue_cmd_and_start_io(h, c);
4819 return 0;
4820 }
4821
4822 /*
4823 * Queue a command directly to a device behind the controller using the
4824 * I/O accelerator path.
4825 */
4826 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4827 struct CommandList *c)
4828 {
4829 struct scsi_cmnd *cmd = c->scsi_cmd;
4830 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4831
4832 if (!dev)
4833 return -1;
4834
4835 c->phys_disk = dev;
4836
4837 if (dev->in_reset)
4838 return -1;
4839
4840 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4841 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4842 }
4843
4844 /*
4845 * Set encryption parameters for the ioaccel2 request
4846 */
4847 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4848 struct CommandList *c, struct io_accel2_cmd *cp)
4849 {
4850 struct scsi_cmnd *cmd = c->scsi_cmd;
4851 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4852 struct raid_map_data *map = &dev->raid_map;
4853 u64 first_block;
4854
4855 /* Are we doing encryption on this device */
4856 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4857 return;
4858 /* Set the data encryption key index. */
4859 cp->dekindex = map->dekindex;
4860
4861 /* Set the encryption enable flag, encoded into direction field. */
4862 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4863
4864 /* Set encryption tweak values based on logical block address
4865 * If block size is 512, tweak value is LBA.
4866 * For other block sizes, tweak is (LBA * block size)/ 512)
4867 */
4868 switch (cmd->cmnd[0]) {
4869 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4870 case READ_6:
4871 case WRITE_6:
4872 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4873 (cmd->cmnd[2] << 8) |
4874 cmd->cmnd[3]);
4875 break;
4876 case WRITE_10:
4877 case READ_10:
4878 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4879 case WRITE_12:
4880 case READ_12:
4881 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4882 break;
4883 case WRITE_16:
4884 case READ_16:
4885 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4886 break;
4887 default:
4888 dev_err(&h->pdev->dev,
4889 "ERROR: %s: size (0x%x) not supported for encryption\n",
4890 __func__, cmd->cmnd[0]);
4891 BUG();
4892 break;
4893 }
4894
4895 if (le32_to_cpu(map->volume_blk_size) != 512)
4896 first_block = first_block *
4897 le32_to_cpu(map->volume_blk_size)/512;
4898
4899 cp->tweak_lower = cpu_to_le32(first_block);
4900 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4901 }
4902
4903 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4904 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4905 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4906 {
4907 struct scsi_cmnd *cmd = c->scsi_cmd;
4908 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4909 struct ioaccel2_sg_element *curr_sg;
4910 int use_sg, i;
4911 struct scatterlist *sg;
4912 u64 addr64;
4913 u32 len;
4914 u32 total_len = 0;
4915
4916 if (!cmd->device)
4917 return -1;
4918
4919 if (!cmd->device->hostdata)
4920 return -1;
4921
4922 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4923
4924 if (is_zero_length_transfer(cdb)) {
4925 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4926 atomic_dec(&phys_disk->ioaccel_cmds_out);
4927 return IO_ACCEL_INELIGIBLE;
4928 }
4929
4930 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4931 atomic_dec(&phys_disk->ioaccel_cmds_out);
4932 return IO_ACCEL_INELIGIBLE;
4933 }
4934
4935 c->cmd_type = CMD_IOACCEL2;
4936 /* Adjust the DMA address to point to the accelerated command buffer */
4937 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4938 (c->cmdindex * sizeof(*cp));
4939 BUG_ON(c->busaddr & 0x0000007F);
4940
4941 memset(cp, 0, sizeof(*cp));
4942 cp->IU_type = IOACCEL2_IU_TYPE;
4943
4944 use_sg = scsi_dma_map(cmd);
4945 if (use_sg < 0) {
4946 atomic_dec(&phys_disk->ioaccel_cmds_out);
4947 return use_sg;
4948 }
4949
4950 if (use_sg) {
4951 curr_sg = cp->sg;
4952 if (use_sg > h->ioaccel_maxsg) {
4953 addr64 = le64_to_cpu(
4954 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4955 curr_sg->address = cpu_to_le64(addr64);
4956 curr_sg->length = 0;
4957 curr_sg->reserved[0] = 0;
4958 curr_sg->reserved[1] = 0;
4959 curr_sg->reserved[2] = 0;
4960 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4961
4962 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4963 }
4964 scsi_for_each_sg(cmd, sg, use_sg, i) {
4965 addr64 = (u64) sg_dma_address(sg);
4966 len = sg_dma_len(sg);
4967 total_len += len;
4968 curr_sg->address = cpu_to_le64(addr64);
4969 curr_sg->length = cpu_to_le32(len);
4970 curr_sg->reserved[0] = 0;
4971 curr_sg->reserved[1] = 0;
4972 curr_sg->reserved[2] = 0;
4973 curr_sg->chain_indicator = 0;
4974 curr_sg++;
4975 }
4976
4977 /*
4978 * Set the last s/g element bit
4979 */
4980 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4981
4982 switch (cmd->sc_data_direction) {
4983 case DMA_TO_DEVICE:
4984 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4985 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4986 break;
4987 case DMA_FROM_DEVICE:
4988 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4989 cp->direction |= IOACCEL2_DIR_DATA_IN;
4990 break;
4991 case DMA_NONE:
4992 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4993 cp->direction |= IOACCEL2_DIR_NO_DATA;
4994 break;
4995 default:
4996 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4997 cmd->sc_data_direction);
4998 BUG();
4999 break;
5000 }
5001 } else {
5002 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
5003 cp->direction |= IOACCEL2_DIR_NO_DATA;
5004 }
5005
5006 /* Set encryption parameters, if necessary */
5007 set_encrypt_ioaccel2(h, c, cp);
5008
5009 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
5010 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5011 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
5012
5013 cp->data_len = cpu_to_le32(total_len);
5014 cp->err_ptr = cpu_to_le64(c->busaddr +
5015 offsetof(struct io_accel2_cmd, error_data));
5016 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5017
5018 /* fill in sg elements */
5019 if (use_sg > h->ioaccel_maxsg) {
5020 cp->sg_count = 1;
5021 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5022 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5023 atomic_dec(&phys_disk->ioaccel_cmds_out);
5024 scsi_dma_unmap(cmd);
5025 return -1;
5026 }
5027 } else
5028 cp->sg_count = (u8) use_sg;
5029
5030 if (phys_disk->in_reset) {
5031 cmd->result = DID_RESET << 16;
5032 return -1;
5033 }
5034
5035 enqueue_cmd_and_start_io(h, c);
5036 return 0;
5037 }
5038
5039 /*
5040 * Queue a command to the correct I/O accelerator path.
5041 */
5042 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5043 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5044 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5045 {
5046 if (!c->scsi_cmd->device)
5047 return -1;
5048
5049 if (!c->scsi_cmd->device->hostdata)
5050 return -1;
5051
5052 if (phys_disk->in_reset)
5053 return -1;
5054
5055 /* Try to honor the device's queue depth */
5056 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5057 phys_disk->queue_depth) {
5058 atomic_dec(&phys_disk->ioaccel_cmds_out);
5059 return IO_ACCEL_INELIGIBLE;
5060 }
5061 if (h->transMethod & CFGTBL_Trans_io_accel1)
5062 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5063 cdb, cdb_len, scsi3addr,
5064 phys_disk);
5065 else
5066 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5067 cdb, cdb_len, scsi3addr,
5068 phys_disk);
5069 }
5070
5071 static void raid_map_helper(struct raid_map_data *map,
5072 int offload_to_mirror, u32 *map_index, u32 *current_group)
5073 {
5074 if (offload_to_mirror == 0) {
5075 /* use physical disk in the first mirrored group. */
5076 *map_index %= le16_to_cpu(map->data_disks_per_row);
5077 return;
5078 }
5079 do {
5080 /* determine mirror group that *map_index indicates */
5081 *current_group = *map_index /
5082 le16_to_cpu(map->data_disks_per_row);
5083 if (offload_to_mirror == *current_group)
5084 continue;
5085 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5086 /* select map index from next group */
5087 *map_index += le16_to_cpu(map->data_disks_per_row);
5088 (*current_group)++;
5089 } else {
5090 /* select map index from first group */
5091 *map_index %= le16_to_cpu(map->data_disks_per_row);
5092 *current_group = 0;
5093 }
5094 } while (offload_to_mirror != *current_group);
5095 }
5096
5097 /*
5098 * Attempt to perform offload RAID mapping for a logical volume I/O.
5099 */
5100 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5101 struct CommandList *c)
5102 {
5103 struct scsi_cmnd *cmd = c->scsi_cmd;
5104 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5105 struct raid_map_data *map = &dev->raid_map;
5106 struct raid_map_disk_data *dd = &map->data[0];
5107 int is_write = 0;
5108 u32 map_index;
5109 u64 first_block, last_block;
5110 u32 block_cnt;
5111 u32 blocks_per_row;
5112 u64 first_row, last_row;
5113 u32 first_row_offset, last_row_offset;
5114 u32 first_column, last_column;
5115 u64 r0_first_row, r0_last_row;
5116 u32 r5or6_blocks_per_row;
5117 u64 r5or6_first_row, r5or6_last_row;
5118 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5119 u32 r5or6_first_column, r5or6_last_column;
5120 u32 total_disks_per_row;
5121 u32 stripesize;
5122 u32 first_group, last_group, current_group;
5123 u32 map_row;
5124 u32 disk_handle;
5125 u64 disk_block;
5126 u32 disk_block_cnt;
5127 u8 cdb[16];
5128 u8 cdb_len;
5129 u16 strip_size;
5130 #if BITS_PER_LONG == 32
5131 u64 tmpdiv;
5132 #endif
5133 int offload_to_mirror;
5134
5135 if (!dev)
5136 return -1;
5137
5138 if (dev->in_reset)
5139 return -1;
5140
5141 /* check for valid opcode, get LBA and block count */
5142 switch (cmd->cmnd[0]) {
5143 case WRITE_6:
5144 is_write = 1;
5145 fallthrough;
5146 case READ_6:
5147 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5148 (cmd->cmnd[2] << 8) |
5149 cmd->cmnd[3]);
5150 block_cnt = cmd->cmnd[4];
5151 if (block_cnt == 0)
5152 block_cnt = 256;
5153 break;
5154 case WRITE_10:
5155 is_write = 1;
5156 fallthrough;
5157 case READ_10:
5158 first_block =
5159 (((u64) cmd->cmnd[2]) << 24) |
5160 (((u64) cmd->cmnd[3]) << 16) |
5161 (((u64) cmd->cmnd[4]) << 8) |
5162 cmd->cmnd[5];
5163 block_cnt =
5164 (((u32) cmd->cmnd[7]) << 8) |
5165 cmd->cmnd[8];
5166 break;
5167 case WRITE_12:
5168 is_write = 1;
5169 fallthrough;
5170 case READ_12:
5171 first_block =
5172 (((u64) cmd->cmnd[2]) << 24) |
5173 (((u64) cmd->cmnd[3]) << 16) |
5174 (((u64) cmd->cmnd[4]) << 8) |
5175 cmd->cmnd[5];
5176 block_cnt =
5177 (((u32) cmd->cmnd[6]) << 24) |
5178 (((u32) cmd->cmnd[7]) << 16) |
5179 (((u32) cmd->cmnd[8]) << 8) |
5180 cmd->cmnd[9];
5181 break;
5182 case WRITE_16:
5183 is_write = 1;
5184 fallthrough;
5185 case READ_16:
5186 first_block =
5187 (((u64) cmd->cmnd[2]) << 56) |
5188 (((u64) cmd->cmnd[3]) << 48) |
5189 (((u64) cmd->cmnd[4]) << 40) |
5190 (((u64) cmd->cmnd[5]) << 32) |
5191 (((u64) cmd->cmnd[6]) << 24) |
5192 (((u64) cmd->cmnd[7]) << 16) |
5193 (((u64) cmd->cmnd[8]) << 8) |
5194 cmd->cmnd[9];
5195 block_cnt =
5196 (((u32) cmd->cmnd[10]) << 24) |
5197 (((u32) cmd->cmnd[11]) << 16) |
5198 (((u32) cmd->cmnd[12]) << 8) |
5199 cmd->cmnd[13];
5200 break;
5201 default:
5202 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5203 }
5204 last_block = first_block + block_cnt - 1;
5205
5206 /* check for write to non-RAID-0 */
5207 if (is_write && dev->raid_level != 0)
5208 return IO_ACCEL_INELIGIBLE;
5209
5210 /* check for invalid block or wraparound */
5211 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5212 last_block < first_block)
5213 return IO_ACCEL_INELIGIBLE;
5214
5215 /* calculate stripe information for the request */
5216 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5217 le16_to_cpu(map->strip_size);
5218 strip_size = le16_to_cpu(map->strip_size);
5219 #if BITS_PER_LONG == 32
5220 tmpdiv = first_block;
5221 (void) do_div(tmpdiv, blocks_per_row);
5222 first_row = tmpdiv;
5223 tmpdiv = last_block;
5224 (void) do_div(tmpdiv, blocks_per_row);
5225 last_row = tmpdiv;
5226 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5227 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5228 tmpdiv = first_row_offset;
5229 (void) do_div(tmpdiv, strip_size);
5230 first_column = tmpdiv;
5231 tmpdiv = last_row_offset;
5232 (void) do_div(tmpdiv, strip_size);
5233 last_column = tmpdiv;
5234 #else
5235 first_row = first_block / blocks_per_row;
5236 last_row = last_block / blocks_per_row;
5237 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5238 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5239 first_column = first_row_offset / strip_size;
5240 last_column = last_row_offset / strip_size;
5241 #endif
5242
5243 /* if this isn't a single row/column then give to the controller */
5244 if ((first_row != last_row) || (first_column != last_column))
5245 return IO_ACCEL_INELIGIBLE;
5246
5247 /* proceeding with driver mapping */
5248 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5249 le16_to_cpu(map->metadata_disks_per_row);
5250 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5251 le16_to_cpu(map->row_cnt);
5252 map_index = (map_row * total_disks_per_row) + first_column;
5253
5254 switch (dev->raid_level) {
5255 case HPSA_RAID_0:
5256 break; /* nothing special to do */
5257 case HPSA_RAID_1:
5258 /* Handles load balance across RAID 1 members.
5259 * (2-drive R1 and R10 with even # of drives.)
5260 * Appropriate for SSDs, not optimal for HDDs
5261 * Ensure we have the correct raid_map.
5262 */
5263 if (le16_to_cpu(map->layout_map_count) != 2) {
5264 hpsa_turn_off_ioaccel_for_device(dev);
5265 return IO_ACCEL_INELIGIBLE;
5266 }
5267 if (dev->offload_to_mirror)
5268 map_index += le16_to_cpu(map->data_disks_per_row);
5269 dev->offload_to_mirror = !dev->offload_to_mirror;
5270 break;
5271 case HPSA_RAID_ADM:
5272 /* Handles N-way mirrors (R1-ADM)
5273 * and R10 with # of drives divisible by 3.)
5274 * Ensure we have the correct raid_map.
5275 */
5276 if (le16_to_cpu(map->layout_map_count) != 3) {
5277 hpsa_turn_off_ioaccel_for_device(dev);
5278 return IO_ACCEL_INELIGIBLE;
5279 }
5280
5281 offload_to_mirror = dev->offload_to_mirror;
5282 raid_map_helper(map, offload_to_mirror,
5283 &map_index, &current_group);
5284 /* set mirror group to use next time */
5285 offload_to_mirror =
5286 (offload_to_mirror >=
5287 le16_to_cpu(map->layout_map_count) - 1)
5288 ? 0 : offload_to_mirror + 1;
5289 dev->offload_to_mirror = offload_to_mirror;
5290 /* Avoid direct use of dev->offload_to_mirror within this
5291 * function since multiple threads might simultaneously
5292 * increment it beyond the range of dev->layout_map_count -1.
5293 */
5294 break;
5295 case HPSA_RAID_5:
5296 case HPSA_RAID_6:
5297 if (le16_to_cpu(map->layout_map_count) <= 1)
5298 break;
5299
5300 /* Verify first and last block are in same RAID group */
5301 r5or6_blocks_per_row =
5302 le16_to_cpu(map->strip_size) *
5303 le16_to_cpu(map->data_disks_per_row);
5304 if (r5or6_blocks_per_row == 0) {
5305 hpsa_turn_off_ioaccel_for_device(dev);
5306 return IO_ACCEL_INELIGIBLE;
5307 }
5308 stripesize = r5or6_blocks_per_row *
5309 le16_to_cpu(map->layout_map_count);
5310 #if BITS_PER_LONG == 32
5311 tmpdiv = first_block;
5312 first_group = do_div(tmpdiv, stripesize);
5313 tmpdiv = first_group;
5314 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5315 first_group = tmpdiv;
5316 tmpdiv = last_block;
5317 last_group = do_div(tmpdiv, stripesize);
5318 tmpdiv = last_group;
5319 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5320 last_group = tmpdiv;
5321 #else
5322 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5323 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5324 #endif
5325 if (first_group != last_group)
5326 return IO_ACCEL_INELIGIBLE;
5327
5328 /* Verify request is in a single row of RAID 5/6 */
5329 #if BITS_PER_LONG == 32
5330 tmpdiv = first_block;
5331 (void) do_div(tmpdiv, stripesize);
5332 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5333 tmpdiv = last_block;
5334 (void) do_div(tmpdiv, stripesize);
5335 r5or6_last_row = r0_last_row = tmpdiv;
5336 #else
5337 first_row = r5or6_first_row = r0_first_row =
5338 first_block / stripesize;
5339 r5or6_last_row = r0_last_row = last_block / stripesize;
5340 #endif
5341 if (r5or6_first_row != r5or6_last_row)
5342 return IO_ACCEL_INELIGIBLE;
5343
5344
5345 /* Verify request is in a single column */
5346 #if BITS_PER_LONG == 32
5347 tmpdiv = first_block;
5348 first_row_offset = do_div(tmpdiv, stripesize);
5349 tmpdiv = first_row_offset;
5350 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5351 r5or6_first_row_offset = first_row_offset;
5352 tmpdiv = last_block;
5353 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5354 tmpdiv = r5or6_last_row_offset;
5355 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5356 tmpdiv = r5or6_first_row_offset;
5357 (void) do_div(tmpdiv, map->strip_size);
5358 first_column = r5or6_first_column = tmpdiv;
5359 tmpdiv = r5or6_last_row_offset;
5360 (void) do_div(tmpdiv, map->strip_size);
5361 r5or6_last_column = tmpdiv;
5362 #else
5363 first_row_offset = r5or6_first_row_offset =
5364 (u32)((first_block % stripesize) %
5365 r5or6_blocks_per_row);
5366
5367 r5or6_last_row_offset =
5368 (u32)((last_block % stripesize) %
5369 r5or6_blocks_per_row);
5370
5371 first_column = r5or6_first_column =
5372 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5373 r5or6_last_column =
5374 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5375 #endif
5376 if (r5or6_first_column != r5or6_last_column)
5377 return IO_ACCEL_INELIGIBLE;
5378
5379 /* Request is eligible */
5380 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5381 le16_to_cpu(map->row_cnt);
5382
5383 map_index = (first_group *
5384 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5385 (map_row * total_disks_per_row) + first_column;
5386 break;
5387 default:
5388 return IO_ACCEL_INELIGIBLE;
5389 }
5390
5391 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5392 return IO_ACCEL_INELIGIBLE;
5393
5394 c->phys_disk = dev->phys_disk[map_index];
5395 if (!c->phys_disk)
5396 return IO_ACCEL_INELIGIBLE;
5397
5398 disk_handle = dd[map_index].ioaccel_handle;
5399 disk_block = le64_to_cpu(map->disk_starting_blk) +
5400 first_row * le16_to_cpu(map->strip_size) +
5401 (first_row_offset - first_column *
5402 le16_to_cpu(map->strip_size));
5403 disk_block_cnt = block_cnt;
5404
5405 /* handle differing logical/physical block sizes */
5406 if (map->phys_blk_shift) {
5407 disk_block <<= map->phys_blk_shift;
5408 disk_block_cnt <<= map->phys_blk_shift;
5409 }
5410 BUG_ON(disk_block_cnt > 0xffff);
5411
5412 /* build the new CDB for the physical disk I/O */
5413 if (disk_block > 0xffffffff) {
5414 cdb[0] = is_write ? WRITE_16 : READ_16;
5415 cdb[1] = 0;
5416 cdb[2] = (u8) (disk_block >> 56);
5417 cdb[3] = (u8) (disk_block >> 48);
5418 cdb[4] = (u8) (disk_block >> 40);
5419 cdb[5] = (u8) (disk_block >> 32);
5420 cdb[6] = (u8) (disk_block >> 24);
5421 cdb[7] = (u8) (disk_block >> 16);
5422 cdb[8] = (u8) (disk_block >> 8);
5423 cdb[9] = (u8) (disk_block);
5424 cdb[10] = (u8) (disk_block_cnt >> 24);
5425 cdb[11] = (u8) (disk_block_cnt >> 16);
5426 cdb[12] = (u8) (disk_block_cnt >> 8);
5427 cdb[13] = (u8) (disk_block_cnt);
5428 cdb[14] = 0;
5429 cdb[15] = 0;
5430 cdb_len = 16;
5431 } else {
5432 cdb[0] = is_write ? WRITE_10 : READ_10;
5433 cdb[1] = 0;
5434 cdb[2] = (u8) (disk_block >> 24);
5435 cdb[3] = (u8) (disk_block >> 16);
5436 cdb[4] = (u8) (disk_block >> 8);
5437 cdb[5] = (u8) (disk_block);
5438 cdb[6] = 0;
5439 cdb[7] = (u8) (disk_block_cnt >> 8);
5440 cdb[8] = (u8) (disk_block_cnt);
5441 cdb[9] = 0;
5442 cdb_len = 10;
5443 }
5444 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5445 dev->scsi3addr,
5446 dev->phys_disk[map_index]);
5447 }
5448
5449 /*
5450 * Submit commands down the "normal" RAID stack path
5451 * All callers to hpsa_ciss_submit must check lockup_detected
5452 * beforehand, before (opt.) and after calling cmd_alloc
5453 */
5454 static int hpsa_ciss_submit(struct ctlr_info *h,
5455 struct CommandList *c, struct scsi_cmnd *cmd,
5456 struct hpsa_scsi_dev_t *dev)
5457 {
5458 cmd->host_scribble = (unsigned char *) c;
5459 c->cmd_type = CMD_SCSI;
5460 c->scsi_cmd = cmd;
5461 c->Header.ReplyQueue = 0; /* unused in simple mode */
5462 memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5463 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5464
5465 /* Fill in the request block... */
5466
5467 c->Request.Timeout = 0;
5468 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5469 c->Request.CDBLen = cmd->cmd_len;
5470 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5471 switch (cmd->sc_data_direction) {
5472 case DMA_TO_DEVICE:
5473 c->Request.type_attr_dir =
5474 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5475 break;
5476 case DMA_FROM_DEVICE:
5477 c->Request.type_attr_dir =
5478 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5479 break;
5480 case DMA_NONE:
5481 c->Request.type_attr_dir =
5482 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5483 break;
5484 case DMA_BIDIRECTIONAL:
5485 /* This can happen if a buggy application does a scsi passthru
5486 * and sets both inlen and outlen to non-zero. ( see
5487 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5488 */
5489
5490 c->Request.type_attr_dir =
5491 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5492 /* This is technically wrong, and hpsa controllers should
5493 * reject it with CMD_INVALID, which is the most correct
5494 * response, but non-fibre backends appear to let it
5495 * slide by, and give the same results as if this field
5496 * were set correctly. Either way is acceptable for
5497 * our purposes here.
5498 */
5499
5500 break;
5501
5502 default:
5503 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5504 cmd->sc_data_direction);
5505 BUG();
5506 break;
5507 }
5508
5509 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5510 hpsa_cmd_resolve_and_free(h, c);
5511 return SCSI_MLQUEUE_HOST_BUSY;
5512 }
5513
5514 if (dev->in_reset) {
5515 hpsa_cmd_resolve_and_free(h, c);
5516 return SCSI_MLQUEUE_HOST_BUSY;
5517 }
5518
5519 c->device = dev;
5520
5521 enqueue_cmd_and_start_io(h, c);
5522 /* the cmd'll come back via intr handler in complete_scsi_command() */
5523 return 0;
5524 }
5525
5526 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5527 struct CommandList *c)
5528 {
5529 dma_addr_t cmd_dma_handle, err_dma_handle;
5530
5531 /* Zero out all of commandlist except the last field, refcount */
5532 memset(c, 0, offsetof(struct CommandList, refcount));
5533 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5534 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5535 c->err_info = h->errinfo_pool + index;
5536 memset(c->err_info, 0, sizeof(*c->err_info));
5537 err_dma_handle = h->errinfo_pool_dhandle
5538 + index * sizeof(*c->err_info);
5539 c->cmdindex = index;
5540 c->busaddr = (u32) cmd_dma_handle;
5541 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5542 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5543 c->h = h;
5544 c->scsi_cmd = SCSI_CMD_IDLE;
5545 }
5546
5547 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5548 {
5549 int i;
5550
5551 for (i = 0; i < h->nr_cmds; i++) {
5552 struct CommandList *c = h->cmd_pool + i;
5553
5554 hpsa_cmd_init(h, i, c);
5555 atomic_set(&c->refcount, 0);
5556 }
5557 }
5558
5559 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5560 struct CommandList *c)
5561 {
5562 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5563
5564 BUG_ON(c->cmdindex != index);
5565
5566 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5567 memset(c->err_info, 0, sizeof(*c->err_info));
5568 c->busaddr = (u32) cmd_dma_handle;
5569 }
5570
5571 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5572 struct CommandList *c, struct scsi_cmnd *cmd)
5573 {
5574 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5575 int rc = IO_ACCEL_INELIGIBLE;
5576
5577 if (!dev)
5578 return SCSI_MLQUEUE_HOST_BUSY;
5579
5580 if (dev->in_reset)
5581 return SCSI_MLQUEUE_HOST_BUSY;
5582
5583 if (hpsa_simple_mode)
5584 return IO_ACCEL_INELIGIBLE;
5585
5586 cmd->host_scribble = (unsigned char *) c;
5587
5588 if (dev->offload_enabled) {
5589 hpsa_cmd_init(h, c->cmdindex, c);
5590 c->cmd_type = CMD_SCSI;
5591 c->scsi_cmd = cmd;
5592 c->device = dev;
5593 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5594 if (rc < 0) /* scsi_dma_map failed. */
5595 rc = SCSI_MLQUEUE_HOST_BUSY;
5596 } else if (dev->hba_ioaccel_enabled) {
5597 hpsa_cmd_init(h, c->cmdindex, c);
5598 c->cmd_type = CMD_SCSI;
5599 c->scsi_cmd = cmd;
5600 c->device = dev;
5601 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5602 if (rc < 0) /* scsi_dma_map failed. */
5603 rc = SCSI_MLQUEUE_HOST_BUSY;
5604 }
5605 return rc;
5606 }
5607
5608 static void hpsa_command_resubmit_worker(struct work_struct *work)
5609 {
5610 struct scsi_cmnd *cmd;
5611 struct hpsa_scsi_dev_t *dev;
5612 struct CommandList *c = container_of(work, struct CommandList, work);
5613
5614 cmd = c->scsi_cmd;
5615 dev = cmd->device->hostdata;
5616 if (!dev) {
5617 cmd->result = DID_NO_CONNECT << 16;
5618 return hpsa_cmd_free_and_done(c->h, c, cmd);
5619 }
5620
5621 if (dev->in_reset) {
5622 cmd->result = DID_RESET << 16;
5623 return hpsa_cmd_free_and_done(c->h, c, cmd);
5624 }
5625
5626 if (c->cmd_type == CMD_IOACCEL2) {
5627 struct ctlr_info *h = c->h;
5628 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5629 int rc;
5630
5631 if (c2->error_data.serv_response ==
5632 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5633 rc = hpsa_ioaccel_submit(h, c, cmd);
5634 if (rc == 0)
5635 return;
5636 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5637 /*
5638 * If we get here, it means dma mapping failed.
5639 * Try again via scsi mid layer, which will
5640 * then get SCSI_MLQUEUE_HOST_BUSY.
5641 */
5642 cmd->result = DID_IMM_RETRY << 16;
5643 return hpsa_cmd_free_and_done(h, c, cmd);
5644 }
5645 /* else, fall thru and resubmit down CISS path */
5646 }
5647 }
5648 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5649 if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5650 /*
5651 * If we get here, it means dma mapping failed. Try
5652 * again via scsi mid layer, which will then get
5653 * SCSI_MLQUEUE_HOST_BUSY.
5654 *
5655 * hpsa_ciss_submit will have already freed c
5656 * if it encountered a dma mapping failure.
5657 */
5658 cmd->result = DID_IMM_RETRY << 16;
5659 cmd->scsi_done(cmd);
5660 }
5661 }
5662
5663 /* Running in struct Scsi_Host->host_lock less mode */
5664 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5665 {
5666 struct ctlr_info *h;
5667 struct hpsa_scsi_dev_t *dev;
5668 struct CommandList *c;
5669 int rc = 0;
5670
5671 /* Get the ptr to our adapter structure out of cmd->host. */
5672 h = sdev_to_hba(cmd->device);
5673
5674 BUG_ON(cmd->request->tag < 0);
5675
5676 dev = cmd->device->hostdata;
5677 if (!dev) {
5678 cmd->result = DID_NO_CONNECT << 16;
5679 cmd->scsi_done(cmd);
5680 return 0;
5681 }
5682
5683 if (dev->removed) {
5684 cmd->result = DID_NO_CONNECT << 16;
5685 cmd->scsi_done(cmd);
5686 return 0;
5687 }
5688
5689 if (unlikely(lockup_detected(h))) {
5690 cmd->result = DID_NO_CONNECT << 16;
5691 cmd->scsi_done(cmd);
5692 return 0;
5693 }
5694
5695 if (dev->in_reset)
5696 return SCSI_MLQUEUE_DEVICE_BUSY;
5697
5698 c = cmd_tagged_alloc(h, cmd);
5699 if (c == NULL)
5700 return SCSI_MLQUEUE_DEVICE_BUSY;
5701
5702 /*
5703 * This is necessary because the SML doesn't zero out this field during
5704 * error recovery.
5705 */
5706 cmd->result = 0;
5707
5708 /*
5709 * Call alternate submit routine for I/O accelerated commands.
5710 * Retries always go down the normal I/O path.
5711 */
5712 if (likely(cmd->retries == 0 &&
5713 !blk_rq_is_passthrough(cmd->request) &&
5714 h->acciopath_status)) {
5715 rc = hpsa_ioaccel_submit(h, c, cmd);
5716 if (rc == 0)
5717 return 0;
5718 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5719 hpsa_cmd_resolve_and_free(h, c);
5720 return SCSI_MLQUEUE_HOST_BUSY;
5721 }
5722 }
5723 return hpsa_ciss_submit(h, c, cmd, dev);
5724 }
5725
5726 static void hpsa_scan_complete(struct ctlr_info *h)
5727 {
5728 unsigned long flags;
5729
5730 spin_lock_irqsave(&h->scan_lock, flags);
5731 h->scan_finished = 1;
5732 wake_up(&h->scan_wait_queue);
5733 spin_unlock_irqrestore(&h->scan_lock, flags);
5734 }
5735
5736 static void hpsa_scan_start(struct Scsi_Host *sh)
5737 {
5738 struct ctlr_info *h = shost_to_hba(sh);
5739 unsigned long flags;
5740
5741 /*
5742 * Don't let rescans be initiated on a controller known to be locked
5743 * up. If the controller locks up *during* a rescan, that thread is
5744 * probably hosed, but at least we can prevent new rescan threads from
5745 * piling up on a locked up controller.
5746 */
5747 if (unlikely(lockup_detected(h)))
5748 return hpsa_scan_complete(h);
5749
5750 /*
5751 * If a scan is already waiting to run, no need to add another
5752 */
5753 spin_lock_irqsave(&h->scan_lock, flags);
5754 if (h->scan_waiting) {
5755 spin_unlock_irqrestore(&h->scan_lock, flags);
5756 return;
5757 }
5758
5759 spin_unlock_irqrestore(&h->scan_lock, flags);
5760
5761 /* wait until any scan already in progress is finished. */
5762 while (1) {
5763 spin_lock_irqsave(&h->scan_lock, flags);
5764 if (h->scan_finished)
5765 break;
5766 h->scan_waiting = 1;
5767 spin_unlock_irqrestore(&h->scan_lock, flags);
5768 wait_event(h->scan_wait_queue, h->scan_finished);
5769 /* Note: We don't need to worry about a race between this
5770 * thread and driver unload because the midlayer will
5771 * have incremented the reference count, so unload won't
5772 * happen if we're in here.
5773 */
5774 }
5775 h->scan_finished = 0; /* mark scan as in progress */
5776 h->scan_waiting = 0;
5777 spin_unlock_irqrestore(&h->scan_lock, flags);
5778
5779 if (unlikely(lockup_detected(h)))
5780 return hpsa_scan_complete(h);
5781
5782 /*
5783 * Do the scan after a reset completion
5784 */
5785 spin_lock_irqsave(&h->reset_lock, flags);
5786 if (h->reset_in_progress) {
5787 h->drv_req_rescan = 1;
5788 spin_unlock_irqrestore(&h->reset_lock, flags);
5789 hpsa_scan_complete(h);
5790 return;
5791 }
5792 spin_unlock_irqrestore(&h->reset_lock, flags);
5793
5794 hpsa_update_scsi_devices(h);
5795
5796 hpsa_scan_complete(h);
5797 }
5798
5799 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5800 {
5801 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5802
5803 if (!logical_drive)
5804 return -ENODEV;
5805
5806 if (qdepth < 1)
5807 qdepth = 1;
5808 else if (qdepth > logical_drive->queue_depth)
5809 qdepth = logical_drive->queue_depth;
5810
5811 return scsi_change_queue_depth(sdev, qdepth);
5812 }
5813
5814 static int hpsa_scan_finished(struct Scsi_Host *sh,
5815 unsigned long elapsed_time)
5816 {
5817 struct ctlr_info *h = shost_to_hba(sh);
5818 unsigned long flags;
5819 int finished;
5820
5821 spin_lock_irqsave(&h->scan_lock, flags);
5822 finished = h->scan_finished;
5823 spin_unlock_irqrestore(&h->scan_lock, flags);
5824 return finished;
5825 }
5826
5827 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5828 {
5829 struct Scsi_Host *sh;
5830
5831 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5832 if (sh == NULL) {
5833 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5834 return -ENOMEM;
5835 }
5836
5837 sh->io_port = 0;
5838 sh->n_io_port = 0;
5839 sh->this_id = -1;
5840 sh->max_channel = 3;
5841 sh->max_cmd_len = MAX_COMMAND_SIZE;
5842 sh->max_lun = HPSA_MAX_LUN;
5843 sh->max_id = HPSA_MAX_LUN;
5844 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5845 sh->cmd_per_lun = sh->can_queue;
5846 sh->sg_tablesize = h->maxsgentries;
5847 sh->transportt = hpsa_sas_transport_template;
5848 sh->hostdata[0] = (unsigned long) h;
5849 sh->irq = pci_irq_vector(h->pdev, 0);
5850 sh->unique_id = sh->irq;
5851
5852 h->scsi_host = sh;
5853 return 0;
5854 }
5855
5856 static int hpsa_scsi_add_host(struct ctlr_info *h)
5857 {
5858 int rv;
5859
5860 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5861 if (rv) {
5862 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5863 return rv;
5864 }
5865 scsi_scan_host(h->scsi_host);
5866 return 0;
5867 }
5868
5869 /*
5870 * The block layer has already gone to the trouble of picking out a unique,
5871 * small-integer tag for this request. We use an offset from that value as
5872 * an index to select our command block. (The offset allows us to reserve the
5873 * low-numbered entries for our own uses.)
5874 */
5875 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5876 {
5877 int idx = scmd->request->tag;
5878
5879 if (idx < 0)
5880 return idx;
5881
5882 /* Offset to leave space for internal cmds. */
5883 return idx += HPSA_NRESERVED_CMDS;
5884 }
5885
5886 /*
5887 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5888 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5889 */
5890 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5891 struct CommandList *c, unsigned char lunaddr[],
5892 int reply_queue)
5893 {
5894 int rc;
5895
5896 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5897 (void) fill_cmd(c, TEST_UNIT_READY, h,
5898 NULL, 0, 0, lunaddr, TYPE_CMD);
5899 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5900 if (rc)
5901 return rc;
5902 /* no unmap needed here because no data xfer. */
5903
5904 /* Check if the unit is already ready. */
5905 if (c->err_info->CommandStatus == CMD_SUCCESS)
5906 return 0;
5907
5908 /*
5909 * The first command sent after reset will receive "unit attention" to
5910 * indicate that the LUN has been reset...this is actually what we're
5911 * looking for (but, success is good too).
5912 */
5913 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5914 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5915 (c->err_info->SenseInfo[2] == NO_SENSE ||
5916 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5917 return 0;
5918
5919 return 1;
5920 }
5921
5922 /*
5923 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5924 * returns zero when the unit is ready, and non-zero when giving up.
5925 */
5926 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5927 struct CommandList *c,
5928 unsigned char lunaddr[], int reply_queue)
5929 {
5930 int rc;
5931 int count = 0;
5932 int waittime = 1; /* seconds */
5933
5934 /* Send test unit ready until device ready, or give up. */
5935 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5936
5937 /*
5938 * Wait for a bit. do this first, because if we send
5939 * the TUR right away, the reset will just abort it.
5940 */
5941 msleep(1000 * waittime);
5942
5943 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5944 if (!rc)
5945 break;
5946
5947 /* Increase wait time with each try, up to a point. */
5948 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5949 waittime *= 2;
5950
5951 dev_warn(&h->pdev->dev,
5952 "waiting %d secs for device to become ready.\n",
5953 waittime);
5954 }
5955
5956 return rc;
5957 }
5958
5959 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5960 unsigned char lunaddr[],
5961 int reply_queue)
5962 {
5963 int first_queue;
5964 int last_queue;
5965 int rq;
5966 int rc = 0;
5967 struct CommandList *c;
5968
5969 c = cmd_alloc(h);
5970
5971 /*
5972 * If no specific reply queue was requested, then send the TUR
5973 * repeatedly, requesting a reply on each reply queue; otherwise execute
5974 * the loop exactly once using only the specified queue.
5975 */
5976 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5977 first_queue = 0;
5978 last_queue = h->nreply_queues - 1;
5979 } else {
5980 first_queue = reply_queue;
5981 last_queue = reply_queue;
5982 }
5983
5984 for (rq = first_queue; rq <= last_queue; rq++) {
5985 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5986 if (rc)
5987 break;
5988 }
5989
5990 if (rc)
5991 dev_warn(&h->pdev->dev, "giving up on device.\n");
5992 else
5993 dev_warn(&h->pdev->dev, "device is ready.\n");
5994
5995 cmd_free(h, c);
5996 return rc;
5997 }
5998
5999 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
6000 * complaining. Doing a host- or bus-reset can't do anything good here.
6001 */
6002 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
6003 {
6004 int rc = SUCCESS;
6005 int i;
6006 struct ctlr_info *h;
6007 struct hpsa_scsi_dev_t *dev = NULL;
6008 u8 reset_type;
6009 char msg[48];
6010 unsigned long flags;
6011
6012 /* find the controller to which the command to be aborted was sent */
6013 h = sdev_to_hba(scsicmd->device);
6014 if (h == NULL) /* paranoia */
6015 return FAILED;
6016
6017 spin_lock_irqsave(&h->reset_lock, flags);
6018 h->reset_in_progress = 1;
6019 spin_unlock_irqrestore(&h->reset_lock, flags);
6020
6021 if (lockup_detected(h)) {
6022 rc = FAILED;
6023 goto return_reset_status;
6024 }
6025
6026 dev = scsicmd->device->hostdata;
6027 if (!dev) {
6028 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
6029 rc = FAILED;
6030 goto return_reset_status;
6031 }
6032
6033 if (dev->devtype == TYPE_ENCLOSURE) {
6034 rc = SUCCESS;
6035 goto return_reset_status;
6036 }
6037
6038 /* if controller locked up, we can guarantee command won't complete */
6039 if (lockup_detected(h)) {
6040 snprintf(msg, sizeof(msg),
6041 "cmd %d RESET FAILED, lockup detected",
6042 hpsa_get_cmd_index(scsicmd));
6043 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6044 rc = FAILED;
6045 goto return_reset_status;
6046 }
6047
6048 /* this reset request might be the result of a lockup; check */
6049 if (detect_controller_lockup(h)) {
6050 snprintf(msg, sizeof(msg),
6051 "cmd %d RESET FAILED, new lockup detected",
6052 hpsa_get_cmd_index(scsicmd));
6053 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6054 rc = FAILED;
6055 goto return_reset_status;
6056 }
6057
6058 /* Do not attempt on controller */
6059 if (is_hba_lunid(dev->scsi3addr)) {
6060 rc = SUCCESS;
6061 goto return_reset_status;
6062 }
6063
6064 if (is_logical_dev_addr_mode(dev->scsi3addr))
6065 reset_type = HPSA_DEVICE_RESET_MSG;
6066 else
6067 reset_type = HPSA_PHYS_TARGET_RESET;
6068
6069 sprintf(msg, "resetting %s",
6070 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
6071 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6072
6073 /*
6074 * wait to see if any commands will complete before sending reset
6075 */
6076 dev->in_reset = true; /* block any new cmds from OS for this device */
6077 for (i = 0; i < 10; i++) {
6078 if (atomic_read(&dev->commands_outstanding) > 0)
6079 msleep(1000);
6080 else
6081 break;
6082 }
6083
6084 /* send a reset to the SCSI LUN which the command was sent to */
6085 rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6086 if (rc == 0)
6087 rc = SUCCESS;
6088 else
6089 rc = FAILED;
6090
6091 sprintf(msg, "reset %s %s",
6092 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6093 rc == SUCCESS ? "completed successfully" : "failed");
6094 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6095
6096 return_reset_status:
6097 spin_lock_irqsave(&h->reset_lock, flags);
6098 h->reset_in_progress = 0;
6099 if (dev)
6100 dev->in_reset = false;
6101 spin_unlock_irqrestore(&h->reset_lock, flags);
6102 return rc;
6103 }
6104
6105 /*
6106 * For operations with an associated SCSI command, a command block is allocated
6107 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6108 * block request tag as an index into a table of entries. cmd_tagged_free() is
6109 * the complement, although cmd_free() may be called instead.
6110 */
6111 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6112 struct scsi_cmnd *scmd)
6113 {
6114 int idx = hpsa_get_cmd_index(scmd);
6115 struct CommandList *c = h->cmd_pool + idx;
6116
6117 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6118 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6119 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6120 /* The index value comes from the block layer, so if it's out of
6121 * bounds, it's probably not our bug.
6122 */
6123 BUG();
6124 }
6125
6126 if (unlikely(!hpsa_is_cmd_idle(c))) {
6127 /*
6128 * We expect that the SCSI layer will hand us a unique tag
6129 * value. Thus, there should never be a collision here between
6130 * two requests...because if the selected command isn't idle
6131 * then someone is going to be very disappointed.
6132 */
6133 if (idx != h->last_collision_tag) { /* Print once per tag */
6134 dev_warn(&h->pdev->dev,
6135 "%s: tag collision (tag=%d)\n", __func__, idx);
6136 if (scmd)
6137 scsi_print_command(scmd);
6138 h->last_collision_tag = idx;
6139 }
6140 return NULL;
6141 }
6142
6143 atomic_inc(&c->refcount);
6144
6145 hpsa_cmd_partial_init(h, idx, c);
6146 return c;
6147 }
6148
6149 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6150 {
6151 /*
6152 * Release our reference to the block. We don't need to do anything
6153 * else to free it, because it is accessed by index.
6154 */
6155 (void)atomic_dec(&c->refcount);
6156 }
6157
6158 /*
6159 * For operations that cannot sleep, a command block is allocated at init,
6160 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6161 * which ones are free or in use. Lock must be held when calling this.
6162 * cmd_free() is the complement.
6163 * This function never gives up and returns NULL. If it hangs,
6164 * another thread must call cmd_free() to free some tags.
6165 */
6166
6167 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6168 {
6169 struct CommandList *c;
6170 int refcount, i;
6171 int offset = 0;
6172
6173 /*
6174 * There is some *extremely* small but non-zero chance that that
6175 * multiple threads could get in here, and one thread could
6176 * be scanning through the list of bits looking for a free
6177 * one, but the free ones are always behind him, and other
6178 * threads sneak in behind him and eat them before he can
6179 * get to them, so that while there is always a free one, a
6180 * very unlucky thread might be starved anyway, never able to
6181 * beat the other threads. In reality, this happens so
6182 * infrequently as to be indistinguishable from never.
6183 *
6184 * Note that we start allocating commands before the SCSI host structure
6185 * is initialized. Since the search starts at bit zero, this
6186 * all works, since we have at least one command structure available;
6187 * however, it means that the structures with the low indexes have to be
6188 * reserved for driver-initiated requests, while requests from the block
6189 * layer will use the higher indexes.
6190 */
6191
6192 for (;;) {
6193 i = find_next_zero_bit(h->cmd_pool_bits,
6194 HPSA_NRESERVED_CMDS,
6195 offset);
6196 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6197 offset = 0;
6198 continue;
6199 }
6200 c = h->cmd_pool + i;
6201 refcount = atomic_inc_return(&c->refcount);
6202 if (unlikely(refcount > 1)) {
6203 cmd_free(h, c); /* already in use */
6204 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6205 continue;
6206 }
6207 set_bit(i & (BITS_PER_LONG - 1),
6208 h->cmd_pool_bits + (i / BITS_PER_LONG));
6209 break; /* it's ours now. */
6210 }
6211 hpsa_cmd_partial_init(h, i, c);
6212 c->device = NULL;
6213 return c;
6214 }
6215
6216 /*
6217 * This is the complementary operation to cmd_alloc(). Note, however, in some
6218 * corner cases it may also be used to free blocks allocated by
6219 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6220 * the clear-bit is harmless.
6221 */
6222 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6223 {
6224 if (atomic_dec_and_test(&c->refcount)) {
6225 int i;
6226
6227 i = c - h->cmd_pool;
6228 clear_bit(i & (BITS_PER_LONG - 1),
6229 h->cmd_pool_bits + (i / BITS_PER_LONG));
6230 }
6231 }
6232
6233 #ifdef CONFIG_COMPAT
6234
6235 static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
6236 void __user *arg)
6237 {
6238 struct ctlr_info *h = sdev_to_hba(dev);
6239 IOCTL32_Command_struct __user *arg32 = arg;
6240 IOCTL_Command_struct arg64;
6241 int err;
6242 u32 cp;
6243
6244 if (!arg)
6245 return -EINVAL;
6246
6247 memset(&arg64, 0, sizeof(arg64));
6248 if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf)))
6249 return -EFAULT;
6250 if (get_user(cp, &arg32->buf))
6251 return -EFAULT;
6252 arg64.buf = compat_ptr(cp);
6253
6254 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6255 return -EAGAIN;
6256 err = hpsa_passthru_ioctl(h, &arg64);
6257 atomic_inc(&h->passthru_cmds_avail);
6258 if (err)
6259 return err;
6260 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6261 sizeof(arg32->error_info)))
6262 return -EFAULT;
6263 return 0;
6264 }
6265
6266 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6267 unsigned int cmd, void __user *arg)
6268 {
6269 struct ctlr_info *h = sdev_to_hba(dev);
6270 BIG_IOCTL32_Command_struct __user *arg32 = arg;
6271 BIG_IOCTL_Command_struct arg64;
6272 int err;
6273 u32 cp;
6274
6275 if (!arg)
6276 return -EINVAL;
6277 memset(&arg64, 0, sizeof(arg64));
6278 if (copy_from_user(&arg64, arg32,
6279 offsetof(BIG_IOCTL32_Command_struct, buf)))
6280 return -EFAULT;
6281 if (get_user(cp, &arg32->buf))
6282 return -EFAULT;
6283 arg64.buf = compat_ptr(cp);
6284
6285 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6286 return -EAGAIN;
6287 err = hpsa_big_passthru_ioctl(h, &arg64);
6288 atomic_inc(&h->passthru_cmds_avail);
6289 if (err)
6290 return err;
6291 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6292 sizeof(arg32->error_info)))
6293 return -EFAULT;
6294 return 0;
6295 }
6296
6297 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
6298 void __user *arg)
6299 {
6300 switch (cmd) {
6301 case CCISS_GETPCIINFO:
6302 case CCISS_GETINTINFO:
6303 case CCISS_SETINTINFO:
6304 case CCISS_GETNODENAME:
6305 case CCISS_SETNODENAME:
6306 case CCISS_GETHEARTBEAT:
6307 case CCISS_GETBUSTYPES:
6308 case CCISS_GETFIRMVER:
6309 case CCISS_GETDRIVVER:
6310 case CCISS_REVALIDVOLS:
6311 case CCISS_DEREGDISK:
6312 case CCISS_REGNEWDISK:
6313 case CCISS_REGNEWD:
6314 case CCISS_RESCANDISK:
6315 case CCISS_GETLUNINFO:
6316 return hpsa_ioctl(dev, cmd, arg);
6317
6318 case CCISS_PASSTHRU32:
6319 return hpsa_ioctl32_passthru(dev, cmd, arg);
6320 case CCISS_BIG_PASSTHRU32:
6321 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6322
6323 default:
6324 return -ENOIOCTLCMD;
6325 }
6326 }
6327 #endif
6328
6329 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6330 {
6331 struct hpsa_pci_info pciinfo;
6332
6333 if (!argp)
6334 return -EINVAL;
6335 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6336 pciinfo.bus = h->pdev->bus->number;
6337 pciinfo.dev_fn = h->pdev->devfn;
6338 pciinfo.board_id = h->board_id;
6339 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6340 return -EFAULT;
6341 return 0;
6342 }
6343
6344 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6345 {
6346 DriverVer_type DriverVer;
6347 unsigned char vmaj, vmin, vsubmin;
6348 int rc;
6349
6350 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6351 &vmaj, &vmin, &vsubmin);
6352 if (rc != 3) {
6353 dev_info(&h->pdev->dev, "driver version string '%s' "
6354 "unrecognized.", HPSA_DRIVER_VERSION);
6355 vmaj = 0;
6356 vmin = 0;
6357 vsubmin = 0;
6358 }
6359 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6360 if (!argp)
6361 return -EINVAL;
6362 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6363 return -EFAULT;
6364 return 0;
6365 }
6366
6367 static int hpsa_passthru_ioctl(struct ctlr_info *h,
6368 IOCTL_Command_struct *iocommand)
6369 {
6370 struct CommandList *c;
6371 char *buff = NULL;
6372 u64 temp64;
6373 int rc = 0;
6374
6375 if (!capable(CAP_SYS_RAWIO))
6376 return -EPERM;
6377 if ((iocommand->buf_size < 1) &&
6378 (iocommand->Request.Type.Direction != XFER_NONE)) {
6379 return -EINVAL;
6380 }
6381 if (iocommand->buf_size > 0) {
6382 buff = kmalloc(iocommand->buf_size, GFP_KERNEL);
6383 if (buff == NULL)
6384 return -ENOMEM;
6385 if (iocommand->Request.Type.Direction & XFER_WRITE) {
6386 /* Copy the data into the buffer we created */
6387 if (copy_from_user(buff, iocommand->buf,
6388 iocommand->buf_size)) {
6389 rc = -EFAULT;
6390 goto out_kfree;
6391 }
6392 } else {
6393 memset(buff, 0, iocommand->buf_size);
6394 }
6395 }
6396 c = cmd_alloc(h);
6397
6398 /* Fill in the command type */
6399 c->cmd_type = CMD_IOCTL_PEND;
6400 c->scsi_cmd = SCSI_CMD_BUSY;
6401 /* Fill in Command Header */
6402 c->Header.ReplyQueue = 0; /* unused in simple mode */
6403 if (iocommand->buf_size > 0) { /* buffer to fill */
6404 c->Header.SGList = 1;
6405 c->Header.SGTotal = cpu_to_le16(1);
6406 } else { /* no buffers to fill */
6407 c->Header.SGList = 0;
6408 c->Header.SGTotal = cpu_to_le16(0);
6409 }
6410 memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN));
6411
6412 /* Fill in Request block */
6413 memcpy(&c->Request, &iocommand->Request,
6414 sizeof(c->Request));
6415
6416 /* Fill in the scatter gather information */
6417 if (iocommand->buf_size > 0) {
6418 temp64 = dma_map_single(&h->pdev->dev, buff,
6419 iocommand->buf_size, DMA_BIDIRECTIONAL);
6420 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6421 c->SG[0].Addr = cpu_to_le64(0);
6422 c->SG[0].Len = cpu_to_le32(0);
6423 rc = -ENOMEM;
6424 goto out;
6425 }
6426 c->SG[0].Addr = cpu_to_le64(temp64);
6427 c->SG[0].Len = cpu_to_le32(iocommand->buf_size);
6428 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6429 }
6430 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6431 NO_TIMEOUT);
6432 if (iocommand->buf_size > 0)
6433 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6434 check_ioctl_unit_attention(h, c);
6435 if (rc) {
6436 rc = -EIO;
6437 goto out;
6438 }
6439
6440 /* Copy the error information out */
6441 memcpy(&iocommand->error_info, c->err_info,
6442 sizeof(iocommand->error_info));
6443 if ((iocommand->Request.Type.Direction & XFER_READ) &&
6444 iocommand->buf_size > 0) {
6445 /* Copy the data out of the buffer we created */
6446 if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) {
6447 rc = -EFAULT;
6448 goto out;
6449 }
6450 }
6451 out:
6452 cmd_free(h, c);
6453 out_kfree:
6454 kfree(buff);
6455 return rc;
6456 }
6457
6458 static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
6459 BIG_IOCTL_Command_struct *ioc)
6460 {
6461 struct CommandList *c;
6462 unsigned char **buff = NULL;
6463 int *buff_size = NULL;
6464 u64 temp64;
6465 BYTE sg_used = 0;
6466 int status = 0;
6467 u32 left;
6468 u32 sz;
6469 BYTE __user *data_ptr;
6470
6471 if (!capable(CAP_SYS_RAWIO))
6472 return -EPERM;
6473
6474 if ((ioc->buf_size < 1) &&
6475 (ioc->Request.Type.Direction != XFER_NONE))
6476 return -EINVAL;
6477 /* Check kmalloc limits using all SGs */
6478 if (ioc->malloc_size > MAX_KMALLOC_SIZE)
6479 return -EINVAL;
6480 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD)
6481 return -EINVAL;
6482 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6483 if (!buff) {
6484 status = -ENOMEM;
6485 goto cleanup1;
6486 }
6487 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6488 if (!buff_size) {
6489 status = -ENOMEM;
6490 goto cleanup1;
6491 }
6492 left = ioc->buf_size;
6493 data_ptr = ioc->buf;
6494 while (left) {
6495 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6496 buff_size[sg_used] = sz;
6497 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6498 if (buff[sg_used] == NULL) {
6499 status = -ENOMEM;
6500 goto cleanup1;
6501 }
6502 if (ioc->Request.Type.Direction & XFER_WRITE) {
6503 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6504 status = -EFAULT;
6505 goto cleanup1;
6506 }
6507 } else
6508 memset(buff[sg_used], 0, sz);
6509 left -= sz;
6510 data_ptr += sz;
6511 sg_used++;
6512 }
6513 c = cmd_alloc(h);
6514
6515 c->cmd_type = CMD_IOCTL_PEND;
6516 c->scsi_cmd = SCSI_CMD_BUSY;
6517 c->Header.ReplyQueue = 0;
6518 c->Header.SGList = (u8) sg_used;
6519 c->Header.SGTotal = cpu_to_le16(sg_used);
6520 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6521 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6522 if (ioc->buf_size > 0) {
6523 int i;
6524 for (i = 0; i < sg_used; i++) {
6525 temp64 = dma_map_single(&h->pdev->dev, buff[i],
6526 buff_size[i], DMA_BIDIRECTIONAL);
6527 if (dma_mapping_error(&h->pdev->dev,
6528 (dma_addr_t) temp64)) {
6529 c->SG[i].Addr = cpu_to_le64(0);
6530 c->SG[i].Len = cpu_to_le32(0);
6531 hpsa_pci_unmap(h->pdev, c, i,
6532 DMA_BIDIRECTIONAL);
6533 status = -ENOMEM;
6534 goto cleanup0;
6535 }
6536 c->SG[i].Addr = cpu_to_le64(temp64);
6537 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6538 c->SG[i].Ext = cpu_to_le32(0);
6539 }
6540 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6541 }
6542 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6543 NO_TIMEOUT);
6544 if (sg_used)
6545 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6546 check_ioctl_unit_attention(h, c);
6547 if (status) {
6548 status = -EIO;
6549 goto cleanup0;
6550 }
6551
6552 /* Copy the error information out */
6553 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6554 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6555 int i;
6556
6557 /* Copy the data out of the buffer we created */
6558 BYTE __user *ptr = ioc->buf;
6559 for (i = 0; i < sg_used; i++) {
6560 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6561 status = -EFAULT;
6562 goto cleanup0;
6563 }
6564 ptr += buff_size[i];
6565 }
6566 }
6567 status = 0;
6568 cleanup0:
6569 cmd_free(h, c);
6570 cleanup1:
6571 if (buff) {
6572 int i;
6573
6574 for (i = 0; i < sg_used; i++)
6575 kfree(buff[i]);
6576 kfree(buff);
6577 }
6578 kfree(buff_size);
6579 return status;
6580 }
6581
6582 static void check_ioctl_unit_attention(struct ctlr_info *h,
6583 struct CommandList *c)
6584 {
6585 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6586 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6587 (void) check_for_unit_attention(h, c);
6588 }
6589
6590 /*
6591 * ioctl
6592 */
6593 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
6594 void __user *argp)
6595 {
6596 struct ctlr_info *h = sdev_to_hba(dev);
6597 int rc;
6598
6599 switch (cmd) {
6600 case CCISS_DEREGDISK:
6601 case CCISS_REGNEWDISK:
6602 case CCISS_REGNEWD:
6603 hpsa_scan_start(h->scsi_host);
6604 return 0;
6605 case CCISS_GETPCIINFO:
6606 return hpsa_getpciinfo_ioctl(h, argp);
6607 case CCISS_GETDRIVVER:
6608 return hpsa_getdrivver_ioctl(h, argp);
6609 case CCISS_PASSTHRU: {
6610 IOCTL_Command_struct iocommand;
6611
6612 if (!argp)
6613 return -EINVAL;
6614 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6615 return -EFAULT;
6616 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6617 return -EAGAIN;
6618 rc = hpsa_passthru_ioctl(h, &iocommand);
6619 atomic_inc(&h->passthru_cmds_avail);
6620 if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand)))
6621 rc = -EFAULT;
6622 return rc;
6623 }
6624 case CCISS_BIG_PASSTHRU: {
6625 BIG_IOCTL_Command_struct ioc;
6626 if (!argp)
6627 return -EINVAL;
6628 if (copy_from_user(&ioc, argp, sizeof(ioc)))
6629 return -EFAULT;
6630 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6631 return -EAGAIN;
6632 rc = hpsa_big_passthru_ioctl(h, &ioc);
6633 atomic_inc(&h->passthru_cmds_avail);
6634 if (!rc && copy_to_user(argp, &ioc, sizeof(ioc)))
6635 rc = -EFAULT;
6636 return rc;
6637 }
6638 default:
6639 return -ENOTTY;
6640 }
6641 }
6642
6643 static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
6644 {
6645 struct CommandList *c;
6646
6647 c = cmd_alloc(h);
6648
6649 /* fill_cmd can't fail here, no data buffer to map */
6650 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6651 RAID_CTLR_LUNID, TYPE_MSG);
6652 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6653 c->waiting = NULL;
6654 enqueue_cmd_and_start_io(h, c);
6655 /* Don't wait for completion, the reset won't complete. Don't free
6656 * the command either. This is the last command we will send before
6657 * re-initializing everything, so it doesn't matter and won't leak.
6658 */
6659 return;
6660 }
6661
6662 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6663 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6664 int cmd_type)
6665 {
6666 enum dma_data_direction dir = DMA_NONE;
6667
6668 c->cmd_type = CMD_IOCTL_PEND;
6669 c->scsi_cmd = SCSI_CMD_BUSY;
6670 c->Header.ReplyQueue = 0;
6671 if (buff != NULL && size > 0) {
6672 c->Header.SGList = 1;
6673 c->Header.SGTotal = cpu_to_le16(1);
6674 } else {
6675 c->Header.SGList = 0;
6676 c->Header.SGTotal = cpu_to_le16(0);
6677 }
6678 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6679
6680 if (cmd_type == TYPE_CMD) {
6681 switch (cmd) {
6682 case HPSA_INQUIRY:
6683 /* are we trying to read a vital product page */
6684 if (page_code & VPD_PAGE) {
6685 c->Request.CDB[1] = 0x01;
6686 c->Request.CDB[2] = (page_code & 0xff);
6687 }
6688 c->Request.CDBLen = 6;
6689 c->Request.type_attr_dir =
6690 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6691 c->Request.Timeout = 0;
6692 c->Request.CDB[0] = HPSA_INQUIRY;
6693 c->Request.CDB[4] = size & 0xFF;
6694 break;
6695 case RECEIVE_DIAGNOSTIC:
6696 c->Request.CDBLen = 6;
6697 c->Request.type_attr_dir =
6698 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6699 c->Request.Timeout = 0;
6700 c->Request.CDB[0] = cmd;
6701 c->Request.CDB[1] = 1;
6702 c->Request.CDB[2] = 1;
6703 c->Request.CDB[3] = (size >> 8) & 0xFF;
6704 c->Request.CDB[4] = size & 0xFF;
6705 break;
6706 case HPSA_REPORT_LOG:
6707 case HPSA_REPORT_PHYS:
6708 /* Talking to controller so It's a physical command
6709 mode = 00 target = 0. Nothing to write.
6710 */
6711 c->Request.CDBLen = 12;
6712 c->Request.type_attr_dir =
6713 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6714 c->Request.Timeout = 0;
6715 c->Request.CDB[0] = cmd;
6716 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6717 c->Request.CDB[7] = (size >> 16) & 0xFF;
6718 c->Request.CDB[8] = (size >> 8) & 0xFF;
6719 c->Request.CDB[9] = size & 0xFF;
6720 break;
6721 case BMIC_SENSE_DIAG_OPTIONS:
6722 c->Request.CDBLen = 16;
6723 c->Request.type_attr_dir =
6724 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6725 c->Request.Timeout = 0;
6726 /* Spec says this should be BMIC_WRITE */
6727 c->Request.CDB[0] = BMIC_READ;
6728 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6729 break;
6730 case BMIC_SET_DIAG_OPTIONS:
6731 c->Request.CDBLen = 16;
6732 c->Request.type_attr_dir =
6733 TYPE_ATTR_DIR(cmd_type,
6734 ATTR_SIMPLE, XFER_WRITE);
6735 c->Request.Timeout = 0;
6736 c->Request.CDB[0] = BMIC_WRITE;
6737 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6738 break;
6739 case HPSA_CACHE_FLUSH:
6740 c->Request.CDBLen = 12;
6741 c->Request.type_attr_dir =
6742 TYPE_ATTR_DIR(cmd_type,
6743 ATTR_SIMPLE, XFER_WRITE);
6744 c->Request.Timeout = 0;
6745 c->Request.CDB[0] = BMIC_WRITE;
6746 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6747 c->Request.CDB[7] = (size >> 8) & 0xFF;
6748 c->Request.CDB[8] = size & 0xFF;
6749 break;
6750 case TEST_UNIT_READY:
6751 c->Request.CDBLen = 6;
6752 c->Request.type_attr_dir =
6753 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6754 c->Request.Timeout = 0;
6755 break;
6756 case HPSA_GET_RAID_MAP:
6757 c->Request.CDBLen = 12;
6758 c->Request.type_attr_dir =
6759 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6760 c->Request.Timeout = 0;
6761 c->Request.CDB[0] = HPSA_CISS_READ;
6762 c->Request.CDB[1] = cmd;
6763 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6764 c->Request.CDB[7] = (size >> 16) & 0xFF;
6765 c->Request.CDB[8] = (size >> 8) & 0xFF;
6766 c->Request.CDB[9] = size & 0xFF;
6767 break;
6768 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6769 c->Request.CDBLen = 10;
6770 c->Request.type_attr_dir =
6771 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6772 c->Request.Timeout = 0;
6773 c->Request.CDB[0] = BMIC_READ;
6774 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6775 c->Request.CDB[7] = (size >> 16) & 0xFF;
6776 c->Request.CDB[8] = (size >> 8) & 0xFF;
6777 break;
6778 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6779 c->Request.CDBLen = 10;
6780 c->Request.type_attr_dir =
6781 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6782 c->Request.Timeout = 0;
6783 c->Request.CDB[0] = BMIC_READ;
6784 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6785 c->Request.CDB[7] = (size >> 16) & 0xFF;
6786 c->Request.CDB[8] = (size >> 8) & 0XFF;
6787 break;
6788 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6789 c->Request.CDBLen = 10;
6790 c->Request.type_attr_dir =
6791 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6792 c->Request.Timeout = 0;
6793 c->Request.CDB[0] = BMIC_READ;
6794 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6795 c->Request.CDB[7] = (size >> 16) & 0xFF;
6796 c->Request.CDB[8] = (size >> 8) & 0XFF;
6797 break;
6798 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6799 c->Request.CDBLen = 10;
6800 c->Request.type_attr_dir =
6801 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6802 c->Request.Timeout = 0;
6803 c->Request.CDB[0] = BMIC_READ;
6804 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6805 c->Request.CDB[7] = (size >> 16) & 0xFF;
6806 c->Request.CDB[8] = (size >> 8) & 0XFF;
6807 break;
6808 case BMIC_IDENTIFY_CONTROLLER:
6809 c->Request.CDBLen = 10;
6810 c->Request.type_attr_dir =
6811 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6812 c->Request.Timeout = 0;
6813 c->Request.CDB[0] = BMIC_READ;
6814 c->Request.CDB[1] = 0;
6815 c->Request.CDB[2] = 0;
6816 c->Request.CDB[3] = 0;
6817 c->Request.CDB[4] = 0;
6818 c->Request.CDB[5] = 0;
6819 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6820 c->Request.CDB[7] = (size >> 16) & 0xFF;
6821 c->Request.CDB[8] = (size >> 8) & 0XFF;
6822 c->Request.CDB[9] = 0;
6823 break;
6824 default:
6825 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6826 BUG();
6827 }
6828 } else if (cmd_type == TYPE_MSG) {
6829 switch (cmd) {
6830
6831 case HPSA_PHYS_TARGET_RESET:
6832 c->Request.CDBLen = 16;
6833 c->Request.type_attr_dir =
6834 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6835 c->Request.Timeout = 0; /* Don't time out */
6836 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6837 c->Request.CDB[0] = HPSA_RESET;
6838 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6839 /* Physical target reset needs no control bytes 4-7*/
6840 c->Request.CDB[4] = 0x00;
6841 c->Request.CDB[5] = 0x00;
6842 c->Request.CDB[6] = 0x00;
6843 c->Request.CDB[7] = 0x00;
6844 break;
6845 case HPSA_DEVICE_RESET_MSG:
6846 c->Request.CDBLen = 16;
6847 c->Request.type_attr_dir =
6848 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6849 c->Request.Timeout = 0; /* Don't time out */
6850 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6851 c->Request.CDB[0] = cmd;
6852 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6853 /* If bytes 4-7 are zero, it means reset the */
6854 /* LunID device */
6855 c->Request.CDB[4] = 0x00;
6856 c->Request.CDB[5] = 0x00;
6857 c->Request.CDB[6] = 0x00;
6858 c->Request.CDB[7] = 0x00;
6859 break;
6860 default:
6861 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6862 cmd);
6863 BUG();
6864 }
6865 } else {
6866 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6867 BUG();
6868 }
6869
6870 switch (GET_DIR(c->Request.type_attr_dir)) {
6871 case XFER_READ:
6872 dir = DMA_FROM_DEVICE;
6873 break;
6874 case XFER_WRITE:
6875 dir = DMA_TO_DEVICE;
6876 break;
6877 case XFER_NONE:
6878 dir = DMA_NONE;
6879 break;
6880 default:
6881 dir = DMA_BIDIRECTIONAL;
6882 }
6883 if (hpsa_map_one(h->pdev, c, buff, size, dir))
6884 return -1;
6885 return 0;
6886 }
6887
6888 /*
6889 * Map (physical) PCI mem into (virtual) kernel space
6890 */
6891 static void __iomem *remap_pci_mem(ulong base, ulong size)
6892 {
6893 ulong page_base = ((ulong) base) & PAGE_MASK;
6894 ulong page_offs = ((ulong) base) - page_base;
6895 void __iomem *page_remapped = ioremap(page_base,
6896 page_offs + size);
6897
6898 return page_remapped ? (page_remapped + page_offs) : NULL;
6899 }
6900
6901 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6902 {
6903 return h->access.command_completed(h, q);
6904 }
6905
6906 static inline bool interrupt_pending(struct ctlr_info *h)
6907 {
6908 return h->access.intr_pending(h);
6909 }
6910
6911 static inline long interrupt_not_for_us(struct ctlr_info *h)
6912 {
6913 return (h->access.intr_pending(h) == 0) ||
6914 (h->interrupts_enabled == 0);
6915 }
6916
6917 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6918 u32 raw_tag)
6919 {
6920 if (unlikely(tag_index >= h->nr_cmds)) {
6921 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6922 return 1;
6923 }
6924 return 0;
6925 }
6926
6927 static inline void finish_cmd(struct CommandList *c)
6928 {
6929 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6930 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6931 || c->cmd_type == CMD_IOACCEL2))
6932 complete_scsi_command(c);
6933 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6934 complete(c->waiting);
6935 }
6936
6937 /* process completion of an indexed ("direct lookup") command */
6938 static inline void process_indexed_cmd(struct ctlr_info *h,
6939 u32 raw_tag)
6940 {
6941 u32 tag_index;
6942 struct CommandList *c;
6943
6944 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6945 if (!bad_tag(h, tag_index, raw_tag)) {
6946 c = h->cmd_pool + tag_index;
6947 finish_cmd(c);
6948 }
6949 }
6950
6951 /* Some controllers, like p400, will give us one interrupt
6952 * after a soft reset, even if we turned interrupts off.
6953 * Only need to check for this in the hpsa_xxx_discard_completions
6954 * functions.
6955 */
6956 static int ignore_bogus_interrupt(struct ctlr_info *h)
6957 {
6958 if (likely(!reset_devices))
6959 return 0;
6960
6961 if (likely(h->interrupts_enabled))
6962 return 0;
6963
6964 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6965 "(known firmware bug.) Ignoring.\n");
6966
6967 return 1;
6968 }
6969
6970 /*
6971 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6972 * Relies on (h-q[x] == x) being true for x such that
6973 * 0 <= x < MAX_REPLY_QUEUES.
6974 */
6975 static struct ctlr_info *queue_to_hba(u8 *queue)
6976 {
6977 return container_of((queue - *queue), struct ctlr_info, q[0]);
6978 }
6979
6980 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6981 {
6982 struct ctlr_info *h = queue_to_hba(queue);
6983 u8 q = *(u8 *) queue;
6984 u32 raw_tag;
6985
6986 if (ignore_bogus_interrupt(h))
6987 return IRQ_NONE;
6988
6989 if (interrupt_not_for_us(h))
6990 return IRQ_NONE;
6991 h->last_intr_timestamp = get_jiffies_64();
6992 while (interrupt_pending(h)) {
6993 raw_tag = get_next_completion(h, q);
6994 while (raw_tag != FIFO_EMPTY)
6995 raw_tag = next_command(h, q);
6996 }
6997 return IRQ_HANDLED;
6998 }
6999
7000 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7001 {
7002 struct ctlr_info *h = queue_to_hba(queue);
7003 u32 raw_tag;
7004 u8 q = *(u8 *) queue;
7005
7006 if (ignore_bogus_interrupt(h))
7007 return IRQ_NONE;
7008
7009 h->last_intr_timestamp = get_jiffies_64();
7010 raw_tag = get_next_completion(h, q);
7011 while (raw_tag != FIFO_EMPTY)
7012 raw_tag = next_command(h, q);
7013 return IRQ_HANDLED;
7014 }
7015
7016 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7017 {
7018 struct ctlr_info *h = queue_to_hba((u8 *) queue);
7019 u32 raw_tag;
7020 u8 q = *(u8 *) queue;
7021
7022 if (interrupt_not_for_us(h))
7023 return IRQ_NONE;
7024 h->last_intr_timestamp = get_jiffies_64();
7025 while (interrupt_pending(h)) {
7026 raw_tag = get_next_completion(h, q);
7027 while (raw_tag != FIFO_EMPTY) {
7028 process_indexed_cmd(h, raw_tag);
7029 raw_tag = next_command(h, q);
7030 }
7031 }
7032 return IRQ_HANDLED;
7033 }
7034
7035 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7036 {
7037 struct ctlr_info *h = queue_to_hba(queue);
7038 u32 raw_tag;
7039 u8 q = *(u8 *) queue;
7040
7041 h->last_intr_timestamp = get_jiffies_64();
7042 raw_tag = get_next_completion(h, q);
7043 while (raw_tag != FIFO_EMPTY) {
7044 process_indexed_cmd(h, raw_tag);
7045 raw_tag = next_command(h, q);
7046 }
7047 return IRQ_HANDLED;
7048 }
7049
7050 /* Send a message CDB to the firmware. Careful, this only works
7051 * in simple mode, not performant mode due to the tag lookup.
7052 * We only ever use this immediately after a controller reset.
7053 */
7054 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7055 unsigned char type)
7056 {
7057 struct Command {
7058 struct CommandListHeader CommandHeader;
7059 struct RequestBlock Request;
7060 struct ErrDescriptor ErrorDescriptor;
7061 };
7062 struct Command *cmd;
7063 static const size_t cmd_sz = sizeof(*cmd) +
7064 sizeof(cmd->ErrorDescriptor);
7065 dma_addr_t paddr64;
7066 __le32 paddr32;
7067 u32 tag;
7068 void __iomem *vaddr;
7069 int i, err;
7070
7071 vaddr = pci_ioremap_bar(pdev, 0);
7072 if (vaddr == NULL)
7073 return -ENOMEM;
7074
7075 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7076 * CCISS commands, so they must be allocated from the lower 4GiB of
7077 * memory.
7078 */
7079 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7080 if (err) {
7081 iounmap(vaddr);
7082 return err;
7083 }
7084
7085 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7086 if (cmd == NULL) {
7087 iounmap(vaddr);
7088 return -ENOMEM;
7089 }
7090
7091 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7092 * although there's no guarantee, we assume that the address is at
7093 * least 4-byte aligned (most likely, it's page-aligned).
7094 */
7095 paddr32 = cpu_to_le32(paddr64);
7096
7097 cmd->CommandHeader.ReplyQueue = 0;
7098 cmd->CommandHeader.SGList = 0;
7099 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7100 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7101 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7102
7103 cmd->Request.CDBLen = 16;
7104 cmd->Request.type_attr_dir =
7105 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7106 cmd->Request.Timeout = 0; /* Don't time out */
7107 cmd->Request.CDB[0] = opcode;
7108 cmd->Request.CDB[1] = type;
7109 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7110 cmd->ErrorDescriptor.Addr =
7111 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7112 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7113
7114 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7115
7116 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7117 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7118 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7119 break;
7120 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7121 }
7122
7123 iounmap(vaddr);
7124
7125 /* we leak the DMA buffer here ... no choice since the controller could
7126 * still complete the command.
7127 */
7128 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7129 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7130 opcode, type);
7131 return -ETIMEDOUT;
7132 }
7133
7134 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7135
7136 if (tag & HPSA_ERROR_BIT) {
7137 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7138 opcode, type);
7139 return -EIO;
7140 }
7141
7142 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7143 opcode, type);
7144 return 0;
7145 }
7146
7147 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7148
7149 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7150 void __iomem *vaddr, u32 use_doorbell)
7151 {
7152
7153 if (use_doorbell) {
7154 /* For everything after the P600, the PCI power state method
7155 * of resetting the controller doesn't work, so we have this
7156 * other way using the doorbell register.
7157 */
7158 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7159 writel(use_doorbell, vaddr + SA5_DOORBELL);
7160
7161 /* PMC hardware guys tell us we need a 10 second delay after
7162 * doorbell reset and before any attempt to talk to the board
7163 * at all to ensure that this actually works and doesn't fall
7164 * over in some weird corner cases.
7165 */
7166 msleep(10000);
7167 } else { /* Try to do it the PCI power state way */
7168
7169 /* Quoting from the Open CISS Specification: "The Power
7170 * Management Control/Status Register (CSR) controls the power
7171 * state of the device. The normal operating state is D0,
7172 * CSR=00h. The software off state is D3, CSR=03h. To reset
7173 * the controller, place the interface device in D3 then to D0,
7174 * this causes a secondary PCI reset which will reset the
7175 * controller." */
7176
7177 int rc = 0;
7178
7179 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7180
7181 /* enter the D3hot power management state */
7182 rc = pci_set_power_state(pdev, PCI_D3hot);
7183 if (rc)
7184 return rc;
7185
7186 msleep(500);
7187
7188 /* enter the D0 power management state */
7189 rc = pci_set_power_state(pdev, PCI_D0);
7190 if (rc)
7191 return rc;
7192
7193 /*
7194 * The P600 requires a small delay when changing states.
7195 * Otherwise we may think the board did not reset and we bail.
7196 * This for kdump only and is particular to the P600.
7197 */
7198 msleep(500);
7199 }
7200 return 0;
7201 }
7202
7203 static void init_driver_version(char *driver_version, int len)
7204 {
7205 memset(driver_version, 0, len);
7206 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7207 }
7208
7209 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7210 {
7211 char *driver_version;
7212 int i, size = sizeof(cfgtable->driver_version);
7213
7214 driver_version = kmalloc(size, GFP_KERNEL);
7215 if (!driver_version)
7216 return -ENOMEM;
7217
7218 init_driver_version(driver_version, size);
7219 for (i = 0; i < size; i++)
7220 writeb(driver_version[i], &cfgtable->driver_version[i]);
7221 kfree(driver_version);
7222 return 0;
7223 }
7224
7225 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7226 unsigned char *driver_ver)
7227 {
7228 int i;
7229
7230 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7231 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7232 }
7233
7234 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7235 {
7236
7237 char *driver_ver, *old_driver_ver;
7238 int rc, size = sizeof(cfgtable->driver_version);
7239
7240 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7241 if (!old_driver_ver)
7242 return -ENOMEM;
7243 driver_ver = old_driver_ver + size;
7244
7245 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7246 * should have been changed, otherwise we know the reset failed.
7247 */
7248 init_driver_version(old_driver_ver, size);
7249 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7250 rc = !memcmp(driver_ver, old_driver_ver, size);
7251 kfree(old_driver_ver);
7252 return rc;
7253 }
7254 /* This does a hard reset of the controller using PCI power management
7255 * states or the using the doorbell register.
7256 */
7257 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7258 {
7259 u64 cfg_offset;
7260 u32 cfg_base_addr;
7261 u64 cfg_base_addr_index;
7262 void __iomem *vaddr;
7263 unsigned long paddr;
7264 u32 misc_fw_support;
7265 int rc;
7266 struct CfgTable __iomem *cfgtable;
7267 u32 use_doorbell;
7268 u16 command_register;
7269
7270 /* For controllers as old as the P600, this is very nearly
7271 * the same thing as
7272 *
7273 * pci_save_state(pci_dev);
7274 * pci_set_power_state(pci_dev, PCI_D3hot);
7275 * pci_set_power_state(pci_dev, PCI_D0);
7276 * pci_restore_state(pci_dev);
7277 *
7278 * For controllers newer than the P600, the pci power state
7279 * method of resetting doesn't work so we have another way
7280 * using the doorbell register.
7281 */
7282
7283 if (!ctlr_is_resettable(board_id)) {
7284 dev_warn(&pdev->dev, "Controller not resettable\n");
7285 return -ENODEV;
7286 }
7287
7288 /* if controller is soft- but not hard resettable... */
7289 if (!ctlr_is_hard_resettable(board_id))
7290 return -ENOTSUPP; /* try soft reset later. */
7291
7292 /* Save the PCI command register */
7293 pci_read_config_word(pdev, 4, &command_register);
7294 pci_save_state(pdev);
7295
7296 /* find the first memory BAR, so we can find the cfg table */
7297 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7298 if (rc)
7299 return rc;
7300 vaddr = remap_pci_mem(paddr, 0x250);
7301 if (!vaddr)
7302 return -ENOMEM;
7303
7304 /* find cfgtable in order to check if reset via doorbell is supported */
7305 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7306 &cfg_base_addr_index, &cfg_offset);
7307 if (rc)
7308 goto unmap_vaddr;
7309 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7310 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7311 if (!cfgtable) {
7312 rc = -ENOMEM;
7313 goto unmap_vaddr;
7314 }
7315 rc = write_driver_ver_to_cfgtable(cfgtable);
7316 if (rc)
7317 goto unmap_cfgtable;
7318
7319 /* If reset via doorbell register is supported, use that.
7320 * There are two such methods. Favor the newest method.
7321 */
7322 misc_fw_support = readl(&cfgtable->misc_fw_support);
7323 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7324 if (use_doorbell) {
7325 use_doorbell = DOORBELL_CTLR_RESET2;
7326 } else {
7327 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7328 if (use_doorbell) {
7329 dev_warn(&pdev->dev,
7330 "Soft reset not supported. Firmware update is required.\n");
7331 rc = -ENOTSUPP; /* try soft reset */
7332 goto unmap_cfgtable;
7333 }
7334 }
7335
7336 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7337 if (rc)
7338 goto unmap_cfgtable;
7339
7340 pci_restore_state(pdev);
7341 pci_write_config_word(pdev, 4, command_register);
7342
7343 /* Some devices (notably the HP Smart Array 5i Controller)
7344 need a little pause here */
7345 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7346
7347 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7348 if (rc) {
7349 dev_warn(&pdev->dev,
7350 "Failed waiting for board to become ready after hard reset\n");
7351 goto unmap_cfgtable;
7352 }
7353
7354 rc = controller_reset_failed(vaddr);
7355 if (rc < 0)
7356 goto unmap_cfgtable;
7357 if (rc) {
7358 dev_warn(&pdev->dev, "Unable to successfully reset "
7359 "controller. Will try soft reset.\n");
7360 rc = -ENOTSUPP;
7361 } else {
7362 dev_info(&pdev->dev, "board ready after hard reset.\n");
7363 }
7364
7365 unmap_cfgtable:
7366 iounmap(cfgtable);
7367
7368 unmap_vaddr:
7369 iounmap(vaddr);
7370 return rc;
7371 }
7372
7373 /*
7374 * We cannot read the structure directly, for portability we must use
7375 * the io functions.
7376 * This is for debug only.
7377 */
7378 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7379 {
7380 #ifdef HPSA_DEBUG
7381 int i;
7382 char temp_name[17];
7383
7384 dev_info(dev, "Controller Configuration information\n");
7385 dev_info(dev, "------------------------------------\n");
7386 for (i = 0; i < 4; i++)
7387 temp_name[i] = readb(&(tb->Signature[i]));
7388 temp_name[4] = '\0';
7389 dev_info(dev, " Signature = %s\n", temp_name);
7390 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7391 dev_info(dev, " Transport methods supported = 0x%x\n",
7392 readl(&(tb->TransportSupport)));
7393 dev_info(dev, " Transport methods active = 0x%x\n",
7394 readl(&(tb->TransportActive)));
7395 dev_info(dev, " Requested transport Method = 0x%x\n",
7396 readl(&(tb->HostWrite.TransportRequest)));
7397 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7398 readl(&(tb->HostWrite.CoalIntDelay)));
7399 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7400 readl(&(tb->HostWrite.CoalIntCount)));
7401 dev_info(dev, " Max outstanding commands = %d\n",
7402 readl(&(tb->CmdsOutMax)));
7403 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7404 for (i = 0; i < 16; i++)
7405 temp_name[i] = readb(&(tb->ServerName[i]));
7406 temp_name[16] = '\0';
7407 dev_info(dev, " Server Name = %s\n", temp_name);
7408 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7409 readl(&(tb->HeartBeat)));
7410 #endif /* HPSA_DEBUG */
7411 }
7412
7413 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7414 {
7415 int i, offset, mem_type, bar_type;
7416
7417 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7418 return 0;
7419 offset = 0;
7420 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7421 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7422 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7423 offset += 4;
7424 else {
7425 mem_type = pci_resource_flags(pdev, i) &
7426 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7427 switch (mem_type) {
7428 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7429 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7430 offset += 4; /* 32 bit */
7431 break;
7432 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7433 offset += 8;
7434 break;
7435 default: /* reserved in PCI 2.2 */
7436 dev_warn(&pdev->dev,
7437 "base address is invalid\n");
7438 return -1;
7439 }
7440 }
7441 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7442 return i + 1;
7443 }
7444 return -1;
7445 }
7446
7447 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7448 {
7449 pci_free_irq_vectors(h->pdev);
7450 h->msix_vectors = 0;
7451 }
7452
7453 static void hpsa_setup_reply_map(struct ctlr_info *h)
7454 {
7455 const struct cpumask *mask;
7456 unsigned int queue, cpu;
7457
7458 for (queue = 0; queue < h->msix_vectors; queue++) {
7459 mask = pci_irq_get_affinity(h->pdev, queue);
7460 if (!mask)
7461 goto fallback;
7462
7463 for_each_cpu(cpu, mask)
7464 h->reply_map[cpu] = queue;
7465 }
7466 return;
7467
7468 fallback:
7469 for_each_possible_cpu(cpu)
7470 h->reply_map[cpu] = 0;
7471 }
7472
7473 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7474 * controllers that are capable. If not, we use legacy INTx mode.
7475 */
7476 static int hpsa_interrupt_mode(struct ctlr_info *h)
7477 {
7478 unsigned int flags = PCI_IRQ_LEGACY;
7479 int ret;
7480
7481 /* Some boards advertise MSI but don't really support it */
7482 switch (h->board_id) {
7483 case 0x40700E11:
7484 case 0x40800E11:
7485 case 0x40820E11:
7486 case 0x40830E11:
7487 break;
7488 default:
7489 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7490 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7491 if (ret > 0) {
7492 h->msix_vectors = ret;
7493 return 0;
7494 }
7495
7496 flags |= PCI_IRQ_MSI;
7497 break;
7498 }
7499
7500 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7501 if (ret < 0)
7502 return ret;
7503 return 0;
7504 }
7505
7506 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7507 bool *legacy_board)
7508 {
7509 int i;
7510 u32 subsystem_vendor_id, subsystem_device_id;
7511
7512 subsystem_vendor_id = pdev->subsystem_vendor;
7513 subsystem_device_id = pdev->subsystem_device;
7514 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7515 subsystem_vendor_id;
7516
7517 if (legacy_board)
7518 *legacy_board = false;
7519 for (i = 0; i < ARRAY_SIZE(products); i++)
7520 if (*board_id == products[i].board_id) {
7521 if (products[i].access != &SA5A_access &&
7522 products[i].access != &SA5B_access)
7523 return i;
7524 dev_warn(&pdev->dev,
7525 "legacy board ID: 0x%08x\n",
7526 *board_id);
7527 if (legacy_board)
7528 *legacy_board = true;
7529 return i;
7530 }
7531
7532 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7533 if (legacy_board)
7534 *legacy_board = true;
7535 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7536 }
7537
7538 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7539 unsigned long *memory_bar)
7540 {
7541 int i;
7542
7543 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7544 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7545 /* addressing mode bits already removed */
7546 *memory_bar = pci_resource_start(pdev, i);
7547 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7548 *memory_bar);
7549 return 0;
7550 }
7551 dev_warn(&pdev->dev, "no memory BAR found\n");
7552 return -ENODEV;
7553 }
7554
7555 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7556 int wait_for_ready)
7557 {
7558 int i, iterations;
7559 u32 scratchpad;
7560 if (wait_for_ready)
7561 iterations = HPSA_BOARD_READY_ITERATIONS;
7562 else
7563 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7564
7565 for (i = 0; i < iterations; i++) {
7566 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7567 if (wait_for_ready) {
7568 if (scratchpad == HPSA_FIRMWARE_READY)
7569 return 0;
7570 } else {
7571 if (scratchpad != HPSA_FIRMWARE_READY)
7572 return 0;
7573 }
7574 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7575 }
7576 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7577 return -ENODEV;
7578 }
7579
7580 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7581 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7582 u64 *cfg_offset)
7583 {
7584 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7585 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7586 *cfg_base_addr &= (u32) 0x0000ffff;
7587 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7588 if (*cfg_base_addr_index == -1) {
7589 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7590 return -ENODEV;
7591 }
7592 return 0;
7593 }
7594
7595 static void hpsa_free_cfgtables(struct ctlr_info *h)
7596 {
7597 if (h->transtable) {
7598 iounmap(h->transtable);
7599 h->transtable = NULL;
7600 }
7601 if (h->cfgtable) {
7602 iounmap(h->cfgtable);
7603 h->cfgtable = NULL;
7604 }
7605 }
7606
7607 /* Find and map CISS config table and transfer table
7608 + * several items must be unmapped (freed) later
7609 + * */
7610 static int hpsa_find_cfgtables(struct ctlr_info *h)
7611 {
7612 u64 cfg_offset;
7613 u32 cfg_base_addr;
7614 u64 cfg_base_addr_index;
7615 u32 trans_offset;
7616 int rc;
7617
7618 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7619 &cfg_base_addr_index, &cfg_offset);
7620 if (rc)
7621 return rc;
7622 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7623 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7624 if (!h->cfgtable) {
7625 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7626 return -ENOMEM;
7627 }
7628 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7629 if (rc)
7630 return rc;
7631 /* Find performant mode table. */
7632 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7633 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7634 cfg_base_addr_index)+cfg_offset+trans_offset,
7635 sizeof(*h->transtable));
7636 if (!h->transtable) {
7637 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7638 hpsa_free_cfgtables(h);
7639 return -ENOMEM;
7640 }
7641 return 0;
7642 }
7643
7644 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7645 {
7646 #define MIN_MAX_COMMANDS 16
7647 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7648
7649 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7650
7651 /* Limit commands in memory limited kdump scenario. */
7652 if (reset_devices && h->max_commands > 32)
7653 h->max_commands = 32;
7654
7655 if (h->max_commands < MIN_MAX_COMMANDS) {
7656 dev_warn(&h->pdev->dev,
7657 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7658 h->max_commands,
7659 MIN_MAX_COMMANDS);
7660 h->max_commands = MIN_MAX_COMMANDS;
7661 }
7662 }
7663
7664 /* If the controller reports that the total max sg entries is greater than 512,
7665 * then we know that chained SG blocks work. (Original smart arrays did not
7666 * support chained SG blocks and would return zero for max sg entries.)
7667 */
7668 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7669 {
7670 return h->maxsgentries > 512;
7671 }
7672
7673 /* Interrogate the hardware for some limits:
7674 * max commands, max SG elements without chaining, and with chaining,
7675 * SG chain block size, etc.
7676 */
7677 static void hpsa_find_board_params(struct ctlr_info *h)
7678 {
7679 hpsa_get_max_perf_mode_cmds(h);
7680 h->nr_cmds = h->max_commands;
7681 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7682 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7683 if (hpsa_supports_chained_sg_blocks(h)) {
7684 /* Limit in-command s/g elements to 32 save dma'able memory. */
7685 h->max_cmd_sg_entries = 32;
7686 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7687 h->maxsgentries--; /* save one for chain pointer */
7688 } else {
7689 /*
7690 * Original smart arrays supported at most 31 s/g entries
7691 * embedded inline in the command (trying to use more
7692 * would lock up the controller)
7693 */
7694 h->max_cmd_sg_entries = 31;
7695 h->maxsgentries = 31; /* default to traditional values */
7696 h->chainsize = 0;
7697 }
7698
7699 /* Find out what task management functions are supported and cache */
7700 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7701 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7702 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7703 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7704 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7705 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7706 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7707 }
7708
7709 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7710 {
7711 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7712 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7713 return false;
7714 }
7715 return true;
7716 }
7717
7718 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7719 {
7720 u32 driver_support;
7721
7722 driver_support = readl(&(h->cfgtable->driver_support));
7723 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7724 #ifdef CONFIG_X86
7725 driver_support |= ENABLE_SCSI_PREFETCH;
7726 #endif
7727 driver_support |= ENABLE_UNIT_ATTN;
7728 writel(driver_support, &(h->cfgtable->driver_support));
7729 }
7730
7731 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7732 * in a prefetch beyond physical memory.
7733 */
7734 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7735 {
7736 u32 dma_prefetch;
7737
7738 if (h->board_id != 0x3225103C)
7739 return;
7740 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7741 dma_prefetch |= 0x8000;
7742 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7743 }
7744
7745 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7746 {
7747 int i;
7748 u32 doorbell_value;
7749 unsigned long flags;
7750 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7751 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7752 spin_lock_irqsave(&h->lock, flags);
7753 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7754 spin_unlock_irqrestore(&h->lock, flags);
7755 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7756 goto done;
7757 /* delay and try again */
7758 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7759 }
7760 return -ENODEV;
7761 done:
7762 return 0;
7763 }
7764
7765 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7766 {
7767 int i;
7768 u32 doorbell_value;
7769 unsigned long flags;
7770
7771 /* under certain very rare conditions, this can take awhile.
7772 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7773 * as we enter this code.)
7774 */
7775 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7776 if (h->remove_in_progress)
7777 goto done;
7778 spin_lock_irqsave(&h->lock, flags);
7779 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7780 spin_unlock_irqrestore(&h->lock, flags);
7781 if (!(doorbell_value & CFGTBL_ChangeReq))
7782 goto done;
7783 /* delay and try again */
7784 msleep(MODE_CHANGE_WAIT_INTERVAL);
7785 }
7786 return -ENODEV;
7787 done:
7788 return 0;
7789 }
7790
7791 /* return -ENODEV or other reason on error, 0 on success */
7792 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7793 {
7794 u32 trans_support;
7795
7796 trans_support = readl(&(h->cfgtable->TransportSupport));
7797 if (!(trans_support & SIMPLE_MODE))
7798 return -ENOTSUPP;
7799
7800 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7801
7802 /* Update the field, and then ring the doorbell */
7803 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7804 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7805 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7806 if (hpsa_wait_for_mode_change_ack(h))
7807 goto error;
7808 print_cfg_table(&h->pdev->dev, h->cfgtable);
7809 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7810 goto error;
7811 h->transMethod = CFGTBL_Trans_Simple;
7812 return 0;
7813 error:
7814 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7815 return -ENODEV;
7816 }
7817
7818 /* free items allocated or mapped by hpsa_pci_init */
7819 static void hpsa_free_pci_init(struct ctlr_info *h)
7820 {
7821 hpsa_free_cfgtables(h); /* pci_init 4 */
7822 iounmap(h->vaddr); /* pci_init 3 */
7823 h->vaddr = NULL;
7824 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7825 /*
7826 * call pci_disable_device before pci_release_regions per
7827 * Documentation/driver-api/pci/pci.rst
7828 */
7829 pci_disable_device(h->pdev); /* pci_init 1 */
7830 pci_release_regions(h->pdev); /* pci_init 2 */
7831 }
7832
7833 /* several items must be freed later */
7834 static int hpsa_pci_init(struct ctlr_info *h)
7835 {
7836 int prod_index, err;
7837 bool legacy_board;
7838
7839 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7840 if (prod_index < 0)
7841 return prod_index;
7842 h->product_name = products[prod_index].product_name;
7843 h->access = *(products[prod_index].access);
7844 h->legacy_board = legacy_board;
7845 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7846 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7847
7848 err = pci_enable_device(h->pdev);
7849 if (err) {
7850 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7851 pci_disable_device(h->pdev);
7852 return err;
7853 }
7854
7855 err = pci_request_regions(h->pdev, HPSA);
7856 if (err) {
7857 dev_err(&h->pdev->dev,
7858 "failed to obtain PCI resources\n");
7859 pci_disable_device(h->pdev);
7860 return err;
7861 }
7862
7863 pci_set_master(h->pdev);
7864
7865 err = hpsa_interrupt_mode(h);
7866 if (err)
7867 goto clean1;
7868
7869 /* setup mapping between CPU and reply queue */
7870 hpsa_setup_reply_map(h);
7871
7872 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7873 if (err)
7874 goto clean2; /* intmode+region, pci */
7875 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7876 if (!h->vaddr) {
7877 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7878 err = -ENOMEM;
7879 goto clean2; /* intmode+region, pci */
7880 }
7881 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7882 if (err)
7883 goto clean3; /* vaddr, intmode+region, pci */
7884 err = hpsa_find_cfgtables(h);
7885 if (err)
7886 goto clean3; /* vaddr, intmode+region, pci */
7887 hpsa_find_board_params(h);
7888
7889 if (!hpsa_CISS_signature_present(h)) {
7890 err = -ENODEV;
7891 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7892 }
7893 hpsa_set_driver_support_bits(h);
7894 hpsa_p600_dma_prefetch_quirk(h);
7895 err = hpsa_enter_simple_mode(h);
7896 if (err)
7897 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7898 return 0;
7899
7900 clean4: /* cfgtables, vaddr, intmode+region, pci */
7901 hpsa_free_cfgtables(h);
7902 clean3: /* vaddr, intmode+region, pci */
7903 iounmap(h->vaddr);
7904 h->vaddr = NULL;
7905 clean2: /* intmode+region, pci */
7906 hpsa_disable_interrupt_mode(h);
7907 clean1:
7908 /*
7909 * call pci_disable_device before pci_release_regions per
7910 * Documentation/driver-api/pci/pci.rst
7911 */
7912 pci_disable_device(h->pdev);
7913 pci_release_regions(h->pdev);
7914 return err;
7915 }
7916
7917 static void hpsa_hba_inquiry(struct ctlr_info *h)
7918 {
7919 int rc;
7920
7921 #define HBA_INQUIRY_BYTE_COUNT 64
7922 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7923 if (!h->hba_inquiry_data)
7924 return;
7925 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7926 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7927 if (rc != 0) {
7928 kfree(h->hba_inquiry_data);
7929 h->hba_inquiry_data = NULL;
7930 }
7931 }
7932
7933 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7934 {
7935 int rc, i;
7936 void __iomem *vaddr;
7937
7938 if (!reset_devices)
7939 return 0;
7940
7941 /* kdump kernel is loading, we don't know in which state is
7942 * the pci interface. The dev->enable_cnt is equal zero
7943 * so we call enable+disable, wait a while and switch it on.
7944 */
7945 rc = pci_enable_device(pdev);
7946 if (rc) {
7947 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7948 return -ENODEV;
7949 }
7950 pci_disable_device(pdev);
7951 msleep(260); /* a randomly chosen number */
7952 rc = pci_enable_device(pdev);
7953 if (rc) {
7954 dev_warn(&pdev->dev, "failed to enable device.\n");
7955 return -ENODEV;
7956 }
7957
7958 pci_set_master(pdev);
7959
7960 vaddr = pci_ioremap_bar(pdev, 0);
7961 if (vaddr == NULL) {
7962 rc = -ENOMEM;
7963 goto out_disable;
7964 }
7965 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7966 iounmap(vaddr);
7967
7968 /* Reset the controller with a PCI power-cycle or via doorbell */
7969 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7970
7971 /* -ENOTSUPP here means we cannot reset the controller
7972 * but it's already (and still) up and running in
7973 * "performant mode". Or, it might be 640x, which can't reset
7974 * due to concerns about shared bbwc between 6402/6404 pair.
7975 */
7976 if (rc)
7977 goto out_disable;
7978
7979 /* Now try to get the controller to respond to a no-op */
7980 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7981 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7982 if (hpsa_noop(pdev) == 0)
7983 break;
7984 else
7985 dev_warn(&pdev->dev, "no-op failed%s\n",
7986 (i < 11 ? "; re-trying" : ""));
7987 }
7988
7989 out_disable:
7990
7991 pci_disable_device(pdev);
7992 return rc;
7993 }
7994
7995 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7996 {
7997 kfree(h->cmd_pool_bits);
7998 h->cmd_pool_bits = NULL;
7999 if (h->cmd_pool) {
8000 dma_free_coherent(&h->pdev->dev,
8001 h->nr_cmds * sizeof(struct CommandList),
8002 h->cmd_pool,
8003 h->cmd_pool_dhandle);
8004 h->cmd_pool = NULL;
8005 h->cmd_pool_dhandle = 0;
8006 }
8007 if (h->errinfo_pool) {
8008 dma_free_coherent(&h->pdev->dev,
8009 h->nr_cmds * sizeof(struct ErrorInfo),
8010 h->errinfo_pool,
8011 h->errinfo_pool_dhandle);
8012 h->errinfo_pool = NULL;
8013 h->errinfo_pool_dhandle = 0;
8014 }
8015 }
8016
8017 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
8018 {
8019 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
8020 sizeof(unsigned long),
8021 GFP_KERNEL);
8022 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
8023 h->nr_cmds * sizeof(*h->cmd_pool),
8024 &h->cmd_pool_dhandle, GFP_KERNEL);
8025 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
8026 h->nr_cmds * sizeof(*h->errinfo_pool),
8027 &h->errinfo_pool_dhandle, GFP_KERNEL);
8028 if ((h->cmd_pool_bits == NULL)
8029 || (h->cmd_pool == NULL)
8030 || (h->errinfo_pool == NULL)) {
8031 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
8032 goto clean_up;
8033 }
8034 hpsa_preinitialize_commands(h);
8035 return 0;
8036 clean_up:
8037 hpsa_free_cmd_pool(h);
8038 return -ENOMEM;
8039 }
8040
8041 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8042 static void hpsa_free_irqs(struct ctlr_info *h)
8043 {
8044 int i;
8045 int irq_vector = 0;
8046
8047 if (hpsa_simple_mode)
8048 irq_vector = h->intr_mode;
8049
8050 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8051 /* Single reply queue, only one irq to free */
8052 free_irq(pci_irq_vector(h->pdev, irq_vector),
8053 &h->q[h->intr_mode]);
8054 h->q[h->intr_mode] = 0;
8055 return;
8056 }
8057
8058 for (i = 0; i < h->msix_vectors; i++) {
8059 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8060 h->q[i] = 0;
8061 }
8062 for (; i < MAX_REPLY_QUEUES; i++)
8063 h->q[i] = 0;
8064 }
8065
8066 /* returns 0 on success; cleans up and returns -Enn on error */
8067 static int hpsa_request_irqs(struct ctlr_info *h,
8068 irqreturn_t (*msixhandler)(int, void *),
8069 irqreturn_t (*intxhandler)(int, void *))
8070 {
8071 int rc, i;
8072 int irq_vector = 0;
8073
8074 if (hpsa_simple_mode)
8075 irq_vector = h->intr_mode;
8076
8077 /*
8078 * initialize h->q[x] = x so that interrupt handlers know which
8079 * queue to process.
8080 */
8081 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8082 h->q[i] = (u8) i;
8083
8084 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8085 /* If performant mode and MSI-X, use multiple reply queues */
8086 for (i = 0; i < h->msix_vectors; i++) {
8087 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8088 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8089 0, h->intrname[i],
8090 &h->q[i]);
8091 if (rc) {
8092 int j;
8093
8094 dev_err(&h->pdev->dev,
8095 "failed to get irq %d for %s\n",
8096 pci_irq_vector(h->pdev, i), h->devname);
8097 for (j = 0; j < i; j++) {
8098 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8099 h->q[j] = 0;
8100 }
8101 for (; j < MAX_REPLY_QUEUES; j++)
8102 h->q[j] = 0;
8103 return rc;
8104 }
8105 }
8106 } else {
8107 /* Use single reply pool */
8108 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8109 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8110 h->msix_vectors ? "x" : "");
8111 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8112 msixhandler, 0,
8113 h->intrname[0],
8114 &h->q[h->intr_mode]);
8115 } else {
8116 sprintf(h->intrname[h->intr_mode],
8117 "%s-intx", h->devname);
8118 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8119 intxhandler, IRQF_SHARED,
8120 h->intrname[0],
8121 &h->q[h->intr_mode]);
8122 }
8123 }
8124 if (rc) {
8125 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8126 pci_irq_vector(h->pdev, irq_vector), h->devname);
8127 hpsa_free_irqs(h);
8128 return -ENODEV;
8129 }
8130 return 0;
8131 }
8132
8133 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8134 {
8135 int rc;
8136 hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
8137
8138 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8139 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8140 if (rc) {
8141 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8142 return rc;
8143 }
8144
8145 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8146 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8147 if (rc) {
8148 dev_warn(&h->pdev->dev, "Board failed to become ready "
8149 "after soft reset.\n");
8150 return rc;
8151 }
8152
8153 return 0;
8154 }
8155
8156 static void hpsa_free_reply_queues(struct ctlr_info *h)
8157 {
8158 int i;
8159
8160 for (i = 0; i < h->nreply_queues; i++) {
8161 if (!h->reply_queue[i].head)
8162 continue;
8163 dma_free_coherent(&h->pdev->dev,
8164 h->reply_queue_size,
8165 h->reply_queue[i].head,
8166 h->reply_queue[i].busaddr);
8167 h->reply_queue[i].head = NULL;
8168 h->reply_queue[i].busaddr = 0;
8169 }
8170 h->reply_queue_size = 0;
8171 }
8172
8173 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8174 {
8175 hpsa_free_performant_mode(h); /* init_one 7 */
8176 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8177 hpsa_free_cmd_pool(h); /* init_one 5 */
8178 hpsa_free_irqs(h); /* init_one 4 */
8179 scsi_host_put(h->scsi_host); /* init_one 3 */
8180 h->scsi_host = NULL; /* init_one 3 */
8181 hpsa_free_pci_init(h); /* init_one 2_5 */
8182 free_percpu(h->lockup_detected); /* init_one 2 */
8183 h->lockup_detected = NULL; /* init_one 2 */
8184 if (h->resubmit_wq) {
8185 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8186 h->resubmit_wq = NULL;
8187 }
8188 if (h->rescan_ctlr_wq) {
8189 destroy_workqueue(h->rescan_ctlr_wq);
8190 h->rescan_ctlr_wq = NULL;
8191 }
8192 if (h->monitor_ctlr_wq) {
8193 destroy_workqueue(h->monitor_ctlr_wq);
8194 h->monitor_ctlr_wq = NULL;
8195 }
8196
8197 kfree(h); /* init_one 1 */
8198 }
8199
8200 /* Called when controller lockup detected. */
8201 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8202 {
8203 int i, refcount;
8204 struct CommandList *c;
8205 int failcount = 0;
8206
8207 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8208 for (i = 0; i < h->nr_cmds; i++) {
8209 c = h->cmd_pool + i;
8210 refcount = atomic_inc_return(&c->refcount);
8211 if (refcount > 1) {
8212 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8213 finish_cmd(c);
8214 atomic_dec(&h->commands_outstanding);
8215 failcount++;
8216 }
8217 cmd_free(h, c);
8218 }
8219 dev_warn(&h->pdev->dev,
8220 "failed %d commands in fail_all\n", failcount);
8221 }
8222
8223 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8224 {
8225 int cpu;
8226
8227 for_each_online_cpu(cpu) {
8228 u32 *lockup_detected;
8229 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8230 *lockup_detected = value;
8231 }
8232 wmb(); /* be sure the per-cpu variables are out to memory */
8233 }
8234
8235 static void controller_lockup_detected(struct ctlr_info *h)
8236 {
8237 unsigned long flags;
8238 u32 lockup_detected;
8239
8240 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8241 spin_lock_irqsave(&h->lock, flags);
8242 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8243 if (!lockup_detected) {
8244 /* no heartbeat, but controller gave us a zero. */
8245 dev_warn(&h->pdev->dev,
8246 "lockup detected after %d but scratchpad register is zero\n",
8247 h->heartbeat_sample_interval / HZ);
8248 lockup_detected = 0xffffffff;
8249 }
8250 set_lockup_detected_for_all_cpus(h, lockup_detected);
8251 spin_unlock_irqrestore(&h->lock, flags);
8252 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8253 lockup_detected, h->heartbeat_sample_interval / HZ);
8254 if (lockup_detected == 0xffff0000) {
8255 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8256 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8257 }
8258 pci_disable_device(h->pdev);
8259 fail_all_outstanding_cmds(h);
8260 }
8261
8262 static int detect_controller_lockup(struct ctlr_info *h)
8263 {
8264 u64 now;
8265 u32 heartbeat;
8266 unsigned long flags;
8267
8268 now = get_jiffies_64();
8269 /* If we've received an interrupt recently, we're ok. */
8270 if (time_after64(h->last_intr_timestamp +
8271 (h->heartbeat_sample_interval), now))
8272 return false;
8273
8274 /*
8275 * If we've already checked the heartbeat recently, we're ok.
8276 * This could happen if someone sends us a signal. We
8277 * otherwise don't care about signals in this thread.
8278 */
8279 if (time_after64(h->last_heartbeat_timestamp +
8280 (h->heartbeat_sample_interval), now))
8281 return false;
8282
8283 /* If heartbeat has not changed since we last looked, we're not ok. */
8284 spin_lock_irqsave(&h->lock, flags);
8285 heartbeat = readl(&h->cfgtable->HeartBeat);
8286 spin_unlock_irqrestore(&h->lock, flags);
8287 if (h->last_heartbeat == heartbeat) {
8288 controller_lockup_detected(h);
8289 return true;
8290 }
8291
8292 /* We're ok. */
8293 h->last_heartbeat = heartbeat;
8294 h->last_heartbeat_timestamp = now;
8295 return false;
8296 }
8297
8298 /*
8299 * Set ioaccel status for all ioaccel volumes.
8300 *
8301 * Called from monitor controller worker (hpsa_event_monitor_worker)
8302 *
8303 * A Volume (or Volumes that comprise an Array set) may be undergoing a
8304 * transformation, so we will be turning off ioaccel for all volumes that
8305 * make up the Array.
8306 */
8307 static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8308 {
8309 int rc;
8310 int i;
8311 u8 ioaccel_status;
8312 unsigned char *buf;
8313 struct hpsa_scsi_dev_t *device;
8314
8315 if (!h)
8316 return;
8317
8318 buf = kmalloc(64, GFP_KERNEL);
8319 if (!buf)
8320 return;
8321
8322 /*
8323 * Run through current device list used during I/O requests.
8324 */
8325 for (i = 0; i < h->ndevices; i++) {
8326 int offload_to_be_enabled = 0;
8327 int offload_config = 0;
8328
8329 device = h->dev[i];
8330
8331 if (!device)
8332 continue;
8333 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8334 HPSA_VPD_LV_IOACCEL_STATUS))
8335 continue;
8336
8337 memset(buf, 0, 64);
8338
8339 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8340 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8341 buf, 64);
8342 if (rc != 0)
8343 continue;
8344
8345 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8346
8347 /*
8348 * Check if offload is still configured on
8349 */
8350 offload_config =
8351 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8352 /*
8353 * If offload is configured on, check to see if ioaccel
8354 * needs to be enabled.
8355 */
8356 if (offload_config)
8357 offload_to_be_enabled =
8358 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8359
8360 /*
8361 * If ioaccel is to be re-enabled, re-enable later during the
8362 * scan operation so the driver can get a fresh raidmap
8363 * before turning ioaccel back on.
8364 */
8365 if (offload_to_be_enabled)
8366 continue;
8367
8368 /*
8369 * Immediately turn off ioaccel for any volume the
8370 * controller tells us to. Some of the reasons could be:
8371 * transformation - change to the LVs of an Array.
8372 * degraded volume - component failure
8373 */
8374 hpsa_turn_off_ioaccel_for_device(device);
8375 }
8376
8377 kfree(buf);
8378 }
8379
8380 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8381 {
8382 char *event_type;
8383
8384 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8385 return;
8386
8387 /* Ask the controller to clear the events we're handling. */
8388 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8389 | CFGTBL_Trans_io_accel2)) &&
8390 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8391 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8392
8393 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8394 event_type = "state change";
8395 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8396 event_type = "configuration change";
8397 /* Stop sending new RAID offload reqs via the IO accelerator */
8398 scsi_block_requests(h->scsi_host);
8399 hpsa_set_ioaccel_status(h);
8400 hpsa_drain_accel_commands(h);
8401 /* Set 'accelerator path config change' bit */
8402 dev_warn(&h->pdev->dev,
8403 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8404 h->events, event_type);
8405 writel(h->events, &(h->cfgtable->clear_event_notify));
8406 /* Set the "clear event notify field update" bit 6 */
8407 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8408 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8409 hpsa_wait_for_clear_event_notify_ack(h);
8410 scsi_unblock_requests(h->scsi_host);
8411 } else {
8412 /* Acknowledge controller notification events. */
8413 writel(h->events, &(h->cfgtable->clear_event_notify));
8414 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8415 hpsa_wait_for_clear_event_notify_ack(h);
8416 }
8417 return;
8418 }
8419
8420 /* Check a register on the controller to see if there are configuration
8421 * changes (added/changed/removed logical drives, etc.) which mean that
8422 * we should rescan the controller for devices.
8423 * Also check flag for driver-initiated rescan.
8424 */
8425 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8426 {
8427 if (h->drv_req_rescan) {
8428 h->drv_req_rescan = 0;
8429 return 1;
8430 }
8431
8432 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8433 return 0;
8434
8435 h->events = readl(&(h->cfgtable->event_notify));
8436 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8437 }
8438
8439 /*
8440 * Check if any of the offline devices have become ready
8441 */
8442 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8443 {
8444 unsigned long flags;
8445 struct offline_device_entry *d;
8446 struct list_head *this, *tmp;
8447
8448 spin_lock_irqsave(&h->offline_device_lock, flags);
8449 list_for_each_safe(this, tmp, &h->offline_device_list) {
8450 d = list_entry(this, struct offline_device_entry,
8451 offline_list);
8452 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8453 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8454 spin_lock_irqsave(&h->offline_device_lock, flags);
8455 list_del(&d->offline_list);
8456 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8457 return 1;
8458 }
8459 spin_lock_irqsave(&h->offline_device_lock, flags);
8460 }
8461 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8462 return 0;
8463 }
8464
8465 static int hpsa_luns_changed(struct ctlr_info *h)
8466 {
8467 int rc = 1; /* assume there are changes */
8468 struct ReportLUNdata *logdev = NULL;
8469
8470 /* if we can't find out if lun data has changed,
8471 * assume that it has.
8472 */
8473
8474 if (!h->lastlogicals)
8475 return rc;
8476
8477 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8478 if (!logdev)
8479 return rc;
8480
8481 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8482 dev_warn(&h->pdev->dev,
8483 "report luns failed, can't track lun changes.\n");
8484 goto out;
8485 }
8486 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8487 dev_info(&h->pdev->dev,
8488 "Lun changes detected.\n");
8489 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8490 goto out;
8491 } else
8492 rc = 0; /* no changes detected. */
8493 out:
8494 kfree(logdev);
8495 return rc;
8496 }
8497
8498 static void hpsa_perform_rescan(struct ctlr_info *h)
8499 {
8500 struct Scsi_Host *sh = NULL;
8501 unsigned long flags;
8502
8503 /*
8504 * Do the scan after the reset
8505 */
8506 spin_lock_irqsave(&h->reset_lock, flags);
8507 if (h->reset_in_progress) {
8508 h->drv_req_rescan = 1;
8509 spin_unlock_irqrestore(&h->reset_lock, flags);
8510 return;
8511 }
8512 spin_unlock_irqrestore(&h->reset_lock, flags);
8513
8514 sh = scsi_host_get(h->scsi_host);
8515 if (sh != NULL) {
8516 hpsa_scan_start(sh);
8517 scsi_host_put(sh);
8518 h->drv_req_rescan = 0;
8519 }
8520 }
8521
8522 /*
8523 * watch for controller events
8524 */
8525 static void hpsa_event_monitor_worker(struct work_struct *work)
8526 {
8527 struct ctlr_info *h = container_of(to_delayed_work(work),
8528 struct ctlr_info, event_monitor_work);
8529 unsigned long flags;
8530
8531 spin_lock_irqsave(&h->lock, flags);
8532 if (h->remove_in_progress) {
8533 spin_unlock_irqrestore(&h->lock, flags);
8534 return;
8535 }
8536 spin_unlock_irqrestore(&h->lock, flags);
8537
8538 if (hpsa_ctlr_needs_rescan(h)) {
8539 hpsa_ack_ctlr_events(h);
8540 hpsa_perform_rescan(h);
8541 }
8542
8543 spin_lock_irqsave(&h->lock, flags);
8544 if (!h->remove_in_progress)
8545 queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
8546 HPSA_EVENT_MONITOR_INTERVAL);
8547 spin_unlock_irqrestore(&h->lock, flags);
8548 }
8549
8550 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8551 {
8552 unsigned long flags;
8553 struct ctlr_info *h = container_of(to_delayed_work(work),
8554 struct ctlr_info, rescan_ctlr_work);
8555
8556 spin_lock_irqsave(&h->lock, flags);
8557 if (h->remove_in_progress) {
8558 spin_unlock_irqrestore(&h->lock, flags);
8559 return;
8560 }
8561 spin_unlock_irqrestore(&h->lock, flags);
8562
8563 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8564 hpsa_perform_rescan(h);
8565 } else if (h->discovery_polling) {
8566 if (hpsa_luns_changed(h)) {
8567 dev_info(&h->pdev->dev,
8568 "driver discovery polling rescan.\n");
8569 hpsa_perform_rescan(h);
8570 }
8571 }
8572 spin_lock_irqsave(&h->lock, flags);
8573 if (!h->remove_in_progress)
8574 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8575 h->heartbeat_sample_interval);
8576 spin_unlock_irqrestore(&h->lock, flags);
8577 }
8578
8579 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8580 {
8581 unsigned long flags;
8582 struct ctlr_info *h = container_of(to_delayed_work(work),
8583 struct ctlr_info, monitor_ctlr_work);
8584
8585 detect_controller_lockup(h);
8586 if (lockup_detected(h))
8587 return;
8588
8589 spin_lock_irqsave(&h->lock, flags);
8590 if (!h->remove_in_progress)
8591 queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
8592 h->heartbeat_sample_interval);
8593 spin_unlock_irqrestore(&h->lock, flags);
8594 }
8595
8596 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8597 char *name)
8598 {
8599 struct workqueue_struct *wq = NULL;
8600
8601 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8602 if (!wq)
8603 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8604
8605 return wq;
8606 }
8607
8608 static void hpda_free_ctlr_info(struct ctlr_info *h)
8609 {
8610 kfree(h->reply_map);
8611 kfree(h);
8612 }
8613
8614 static struct ctlr_info *hpda_alloc_ctlr_info(void)
8615 {
8616 struct ctlr_info *h;
8617
8618 h = kzalloc(sizeof(*h), GFP_KERNEL);
8619 if (!h)
8620 return NULL;
8621
8622 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
8623 if (!h->reply_map) {
8624 kfree(h);
8625 return NULL;
8626 }
8627 return h;
8628 }
8629
8630 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8631 {
8632 int rc;
8633 struct ctlr_info *h;
8634 int try_soft_reset = 0;
8635 unsigned long flags;
8636 u32 board_id;
8637
8638 if (number_of_controllers == 0)
8639 printk(KERN_INFO DRIVER_NAME "\n");
8640
8641 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8642 if (rc < 0) {
8643 dev_warn(&pdev->dev, "Board ID not found\n");
8644 return rc;
8645 }
8646
8647 rc = hpsa_init_reset_devices(pdev, board_id);
8648 if (rc) {
8649 if (rc != -ENOTSUPP)
8650 return rc;
8651 /* If the reset fails in a particular way (it has no way to do
8652 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8653 * a soft reset once we get the controller configured up to the
8654 * point that it can accept a command.
8655 */
8656 try_soft_reset = 1;
8657 rc = 0;
8658 }
8659
8660 reinit_after_soft_reset:
8661
8662 /* Command structures must be aligned on a 32-byte boundary because
8663 * the 5 lower bits of the address are used by the hardware. and by
8664 * the driver. See comments in hpsa.h for more info.
8665 */
8666 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8667 h = hpda_alloc_ctlr_info();
8668 if (!h) {
8669 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8670 return -ENOMEM;
8671 }
8672
8673 h->pdev = pdev;
8674
8675 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8676 INIT_LIST_HEAD(&h->offline_device_list);
8677 spin_lock_init(&h->lock);
8678 spin_lock_init(&h->offline_device_lock);
8679 spin_lock_init(&h->scan_lock);
8680 spin_lock_init(&h->reset_lock);
8681 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8682
8683 /* Allocate and clear per-cpu variable lockup_detected */
8684 h->lockup_detected = alloc_percpu(u32);
8685 if (!h->lockup_detected) {
8686 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8687 rc = -ENOMEM;
8688 goto clean1; /* aer/h */
8689 }
8690 set_lockup_detected_for_all_cpus(h, 0);
8691
8692 rc = hpsa_pci_init(h);
8693 if (rc)
8694 goto clean2; /* lu, aer/h */
8695
8696 /* relies on h-> settings made by hpsa_pci_init, including
8697 * interrupt_mode h->intr */
8698 rc = hpsa_scsi_host_alloc(h);
8699 if (rc)
8700 goto clean2_5; /* pci, lu, aer/h */
8701
8702 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8703 h->ctlr = number_of_controllers;
8704 number_of_controllers++;
8705
8706 /* configure PCI DMA stuff */
8707 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8708 if (rc != 0) {
8709 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8710 if (rc != 0) {
8711 dev_err(&pdev->dev, "no suitable DMA available\n");
8712 goto clean3; /* shost, pci, lu, aer/h */
8713 }
8714 }
8715
8716 /* make sure the board interrupts are off */
8717 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8718
8719 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8720 if (rc)
8721 goto clean3; /* shost, pci, lu, aer/h */
8722 rc = hpsa_alloc_cmd_pool(h);
8723 if (rc)
8724 goto clean4; /* irq, shost, pci, lu, aer/h */
8725 rc = hpsa_alloc_sg_chain_blocks(h);
8726 if (rc)
8727 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8728 init_waitqueue_head(&h->scan_wait_queue);
8729 init_waitqueue_head(&h->event_sync_wait_queue);
8730 mutex_init(&h->reset_mutex);
8731 h->scan_finished = 1; /* no scan currently in progress */
8732 h->scan_waiting = 0;
8733
8734 pci_set_drvdata(pdev, h);
8735 h->ndevices = 0;
8736
8737 spin_lock_init(&h->devlock);
8738 rc = hpsa_put_ctlr_into_performant_mode(h);
8739 if (rc)
8740 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8741
8742 /* create the resubmit workqueue */
8743 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8744 if (!h->rescan_ctlr_wq) {
8745 rc = -ENOMEM;
8746 goto clean7;
8747 }
8748
8749 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8750 if (!h->resubmit_wq) {
8751 rc = -ENOMEM;
8752 goto clean7; /* aer/h */
8753 }
8754
8755 h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
8756 if (!h->monitor_ctlr_wq) {
8757 rc = -ENOMEM;
8758 goto clean7;
8759 }
8760
8761 /*
8762 * At this point, the controller is ready to take commands.
8763 * Now, if reset_devices and the hard reset didn't work, try
8764 * the soft reset and see if that works.
8765 */
8766 if (try_soft_reset) {
8767
8768 /* This is kind of gross. We may or may not get a completion
8769 * from the soft reset command, and if we do, then the value
8770 * from the fifo may or may not be valid. So, we wait 10 secs
8771 * after the reset throwing away any completions we get during
8772 * that time. Unregister the interrupt handler and register
8773 * fake ones to scoop up any residual completions.
8774 */
8775 spin_lock_irqsave(&h->lock, flags);
8776 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8777 spin_unlock_irqrestore(&h->lock, flags);
8778 hpsa_free_irqs(h);
8779 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8780 hpsa_intx_discard_completions);
8781 if (rc) {
8782 dev_warn(&h->pdev->dev,
8783 "Failed to request_irq after soft reset.\n");
8784 /*
8785 * cannot goto clean7 or free_irqs will be called
8786 * again. Instead, do its work
8787 */
8788 hpsa_free_performant_mode(h); /* clean7 */
8789 hpsa_free_sg_chain_blocks(h); /* clean6 */
8790 hpsa_free_cmd_pool(h); /* clean5 */
8791 /*
8792 * skip hpsa_free_irqs(h) clean4 since that
8793 * was just called before request_irqs failed
8794 */
8795 goto clean3;
8796 }
8797
8798 rc = hpsa_kdump_soft_reset(h);
8799 if (rc)
8800 /* Neither hard nor soft reset worked, we're hosed. */
8801 goto clean7;
8802
8803 dev_info(&h->pdev->dev, "Board READY.\n");
8804 dev_info(&h->pdev->dev,
8805 "Waiting for stale completions to drain.\n");
8806 h->access.set_intr_mask(h, HPSA_INTR_ON);
8807 msleep(10000);
8808 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8809
8810 rc = controller_reset_failed(h->cfgtable);
8811 if (rc)
8812 dev_info(&h->pdev->dev,
8813 "Soft reset appears to have failed.\n");
8814
8815 /* since the controller's reset, we have to go back and re-init
8816 * everything. Easiest to just forget what we've done and do it
8817 * all over again.
8818 */
8819 hpsa_undo_allocations_after_kdump_soft_reset(h);
8820 try_soft_reset = 0;
8821 if (rc)
8822 /* don't goto clean, we already unallocated */
8823 return -ENODEV;
8824
8825 goto reinit_after_soft_reset;
8826 }
8827
8828 /* Enable Accelerated IO path at driver layer */
8829 h->acciopath_status = 1;
8830 /* Disable discovery polling.*/
8831 h->discovery_polling = 0;
8832
8833
8834 /* Turn the interrupts on so we can service requests */
8835 h->access.set_intr_mask(h, HPSA_INTR_ON);
8836
8837 hpsa_hba_inquiry(h);
8838
8839 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8840 if (!h->lastlogicals)
8841 dev_info(&h->pdev->dev,
8842 "Can't track change to report lun data\n");
8843
8844 /* hook into SCSI subsystem */
8845 rc = hpsa_scsi_add_host(h);
8846 if (rc)
8847 goto clean8; /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8848
8849 /* Monitor the controller for firmware lockups */
8850 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8851 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8852 schedule_delayed_work(&h->monitor_ctlr_work,
8853 h->heartbeat_sample_interval);
8854 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8855 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8856 h->heartbeat_sample_interval);
8857 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8858 schedule_delayed_work(&h->event_monitor_work,
8859 HPSA_EVENT_MONITOR_INTERVAL);
8860 return 0;
8861
8862 clean8: /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8863 kfree(h->lastlogicals);
8864 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8865 hpsa_free_performant_mode(h);
8866 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8867 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8868 hpsa_free_sg_chain_blocks(h);
8869 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8870 hpsa_free_cmd_pool(h);
8871 clean4: /* irq, shost, pci, lu, aer/h */
8872 hpsa_free_irqs(h);
8873 clean3: /* shost, pci, lu, aer/h */
8874 scsi_host_put(h->scsi_host);
8875 h->scsi_host = NULL;
8876 clean2_5: /* pci, lu, aer/h */
8877 hpsa_free_pci_init(h);
8878 clean2: /* lu, aer/h */
8879 if (h->lockup_detected) {
8880 free_percpu(h->lockup_detected);
8881 h->lockup_detected = NULL;
8882 }
8883 clean1: /* wq/aer/h */
8884 if (h->resubmit_wq) {
8885 destroy_workqueue(h->resubmit_wq);
8886 h->resubmit_wq = NULL;
8887 }
8888 if (h->rescan_ctlr_wq) {
8889 destroy_workqueue(h->rescan_ctlr_wq);
8890 h->rescan_ctlr_wq = NULL;
8891 }
8892 if (h->monitor_ctlr_wq) {
8893 destroy_workqueue(h->monitor_ctlr_wq);
8894 h->monitor_ctlr_wq = NULL;
8895 }
8896 kfree(h);
8897 return rc;
8898 }
8899
8900 static void hpsa_flush_cache(struct ctlr_info *h)
8901 {
8902 char *flush_buf;
8903 struct CommandList *c;
8904 int rc;
8905
8906 if (unlikely(lockup_detected(h)))
8907 return;
8908 flush_buf = kzalloc(4, GFP_KERNEL);
8909 if (!flush_buf)
8910 return;
8911
8912 c = cmd_alloc(h);
8913
8914 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8915 RAID_CTLR_LUNID, TYPE_CMD)) {
8916 goto out;
8917 }
8918 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8919 DEFAULT_TIMEOUT);
8920 if (rc)
8921 goto out;
8922 if (c->err_info->CommandStatus != 0)
8923 out:
8924 dev_warn(&h->pdev->dev,
8925 "error flushing cache on controller\n");
8926 cmd_free(h, c);
8927 kfree(flush_buf);
8928 }
8929
8930 /* Make controller gather fresh report lun data each time we
8931 * send down a report luns request
8932 */
8933 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8934 {
8935 u32 *options;
8936 struct CommandList *c;
8937 int rc;
8938
8939 /* Don't bother trying to set diag options if locked up */
8940 if (unlikely(h->lockup_detected))
8941 return;
8942
8943 options = kzalloc(sizeof(*options), GFP_KERNEL);
8944 if (!options)
8945 return;
8946
8947 c = cmd_alloc(h);
8948
8949 /* first, get the current diag options settings */
8950 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8951 RAID_CTLR_LUNID, TYPE_CMD))
8952 goto errout;
8953
8954 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8955 NO_TIMEOUT);
8956 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8957 goto errout;
8958
8959 /* Now, set the bit for disabling the RLD caching */
8960 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8961
8962 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8963 RAID_CTLR_LUNID, TYPE_CMD))
8964 goto errout;
8965
8966 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8967 NO_TIMEOUT);
8968 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8969 goto errout;
8970
8971 /* Now verify that it got set: */
8972 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8973 RAID_CTLR_LUNID, TYPE_CMD))
8974 goto errout;
8975
8976 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8977 NO_TIMEOUT);
8978 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8979 goto errout;
8980
8981 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8982 goto out;
8983
8984 errout:
8985 dev_err(&h->pdev->dev,
8986 "Error: failed to disable report lun data caching.\n");
8987 out:
8988 cmd_free(h, c);
8989 kfree(options);
8990 }
8991
8992 static void __hpsa_shutdown(struct pci_dev *pdev)
8993 {
8994 struct ctlr_info *h;
8995
8996 h = pci_get_drvdata(pdev);
8997 /* Turn board interrupts off and send the flush cache command
8998 * sendcmd will turn off interrupt, and send the flush...
8999 * To write all data in the battery backed cache to disks
9000 */
9001 hpsa_flush_cache(h);
9002 h->access.set_intr_mask(h, HPSA_INTR_OFF);
9003 hpsa_free_irqs(h); /* init_one 4 */
9004 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
9005 }
9006
9007 static void hpsa_shutdown(struct pci_dev *pdev)
9008 {
9009 __hpsa_shutdown(pdev);
9010 pci_disable_device(pdev);
9011 }
9012
9013 static void hpsa_free_device_info(struct ctlr_info *h)
9014 {
9015 int i;
9016
9017 for (i = 0; i < h->ndevices; i++) {
9018 kfree(h->dev[i]);
9019 h->dev[i] = NULL;
9020 }
9021 }
9022
9023 static void hpsa_remove_one(struct pci_dev *pdev)
9024 {
9025 struct ctlr_info *h;
9026 unsigned long flags;
9027
9028 if (pci_get_drvdata(pdev) == NULL) {
9029 dev_err(&pdev->dev, "unable to remove device\n");
9030 return;
9031 }
9032 h = pci_get_drvdata(pdev);
9033
9034 /* Get rid of any controller monitoring work items */
9035 spin_lock_irqsave(&h->lock, flags);
9036 h->remove_in_progress = 1;
9037 spin_unlock_irqrestore(&h->lock, flags);
9038 cancel_delayed_work_sync(&h->monitor_ctlr_work);
9039 cancel_delayed_work_sync(&h->rescan_ctlr_work);
9040 cancel_delayed_work_sync(&h->event_monitor_work);
9041 destroy_workqueue(h->rescan_ctlr_wq);
9042 destroy_workqueue(h->resubmit_wq);
9043 destroy_workqueue(h->monitor_ctlr_wq);
9044
9045 hpsa_delete_sas_host(h);
9046
9047 /*
9048 * Call before disabling interrupts.
9049 * scsi_remove_host can trigger I/O operations especially
9050 * when multipath is enabled. There can be SYNCHRONIZE CACHE
9051 * operations which cannot complete and will hang the system.
9052 */
9053 if (h->scsi_host)
9054 scsi_remove_host(h->scsi_host); /* init_one 8 */
9055 /* includes hpsa_free_irqs - init_one 4 */
9056 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9057 __hpsa_shutdown(pdev);
9058
9059 hpsa_free_device_info(h); /* scan */
9060
9061 kfree(h->hba_inquiry_data); /* init_one 10 */
9062 h->hba_inquiry_data = NULL; /* init_one 10 */
9063 hpsa_free_ioaccel2_sg_chain_blocks(h);
9064 hpsa_free_performant_mode(h); /* init_one 7 */
9065 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
9066 hpsa_free_cmd_pool(h); /* init_one 5 */
9067 kfree(h->lastlogicals);
9068
9069 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9070
9071 scsi_host_put(h->scsi_host); /* init_one 3 */
9072 h->scsi_host = NULL; /* init_one 3 */
9073
9074 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9075 hpsa_free_pci_init(h); /* init_one 2.5 */
9076
9077 free_percpu(h->lockup_detected); /* init_one 2 */
9078 h->lockup_detected = NULL; /* init_one 2 */
9079 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
9080
9081 hpda_free_ctlr_info(h); /* init_one 1 */
9082 }
9083
9084 static int __maybe_unused hpsa_suspend(
9085 __attribute__((unused)) struct device *dev)
9086 {
9087 return -ENOSYS;
9088 }
9089
9090 static int __maybe_unused hpsa_resume
9091 (__attribute__((unused)) struct device *dev)
9092 {
9093 return -ENOSYS;
9094 }
9095
9096 static SIMPLE_DEV_PM_OPS(hpsa_pm_ops, hpsa_suspend, hpsa_resume);
9097
9098 static struct pci_driver hpsa_pci_driver = {
9099 .name = HPSA,
9100 .probe = hpsa_init_one,
9101 .remove = hpsa_remove_one,
9102 .id_table = hpsa_pci_device_id, /* id_table */
9103 .shutdown = hpsa_shutdown,
9104 .driver.pm = &hpsa_pm_ops,
9105 };
9106
9107 /* Fill in bucket_map[], given nsgs (the max number of
9108 * scatter gather elements supported) and bucket[],
9109 * which is an array of 8 integers. The bucket[] array
9110 * contains 8 different DMA transfer sizes (in 16
9111 * byte increments) which the controller uses to fetch
9112 * commands. This function fills in bucket_map[], which
9113 * maps a given number of scatter gather elements to one of
9114 * the 8 DMA transfer sizes. The point of it is to allow the
9115 * controller to only do as much DMA as needed to fetch the
9116 * command, with the DMA transfer size encoded in the lower
9117 * bits of the command address.
9118 */
9119 static void calc_bucket_map(int bucket[], int num_buckets,
9120 int nsgs, int min_blocks, u32 *bucket_map)
9121 {
9122 int i, j, b, size;
9123
9124 /* Note, bucket_map must have nsgs+1 entries. */
9125 for (i = 0; i <= nsgs; i++) {
9126 /* Compute size of a command with i SG entries */
9127 size = i + min_blocks;
9128 b = num_buckets; /* Assume the biggest bucket */
9129 /* Find the bucket that is just big enough */
9130 for (j = 0; j < num_buckets; j++) {
9131 if (bucket[j] >= size) {
9132 b = j;
9133 break;
9134 }
9135 }
9136 /* for a command with i SG entries, use bucket b. */
9137 bucket_map[i] = b;
9138 }
9139 }
9140
9141 /*
9142 * return -ENODEV on err, 0 on success (or no action)
9143 * allocates numerous items that must be freed later
9144 */
9145 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9146 {
9147 int i;
9148 unsigned long register_value;
9149 unsigned long transMethod = CFGTBL_Trans_Performant |
9150 (trans_support & CFGTBL_Trans_use_short_tags) |
9151 CFGTBL_Trans_enable_directed_msix |
9152 (trans_support & (CFGTBL_Trans_io_accel1 |
9153 CFGTBL_Trans_io_accel2));
9154 struct access_method access = SA5_performant_access;
9155
9156 /* This is a bit complicated. There are 8 registers on
9157 * the controller which we write to to tell it 8 different
9158 * sizes of commands which there may be. It's a way of
9159 * reducing the DMA done to fetch each command. Encoded into
9160 * each command's tag are 3 bits which communicate to the controller
9161 * which of the eight sizes that command fits within. The size of
9162 * each command depends on how many scatter gather entries there are.
9163 * Each SG entry requires 16 bytes. The eight registers are programmed
9164 * with the number of 16-byte blocks a command of that size requires.
9165 * The smallest command possible requires 5 such 16 byte blocks.
9166 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9167 * blocks. Note, this only extends to the SG entries contained
9168 * within the command block, and does not extend to chained blocks
9169 * of SG elements. bft[] contains the eight values we write to
9170 * the registers. They are not evenly distributed, but have more
9171 * sizes for small commands, and fewer sizes for larger commands.
9172 */
9173 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9174 #define MIN_IOACCEL2_BFT_ENTRY 5
9175 #define HPSA_IOACCEL2_HEADER_SZ 4
9176 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9177 13, 14, 15, 16, 17, 18, 19,
9178 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9179 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9180 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9181 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9182 16 * MIN_IOACCEL2_BFT_ENTRY);
9183 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9184 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9185 /* 5 = 1 s/g entry or 4k
9186 * 6 = 2 s/g entry or 8k
9187 * 8 = 4 s/g entry or 16k
9188 * 10 = 6 s/g entry or 24k
9189 */
9190
9191 /* If the controller supports either ioaccel method then
9192 * we can also use the RAID stack submit path that does not
9193 * perform the superfluous readl() after each command submission.
9194 */
9195 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9196 access = SA5_performant_access_no_read;
9197
9198 /* Controller spec: zero out this buffer. */
9199 for (i = 0; i < h->nreply_queues; i++)
9200 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9201
9202 bft[7] = SG_ENTRIES_IN_CMD + 4;
9203 calc_bucket_map(bft, ARRAY_SIZE(bft),
9204 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9205 for (i = 0; i < 8; i++)
9206 writel(bft[i], &h->transtable->BlockFetch[i]);
9207
9208 /* size of controller ring buffer */
9209 writel(h->max_commands, &h->transtable->RepQSize);
9210 writel(h->nreply_queues, &h->transtable->RepQCount);
9211 writel(0, &h->transtable->RepQCtrAddrLow32);
9212 writel(0, &h->transtable->RepQCtrAddrHigh32);
9213
9214 for (i = 0; i < h->nreply_queues; i++) {
9215 writel(0, &h->transtable->RepQAddr[i].upper);
9216 writel(h->reply_queue[i].busaddr,
9217 &h->transtable->RepQAddr[i].lower);
9218 }
9219
9220 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9221 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9222 /*
9223 * enable outbound interrupt coalescing in accelerator mode;
9224 */
9225 if (trans_support & CFGTBL_Trans_io_accel1) {
9226 access = SA5_ioaccel_mode1_access;
9227 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9228 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9229 } else
9230 if (trans_support & CFGTBL_Trans_io_accel2)
9231 access = SA5_ioaccel_mode2_access;
9232 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9233 if (hpsa_wait_for_mode_change_ack(h)) {
9234 dev_err(&h->pdev->dev,
9235 "performant mode problem - doorbell timeout\n");
9236 return -ENODEV;
9237 }
9238 register_value = readl(&(h->cfgtable->TransportActive));
9239 if (!(register_value & CFGTBL_Trans_Performant)) {
9240 dev_err(&h->pdev->dev,
9241 "performant mode problem - transport not active\n");
9242 return -ENODEV;
9243 }
9244 /* Change the access methods to the performant access methods */
9245 h->access = access;
9246 h->transMethod = transMethod;
9247
9248 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9249 (trans_support & CFGTBL_Trans_io_accel2)))
9250 return 0;
9251
9252 if (trans_support & CFGTBL_Trans_io_accel1) {
9253 /* Set up I/O accelerator mode */
9254 for (i = 0; i < h->nreply_queues; i++) {
9255 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9256 h->reply_queue[i].current_entry =
9257 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9258 }
9259 bft[7] = h->ioaccel_maxsg + 8;
9260 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9261 h->ioaccel1_blockFetchTable);
9262
9263 /* initialize all reply queue entries to unused */
9264 for (i = 0; i < h->nreply_queues; i++)
9265 memset(h->reply_queue[i].head,
9266 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9267 h->reply_queue_size);
9268
9269 /* set all the constant fields in the accelerator command
9270 * frames once at init time to save CPU cycles later.
9271 */
9272 for (i = 0; i < h->nr_cmds; i++) {
9273 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9274
9275 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9276 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9277 (i * sizeof(struct ErrorInfo)));
9278 cp->err_info_len = sizeof(struct ErrorInfo);
9279 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9280 cp->host_context_flags =
9281 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9282 cp->timeout_sec = 0;
9283 cp->ReplyQueue = 0;
9284 cp->tag =
9285 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9286 cp->host_addr =
9287 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9288 (i * sizeof(struct io_accel1_cmd)));
9289 }
9290 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9291 u64 cfg_offset, cfg_base_addr_index;
9292 u32 bft2_offset, cfg_base_addr;
9293
9294 hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9295 &cfg_base_addr_index, &cfg_offset);
9296 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9297 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9298 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9299 4, h->ioaccel2_blockFetchTable);
9300 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9301 BUILD_BUG_ON(offsetof(struct CfgTable,
9302 io_accel_request_size_offset) != 0xb8);
9303 h->ioaccel2_bft2_regs =
9304 remap_pci_mem(pci_resource_start(h->pdev,
9305 cfg_base_addr_index) +
9306 cfg_offset + bft2_offset,
9307 ARRAY_SIZE(bft2) *
9308 sizeof(*h->ioaccel2_bft2_regs));
9309 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9310 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9311 }
9312 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9313 if (hpsa_wait_for_mode_change_ack(h)) {
9314 dev_err(&h->pdev->dev,
9315 "performant mode problem - enabling ioaccel mode\n");
9316 return -ENODEV;
9317 }
9318 return 0;
9319 }
9320
9321 /* Free ioaccel1 mode command blocks and block fetch table */
9322 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9323 {
9324 if (h->ioaccel_cmd_pool) {
9325 dma_free_coherent(&h->pdev->dev,
9326 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9327 h->ioaccel_cmd_pool,
9328 h->ioaccel_cmd_pool_dhandle);
9329 h->ioaccel_cmd_pool = NULL;
9330 h->ioaccel_cmd_pool_dhandle = 0;
9331 }
9332 kfree(h->ioaccel1_blockFetchTable);
9333 h->ioaccel1_blockFetchTable = NULL;
9334 }
9335
9336 /* Allocate ioaccel1 mode command blocks and block fetch table */
9337 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9338 {
9339 h->ioaccel_maxsg =
9340 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9341 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9342 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9343
9344 /* Command structures must be aligned on a 128-byte boundary
9345 * because the 7 lower bits of the address are used by the
9346 * hardware.
9347 */
9348 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9349 IOACCEL1_COMMANDLIST_ALIGNMENT);
9350 h->ioaccel_cmd_pool =
9351 dma_alloc_coherent(&h->pdev->dev,
9352 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9353 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9354
9355 h->ioaccel1_blockFetchTable =
9356 kmalloc(((h->ioaccel_maxsg + 1) *
9357 sizeof(u32)), GFP_KERNEL);
9358
9359 if ((h->ioaccel_cmd_pool == NULL) ||
9360 (h->ioaccel1_blockFetchTable == NULL))
9361 goto clean_up;
9362
9363 memset(h->ioaccel_cmd_pool, 0,
9364 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9365 return 0;
9366
9367 clean_up:
9368 hpsa_free_ioaccel1_cmd_and_bft(h);
9369 return -ENOMEM;
9370 }
9371
9372 /* Free ioaccel2 mode command blocks and block fetch table */
9373 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9374 {
9375 hpsa_free_ioaccel2_sg_chain_blocks(h);
9376
9377 if (h->ioaccel2_cmd_pool) {
9378 dma_free_coherent(&h->pdev->dev,
9379 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9380 h->ioaccel2_cmd_pool,
9381 h->ioaccel2_cmd_pool_dhandle);
9382 h->ioaccel2_cmd_pool = NULL;
9383 h->ioaccel2_cmd_pool_dhandle = 0;
9384 }
9385 kfree(h->ioaccel2_blockFetchTable);
9386 h->ioaccel2_blockFetchTable = NULL;
9387 }
9388
9389 /* Allocate ioaccel2 mode command blocks and block fetch table */
9390 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9391 {
9392 int rc;
9393
9394 /* Allocate ioaccel2 mode command blocks and block fetch table */
9395
9396 h->ioaccel_maxsg =
9397 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9398 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9399 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9400
9401 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9402 IOACCEL2_COMMANDLIST_ALIGNMENT);
9403 h->ioaccel2_cmd_pool =
9404 dma_alloc_coherent(&h->pdev->dev,
9405 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9406 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9407
9408 h->ioaccel2_blockFetchTable =
9409 kmalloc(((h->ioaccel_maxsg + 1) *
9410 sizeof(u32)), GFP_KERNEL);
9411
9412 if ((h->ioaccel2_cmd_pool == NULL) ||
9413 (h->ioaccel2_blockFetchTable == NULL)) {
9414 rc = -ENOMEM;
9415 goto clean_up;
9416 }
9417
9418 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9419 if (rc)
9420 goto clean_up;
9421
9422 memset(h->ioaccel2_cmd_pool, 0,
9423 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9424 return 0;
9425
9426 clean_up:
9427 hpsa_free_ioaccel2_cmd_and_bft(h);
9428 return rc;
9429 }
9430
9431 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9432 static void hpsa_free_performant_mode(struct ctlr_info *h)
9433 {
9434 kfree(h->blockFetchTable);
9435 h->blockFetchTable = NULL;
9436 hpsa_free_reply_queues(h);
9437 hpsa_free_ioaccel1_cmd_and_bft(h);
9438 hpsa_free_ioaccel2_cmd_and_bft(h);
9439 }
9440
9441 /* return -ENODEV on error, 0 on success (or no action)
9442 * allocates numerous items that must be freed later
9443 */
9444 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9445 {
9446 u32 trans_support;
9447 unsigned long transMethod = CFGTBL_Trans_Performant |
9448 CFGTBL_Trans_use_short_tags;
9449 int i, rc;
9450
9451 if (hpsa_simple_mode)
9452 return 0;
9453
9454 trans_support = readl(&(h->cfgtable->TransportSupport));
9455 if (!(trans_support & PERFORMANT_MODE))
9456 return 0;
9457
9458 /* Check for I/O accelerator mode support */
9459 if (trans_support & CFGTBL_Trans_io_accel1) {
9460 transMethod |= CFGTBL_Trans_io_accel1 |
9461 CFGTBL_Trans_enable_directed_msix;
9462 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9463 if (rc)
9464 return rc;
9465 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9466 transMethod |= CFGTBL_Trans_io_accel2 |
9467 CFGTBL_Trans_enable_directed_msix;
9468 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9469 if (rc)
9470 return rc;
9471 }
9472
9473 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9474 hpsa_get_max_perf_mode_cmds(h);
9475 /* Performant mode ring buffer and supporting data structures */
9476 h->reply_queue_size = h->max_commands * sizeof(u64);
9477
9478 for (i = 0; i < h->nreply_queues; i++) {
9479 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9480 h->reply_queue_size,
9481 &h->reply_queue[i].busaddr,
9482 GFP_KERNEL);
9483 if (!h->reply_queue[i].head) {
9484 rc = -ENOMEM;
9485 goto clean1; /* rq, ioaccel */
9486 }
9487 h->reply_queue[i].size = h->max_commands;
9488 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9489 h->reply_queue[i].current_entry = 0;
9490 }
9491
9492 /* Need a block fetch table for performant mode */
9493 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9494 sizeof(u32)), GFP_KERNEL);
9495 if (!h->blockFetchTable) {
9496 rc = -ENOMEM;
9497 goto clean1; /* rq, ioaccel */
9498 }
9499
9500 rc = hpsa_enter_performant_mode(h, trans_support);
9501 if (rc)
9502 goto clean2; /* bft, rq, ioaccel */
9503 return 0;
9504
9505 clean2: /* bft, rq, ioaccel */
9506 kfree(h->blockFetchTable);
9507 h->blockFetchTable = NULL;
9508 clean1: /* rq, ioaccel */
9509 hpsa_free_reply_queues(h);
9510 hpsa_free_ioaccel1_cmd_and_bft(h);
9511 hpsa_free_ioaccel2_cmd_and_bft(h);
9512 return rc;
9513 }
9514
9515 static int is_accelerated_cmd(struct CommandList *c)
9516 {
9517 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9518 }
9519
9520 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9521 {
9522 struct CommandList *c = NULL;
9523 int i, accel_cmds_out;
9524 int refcount;
9525
9526 do { /* wait for all outstanding ioaccel commands to drain out */
9527 accel_cmds_out = 0;
9528 for (i = 0; i < h->nr_cmds; i++) {
9529 c = h->cmd_pool + i;
9530 refcount = atomic_inc_return(&c->refcount);
9531 if (refcount > 1) /* Command is allocated */
9532 accel_cmds_out += is_accelerated_cmd(c);
9533 cmd_free(h, c);
9534 }
9535 if (accel_cmds_out <= 0)
9536 break;
9537 msleep(100);
9538 } while (1);
9539 }
9540
9541 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9542 struct hpsa_sas_port *hpsa_sas_port)
9543 {
9544 struct hpsa_sas_phy *hpsa_sas_phy;
9545 struct sas_phy *phy;
9546
9547 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9548 if (!hpsa_sas_phy)
9549 return NULL;
9550
9551 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9552 hpsa_sas_port->next_phy_index);
9553 if (!phy) {
9554 kfree(hpsa_sas_phy);
9555 return NULL;
9556 }
9557
9558 hpsa_sas_port->next_phy_index++;
9559 hpsa_sas_phy->phy = phy;
9560 hpsa_sas_phy->parent_port = hpsa_sas_port;
9561
9562 return hpsa_sas_phy;
9563 }
9564
9565 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9566 {
9567 struct sas_phy *phy = hpsa_sas_phy->phy;
9568
9569 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9570 if (hpsa_sas_phy->added_to_port)
9571 list_del(&hpsa_sas_phy->phy_list_entry);
9572 sas_phy_delete(phy);
9573 kfree(hpsa_sas_phy);
9574 }
9575
9576 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9577 {
9578 int rc;
9579 struct hpsa_sas_port *hpsa_sas_port;
9580 struct sas_phy *phy;
9581 struct sas_identify *identify;
9582
9583 hpsa_sas_port = hpsa_sas_phy->parent_port;
9584 phy = hpsa_sas_phy->phy;
9585
9586 identify = &phy->identify;
9587 memset(identify, 0, sizeof(*identify));
9588 identify->sas_address = hpsa_sas_port->sas_address;
9589 identify->device_type = SAS_END_DEVICE;
9590 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9591 identify->target_port_protocols = SAS_PROTOCOL_STP;
9592 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9593 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9594 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9595 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9596 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9597
9598 rc = sas_phy_add(hpsa_sas_phy->phy);
9599 if (rc)
9600 return rc;
9601
9602 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9603 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9604 &hpsa_sas_port->phy_list_head);
9605 hpsa_sas_phy->added_to_port = true;
9606
9607 return 0;
9608 }
9609
9610 static int
9611 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9612 struct sas_rphy *rphy)
9613 {
9614 struct sas_identify *identify;
9615
9616 identify = &rphy->identify;
9617 identify->sas_address = hpsa_sas_port->sas_address;
9618 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9619 identify->target_port_protocols = SAS_PROTOCOL_STP;
9620
9621 return sas_rphy_add(rphy);
9622 }
9623
9624 static struct hpsa_sas_port
9625 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9626 u64 sas_address)
9627 {
9628 int rc;
9629 struct hpsa_sas_port *hpsa_sas_port;
9630 struct sas_port *port;
9631
9632 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9633 if (!hpsa_sas_port)
9634 return NULL;
9635
9636 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9637 hpsa_sas_port->parent_node = hpsa_sas_node;
9638
9639 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9640 if (!port)
9641 goto free_hpsa_port;
9642
9643 rc = sas_port_add(port);
9644 if (rc)
9645 goto free_sas_port;
9646
9647 hpsa_sas_port->port = port;
9648 hpsa_sas_port->sas_address = sas_address;
9649 list_add_tail(&hpsa_sas_port->port_list_entry,
9650 &hpsa_sas_node->port_list_head);
9651
9652 return hpsa_sas_port;
9653
9654 free_sas_port:
9655 sas_port_free(port);
9656 free_hpsa_port:
9657 kfree(hpsa_sas_port);
9658
9659 return NULL;
9660 }
9661
9662 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9663 {
9664 struct hpsa_sas_phy *hpsa_sas_phy;
9665 struct hpsa_sas_phy *next;
9666
9667 list_for_each_entry_safe(hpsa_sas_phy, next,
9668 &hpsa_sas_port->phy_list_head, phy_list_entry)
9669 hpsa_free_sas_phy(hpsa_sas_phy);
9670
9671 sas_port_delete(hpsa_sas_port->port);
9672 list_del(&hpsa_sas_port->port_list_entry);
9673 kfree(hpsa_sas_port);
9674 }
9675
9676 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9677 {
9678 struct hpsa_sas_node *hpsa_sas_node;
9679
9680 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9681 if (hpsa_sas_node) {
9682 hpsa_sas_node->parent_dev = parent_dev;
9683 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9684 }
9685
9686 return hpsa_sas_node;
9687 }
9688
9689 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9690 {
9691 struct hpsa_sas_port *hpsa_sas_port;
9692 struct hpsa_sas_port *next;
9693
9694 if (!hpsa_sas_node)
9695 return;
9696
9697 list_for_each_entry_safe(hpsa_sas_port, next,
9698 &hpsa_sas_node->port_list_head, port_list_entry)
9699 hpsa_free_sas_port(hpsa_sas_port);
9700
9701 kfree(hpsa_sas_node);
9702 }
9703
9704 static struct hpsa_scsi_dev_t
9705 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9706 struct sas_rphy *rphy)
9707 {
9708 int i;
9709 struct hpsa_scsi_dev_t *device;
9710
9711 for (i = 0; i < h->ndevices; i++) {
9712 device = h->dev[i];
9713 if (!device->sas_port)
9714 continue;
9715 if (device->sas_port->rphy == rphy)
9716 return device;
9717 }
9718
9719 return NULL;
9720 }
9721
9722 static int hpsa_add_sas_host(struct ctlr_info *h)
9723 {
9724 int rc;
9725 struct device *parent_dev;
9726 struct hpsa_sas_node *hpsa_sas_node;
9727 struct hpsa_sas_port *hpsa_sas_port;
9728 struct hpsa_sas_phy *hpsa_sas_phy;
9729
9730 parent_dev = &h->scsi_host->shost_dev;
9731
9732 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9733 if (!hpsa_sas_node)
9734 return -ENOMEM;
9735
9736 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9737 if (!hpsa_sas_port) {
9738 rc = -ENODEV;
9739 goto free_sas_node;
9740 }
9741
9742 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9743 if (!hpsa_sas_phy) {
9744 rc = -ENODEV;
9745 goto free_sas_port;
9746 }
9747
9748 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9749 if (rc)
9750 goto free_sas_phy;
9751
9752 h->sas_host = hpsa_sas_node;
9753
9754 return 0;
9755
9756 free_sas_phy:
9757 hpsa_free_sas_phy(hpsa_sas_phy);
9758 free_sas_port:
9759 hpsa_free_sas_port(hpsa_sas_port);
9760 free_sas_node:
9761 hpsa_free_sas_node(hpsa_sas_node);
9762
9763 return rc;
9764 }
9765
9766 static void hpsa_delete_sas_host(struct ctlr_info *h)
9767 {
9768 hpsa_free_sas_node(h->sas_host);
9769 }
9770
9771 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9772 struct hpsa_scsi_dev_t *device)
9773 {
9774 int rc;
9775 struct hpsa_sas_port *hpsa_sas_port;
9776 struct sas_rphy *rphy;
9777
9778 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9779 if (!hpsa_sas_port)
9780 return -ENOMEM;
9781
9782 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9783 if (!rphy) {
9784 rc = -ENODEV;
9785 goto free_sas_port;
9786 }
9787
9788 hpsa_sas_port->rphy = rphy;
9789 device->sas_port = hpsa_sas_port;
9790
9791 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9792 if (rc)
9793 goto free_sas_port;
9794
9795 return 0;
9796
9797 free_sas_port:
9798 hpsa_free_sas_port(hpsa_sas_port);
9799 device->sas_port = NULL;
9800
9801 return rc;
9802 }
9803
9804 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9805 {
9806 if (device->sas_port) {
9807 hpsa_free_sas_port(device->sas_port);
9808 device->sas_port = NULL;
9809 }
9810 }
9811
9812 static int
9813 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9814 {
9815 return 0;
9816 }
9817
9818 static int
9819 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9820 {
9821 struct Scsi_Host *shost = phy_to_shost(rphy);
9822 struct ctlr_info *h;
9823 struct hpsa_scsi_dev_t *sd;
9824
9825 if (!shost)
9826 return -ENXIO;
9827
9828 h = shost_to_hba(shost);
9829
9830 if (!h)
9831 return -ENXIO;
9832
9833 sd = hpsa_find_device_by_sas_rphy(h, rphy);
9834 if (!sd)
9835 return -ENXIO;
9836
9837 *identifier = sd->eli;
9838
9839 return 0;
9840 }
9841
9842 static int
9843 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9844 {
9845 return -ENXIO;
9846 }
9847
9848 static int
9849 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9850 {
9851 return 0;
9852 }
9853
9854 static int
9855 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9856 {
9857 return 0;
9858 }
9859
9860 static int
9861 hpsa_sas_phy_setup(struct sas_phy *phy)
9862 {
9863 return 0;
9864 }
9865
9866 static void
9867 hpsa_sas_phy_release(struct sas_phy *phy)
9868 {
9869 }
9870
9871 static int
9872 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9873 {
9874 return -EINVAL;
9875 }
9876
9877 static struct sas_function_template hpsa_sas_transport_functions = {
9878 .get_linkerrors = hpsa_sas_get_linkerrors,
9879 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9880 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9881 .phy_reset = hpsa_sas_phy_reset,
9882 .phy_enable = hpsa_sas_phy_enable,
9883 .phy_setup = hpsa_sas_phy_setup,
9884 .phy_release = hpsa_sas_phy_release,
9885 .set_phy_speed = hpsa_sas_phy_speed,
9886 };
9887
9888 /*
9889 * This is it. Register the PCI driver information for the cards we control
9890 * the OS will call our registered routines when it finds one of our cards.
9891 */
9892 static int __init hpsa_init(void)
9893 {
9894 int rc;
9895
9896 hpsa_sas_transport_template =
9897 sas_attach_transport(&hpsa_sas_transport_functions);
9898 if (!hpsa_sas_transport_template)
9899 return -ENODEV;
9900
9901 rc = pci_register_driver(&hpsa_pci_driver);
9902
9903 if (rc)
9904 sas_release_transport(hpsa_sas_transport_template);
9905
9906 return rc;
9907 }
9908
9909 static void __exit hpsa_cleanup(void)
9910 {
9911 pci_unregister_driver(&hpsa_pci_driver);
9912 sas_release_transport(hpsa_sas_transport_template);
9913 }
9914
9915 static void __attribute__((unused)) verify_offsets(void)
9916 {
9917 #define VERIFY_OFFSET(member, offset) \
9918 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9919
9920 VERIFY_OFFSET(structure_size, 0);
9921 VERIFY_OFFSET(volume_blk_size, 4);
9922 VERIFY_OFFSET(volume_blk_cnt, 8);
9923 VERIFY_OFFSET(phys_blk_shift, 16);
9924 VERIFY_OFFSET(parity_rotation_shift, 17);
9925 VERIFY_OFFSET(strip_size, 18);
9926 VERIFY_OFFSET(disk_starting_blk, 20);
9927 VERIFY_OFFSET(disk_blk_cnt, 28);
9928 VERIFY_OFFSET(data_disks_per_row, 36);
9929 VERIFY_OFFSET(metadata_disks_per_row, 38);
9930 VERIFY_OFFSET(row_cnt, 40);
9931 VERIFY_OFFSET(layout_map_count, 42);
9932 VERIFY_OFFSET(flags, 44);
9933 VERIFY_OFFSET(dekindex, 46);
9934 /* VERIFY_OFFSET(reserved, 48 */
9935 VERIFY_OFFSET(data, 64);
9936
9937 #undef VERIFY_OFFSET
9938
9939 #define VERIFY_OFFSET(member, offset) \
9940 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9941
9942 VERIFY_OFFSET(IU_type, 0);
9943 VERIFY_OFFSET(direction, 1);
9944 VERIFY_OFFSET(reply_queue, 2);
9945 /* VERIFY_OFFSET(reserved1, 3); */
9946 VERIFY_OFFSET(scsi_nexus, 4);
9947 VERIFY_OFFSET(Tag, 8);
9948 VERIFY_OFFSET(cdb, 16);
9949 VERIFY_OFFSET(cciss_lun, 32);
9950 VERIFY_OFFSET(data_len, 40);
9951 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9952 VERIFY_OFFSET(sg_count, 45);
9953 /* VERIFY_OFFSET(reserved3 */
9954 VERIFY_OFFSET(err_ptr, 48);
9955 VERIFY_OFFSET(err_len, 56);
9956 /* VERIFY_OFFSET(reserved4 */
9957 VERIFY_OFFSET(sg, 64);
9958
9959 #undef VERIFY_OFFSET
9960
9961 #define VERIFY_OFFSET(member, offset) \
9962 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9963
9964 VERIFY_OFFSET(dev_handle, 0x00);
9965 VERIFY_OFFSET(reserved1, 0x02);
9966 VERIFY_OFFSET(function, 0x03);
9967 VERIFY_OFFSET(reserved2, 0x04);
9968 VERIFY_OFFSET(err_info, 0x0C);
9969 VERIFY_OFFSET(reserved3, 0x10);
9970 VERIFY_OFFSET(err_info_len, 0x12);
9971 VERIFY_OFFSET(reserved4, 0x13);
9972 VERIFY_OFFSET(sgl_offset, 0x14);
9973 VERIFY_OFFSET(reserved5, 0x15);
9974 VERIFY_OFFSET(transfer_len, 0x1C);
9975 VERIFY_OFFSET(reserved6, 0x20);
9976 VERIFY_OFFSET(io_flags, 0x24);
9977 VERIFY_OFFSET(reserved7, 0x26);
9978 VERIFY_OFFSET(LUN, 0x34);
9979 VERIFY_OFFSET(control, 0x3C);
9980 VERIFY_OFFSET(CDB, 0x40);
9981 VERIFY_OFFSET(reserved8, 0x50);
9982 VERIFY_OFFSET(host_context_flags, 0x60);
9983 VERIFY_OFFSET(timeout_sec, 0x62);
9984 VERIFY_OFFSET(ReplyQueue, 0x64);
9985 VERIFY_OFFSET(reserved9, 0x65);
9986 VERIFY_OFFSET(tag, 0x68);
9987 VERIFY_OFFSET(host_addr, 0x70);
9988 VERIFY_OFFSET(CISS_LUN, 0x78);
9989 VERIFY_OFFSET(SG, 0x78 + 8);
9990 #undef VERIFY_OFFSET
9991 }
9992
9993 module_init(hpsa_init);
9994 module_exit(hpsa_cleanup);
Linux with added FPC-III support