drivers/soc/atmel/soc.c

   1 /*
   2  * Copyright (C) 2015 Atmel
   3  *
   4  * Alexandre Belloni <alexandre.belloni@free-electrons.com
   5  * Boris Brezillon <boris.brezillon@free-electrons.com
   6  *
   7  * This file is licensed under the terms of the GNU General Public
   8  * License version 2.  This program is licensed "as is" without any
   9  * warranty of any kind, whether express or implied.
  10  *
  11  */
  12
  13 #define pr_fmt(fmt)     "AT91: " fmt
  14
  15 #include <linux/io.h>
  16 #include <linux/of.h>
  17 #include <linux/of_address.h>
  18 #include <linux/of_platform.h>
  19 #include <linux/slab.h>
  20 #include <linux/sys_soc.h>
  21
  22 #include "soc.h"
  23
  24 #define AT91_DBGU_CIDR                  0x40
  25 #define AT91_DBGU_EXID                  0x44
  26 #define AT91_CHIPID_CIDR                0x00
  27 #define AT91_CHIPID_EXID                0x04
  28 #define AT91_CIDR_VERSION(x)            ((x) & 0x1f)
  29 #define AT91_CIDR_EXT                   BIT(31)
  30 #define AT91_CIDR_MATCH_MASK            0x7fffffe0
  31
  32 static const struct at91_soc __initconst socs[] = {
  33 #ifdef CONFIG_SOC_AT91RM9200
  34         AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200 BGA", "at91rm9200"),
  35 #endif
  36 #ifdef CONFIG_SOC_AT91SAM9
  37         AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
  38         AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
  39         AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
  40         AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
  41         AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
  42         AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
  43                  "at91sam9m11", "at91sam9g45"),
  44         AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
  45                  "at91sam9m10", "at91sam9g45"),
  46         AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
  47                  "at91sam9g46", "at91sam9g45"),
  48         AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
  49                  "at91sam9g45", "at91sam9g45"),
  50         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
  51                  "at91sam9g15", "at91sam9x5"),
  52         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
  53                  "at91sam9g35", "at91sam9x5"),
  54         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
  55                  "at91sam9x35", "at91sam9x5"),
  56         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
  57                  "at91sam9g25", "at91sam9x5"),
  58         AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
  59                  "at91sam9x25", "at91sam9x5"),
  60         AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
  61                  "at91sam9cn12", "at91sam9n12"),
  62         AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
  63                  "at91sam9n12", "at91sam9n12"),
  64         AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
  65                  "at91sam9cn11", "at91sam9n12"),
  66         AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
  67         AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
  68         AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
  69 #endif
  70 #ifdef CONFIG_SOC_SAM9X60
  71         AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_EXID_MATCH, "sam9x60", "sam9x60"),
  72         AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_D5M_EXID_MATCH,
  73                  "sam9x60 64MiB DDR2 SiP", "sam9x60"),
  74         AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_D1G_EXID_MATCH,
  75                  "sam9x60 128MiB DDR2 SiP", "sam9x60"),
  76         AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_D6K_EXID_MATCH,
  77                  "sam9x60 8MiB SDRAM SiP", "sam9x60"),
  78 #endif
  79 #ifdef CONFIG_SOC_SAMA5
  80         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
  81                  "sama5d21", "sama5d2"),
  82         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
  83                  "sama5d22", "sama5d2"),
  84         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D225C_D1M_EXID_MATCH,
  85                  "sama5d225c 16MiB SiP", "sama5d2"),
  86         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
  87                  "sama5d23", "sama5d2"),
  88         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
  89                  "sama5d24", "sama5d2"),
  90         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CU_EXID_MATCH,
  91                  "sama5d24", "sama5d2"),
  92         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D26CU_EXID_MATCH,
  93                  "sama5d26", "sama5d2"),
  94         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CU_EXID_MATCH,
  95                  "sama5d27", "sama5d2"),
  96         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
  97                  "sama5d27", "sama5d2"),
  98         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D1G_EXID_MATCH,
  99                  "sama5d27c 128MiB SiP", "sama5d2"),
 100         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D5M_EXID_MATCH,
 101                  "sama5d27c 64MiB SiP", "sama5d2"),
 102         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_LD1G_EXID_MATCH,
 103                  "sama5d27c 128MiB LPDDR2 SiP", "sama5d2"),
 104         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_LD2G_EXID_MATCH,
 105                  "sama5d27c 256MiB LPDDR2 SiP", "sama5d2"),
 106         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
 107                  "sama5d28", "sama5d2"),
 108         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
 109                  "sama5d28", "sama5d2"),
 110         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_D1G_EXID_MATCH,
 111                  "sama5d28c 128MiB SiP", "sama5d2"),
 112         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_LD1G_EXID_MATCH,
 113                  "sama5d28c 128MiB LPDDR2 SiP", "sama5d2"),
 114         AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_LD2G_EXID_MATCH,
 115                  "sama5d28c 256MiB LPDDR2 SiP", "sama5d2"),
 116         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
 117                  "sama5d31", "sama5d3"),
 118         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
 119                  "sama5d33", "sama5d3"),
 120         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH,
 121                  "sama5d34", "sama5d3"),
 122         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH,
 123                  "sama5d35", "sama5d3"),
 124         AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH,
 125                  "sama5d36", "sama5d3"),
 126         AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH,
 127                  "sama5d41", "sama5d4"),
 128         AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH,
 129                  "sama5d42", "sama5d4"),
 130         AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH,
 131                  "sama5d43", "sama5d4"),
 132         AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH,
 133                  "sama5d44", "sama5d4"),
 134 #endif
 135 #ifdef CONFIG_SOC_SAMV7
 136         AT91_SOC(SAME70Q21_CIDR_MATCH, SAME70Q21_EXID_MATCH,
 137                  "same70q21", "same7"),
 138         AT91_SOC(SAME70Q20_CIDR_MATCH, SAME70Q20_EXID_MATCH,
 139                  "same70q20", "same7"),
 140         AT91_SOC(SAME70Q19_CIDR_MATCH, SAME70Q19_EXID_MATCH,
 141                  "same70q19", "same7"),
 142         AT91_SOC(SAMS70Q21_CIDR_MATCH, SAMS70Q21_EXID_MATCH,
 143                  "sams70q21", "sams7"),
 144         AT91_SOC(SAMS70Q20_CIDR_MATCH, SAMS70Q20_EXID_MATCH,
 145                  "sams70q20", "sams7"),
 146         AT91_SOC(SAMS70Q19_CIDR_MATCH, SAMS70Q19_EXID_MATCH,
 147                  "sams70q19", "sams7"),
 148         AT91_SOC(SAMV71Q21_CIDR_MATCH, SAMV71Q21_EXID_MATCH,
 149                  "samv71q21", "samv7"),
 150         AT91_SOC(SAMV71Q20_CIDR_MATCH, SAMV71Q20_EXID_MATCH,
 151                  "samv71q20", "samv7"),
 152         AT91_SOC(SAMV71Q19_CIDR_MATCH, SAMV71Q19_EXID_MATCH,
 153                  "samv71q19", "samv7"),
 154         AT91_SOC(SAMV70Q20_CIDR_MATCH, SAMV70Q20_EXID_MATCH,
 155                  "samv70q20", "samv7"),
 156         AT91_SOC(SAMV70Q19_CIDR_MATCH, SAMV70Q19_EXID_MATCH,
 157                  "samv70q19", "samv7"),
 158 #endif
 159         { /* sentinel */ },
 160 };
 161
 162 static int __init at91_get_cidr_exid_from_dbgu(u32 *cidr, u32 *exid)
 163 {
 164         struct device_node *np;
 165         void __iomem *regs;
 166
 167         np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
 168         if (!np)
 169                 np = of_find_compatible_node(NULL, NULL,
 170                                              "atmel,at91sam9260-dbgu");
 171         if (!np)
 172                 return -ENODEV;
 173
 174         regs = of_iomap(np, 0);
 175         of_node_put(np);
 176
 177         if (!regs) {
 178                 pr_warn("Could not map DBGU iomem range");
 179                 return -ENXIO;
 180         }
 181
 182         *cidr = readl(regs + AT91_DBGU_CIDR);
 183         *exid = readl(regs + AT91_DBGU_EXID);
 184
 185         iounmap(regs);
 186
 187         return 0;
 188 }
 189
 190 static int __init at91_get_cidr_exid_from_chipid(u32 *cidr, u32 *exid)
 191 {
 192         struct device_node *np;
 193         void __iomem *regs;
 194
 195         np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-chipid");
 196         if (!np)
 197                 return -ENODEV;
 198
 199         regs = of_iomap(np, 0);
 200         of_node_put(np);
 201
 202         if (!regs) {
 203                 pr_warn("Could not map DBGU iomem range");
 204                 return -ENXIO;
 205         }
 206
 207         *cidr = readl(regs + AT91_CHIPID_CIDR);
 208         *exid = readl(regs + AT91_CHIPID_EXID);
 209
 210         iounmap(regs);
 211
 212         return 0;
 213 }
 214
 215 struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
 216 {
 217         struct soc_device_attribute *soc_dev_attr;
 218         const struct at91_soc *soc;
 219         struct soc_device *soc_dev;
 220         u32 cidr, exid;
 221         int ret;
 222
 223         /*
 224          * With SAMA5D2 and later SoCs, CIDR and EXID registers are no more
 225          * in the dbgu device but in the chipid device whose purpose is only
 226          * to expose these two registers.
 227          */
 228         ret = at91_get_cidr_exid_from_dbgu(&cidr, &exid);
 229         if (ret)
 230                 ret = at91_get_cidr_exid_from_chipid(&cidr, &exid);
 231         if (ret) {
 232                 if (ret == -ENODEV)
 233                         pr_warn("Could not find identification node");
 234                 return NULL;
 235         }
 236
 237         for (soc = socs; soc->name; soc++) {
 238                 if (soc->cidr_match != (cidr & AT91_CIDR_MATCH_MASK))
 239                         continue;
 240
 241                 if (!(cidr & AT91_CIDR_EXT) || soc->exid_match == exid)
 242                         break;
 243         }
 244
 245         if (!soc->name) {
 246                 pr_warn("Could not find matching SoC description\n");
 247                 return NULL;
 248         }
 249
 250         soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
 251         if (!soc_dev_attr)
 252                 return NULL;
 253
 254         soc_dev_attr->family = soc->family;
 255         soc_dev_attr->soc_id = soc->name;
 256         soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
 257                                            AT91_CIDR_VERSION(cidr));
 258         soc_dev = soc_device_register(soc_dev_attr);
 259         if (IS_ERR(soc_dev)) {
 260                 kfree(soc_dev_attr->revision);
 261                 kfree(soc_dev_attr);
 262                 pr_warn("Could not register SoC device\n");
 263                 return NULL;
 264         }
 265
 266         if (soc->family)
 267                 pr_info("Detected SoC family: %s\n", soc->family);
 268         pr_info("Detected SoC: %s, revision %X\n", soc->name,
 269                 AT91_CIDR_VERSION(cidr));
 270
 271         return soc_dev;
 272 }
 273
 274 static int __init atmel_soc_device_init(void)
 275 {
 276         at91_soc_init(socs);
 277
 278         return 0;
 279 }
 280 subsys_initcall(atmel_soc_device_init);