WIP FPC-III support
[linux/fpc-iii.git] / drivers / soc / fsl / qbman / dpaa_sys.h
blobae8afa552b1ef47e629de1eae4f324dc8b0af181
1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
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31 #ifndef __DPAA_SYS_H
32 #define __DPAA_SYS_H
34 #include <linux/cpu.h>
35 #include <linux/slab.h>
36 #include <linux/module.h>
37 #include <linux/interrupt.h>
38 #include <linux/kthread.h>
39 #include <linux/sched/signal.h>
40 #include <linux/vmalloc.h>
41 #include <linux/platform_device.h>
42 #include <linux/of.h>
43 #include <linux/of_reserved_mem.h>
44 #include <linux/prefetch.h>
45 #include <linux/genalloc.h>
46 #include <asm/cacheflush.h>
47 #include <linux/io.h>
48 #include <linux/delay.h>
50 /* For 2-element tables related to cache-inhibited and cache-enabled mappings */
51 #define DPAA_PORTAL_CE 0
52 #define DPAA_PORTAL_CI 1
54 static inline void dpaa_flush(void *p)
57 * Only PPC needs to flush the cache currently - on ARM the mapping
58 * is non cacheable
60 #ifdef CONFIG_PPC
61 flush_dcache_range((unsigned long)p, (unsigned long)p+64);
62 #endif
65 #define dpaa_invalidate(p) dpaa_flush(p)
67 #define dpaa_zero(p) memset(p, 0, 64)
69 static inline void dpaa_touch_ro(void *p)
71 #if (L1_CACHE_BYTES == 32)
72 prefetch(p+32);
73 #endif
74 prefetch(p);
77 /* Commonly used combo */
78 static inline void dpaa_invalidate_touch_ro(void *p)
80 dpaa_invalidate(p);
81 dpaa_touch_ro(p);
85 #ifdef CONFIG_FSL_DPAA_CHECKING
86 #define DPAA_ASSERT(x) WARN_ON(!(x))
87 #else
88 #define DPAA_ASSERT(x)
89 #endif
91 /* cyclic helper for rings */
92 static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last)
94 /* 'first' is included, 'last' is excluded */
95 if (first <= last)
96 return last - first;
97 return ringsize + last - first;
100 /* Offset applied to genalloc pools due to zero being an error return */
101 #define DPAA_GENALLOC_OFF 0x80000000
103 /* Initialize the devices private memory region */
104 int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,
105 size_t *size);
107 /* memremap() attributes for different platforms */
108 #ifdef CONFIG_PPC
109 #define QBMAN_MEMREMAP_ATTR MEMREMAP_WB
110 #else
111 #define QBMAN_MEMREMAP_ATTR MEMREMAP_WC
112 #endif
114 static inline int dpaa_set_portal_irq_affinity(struct device *dev,
115 int irq, int cpu)
117 int ret = 0;
119 if (!irq_can_set_affinity(irq)) {
120 dev_err(dev, "unable to set IRQ affinity\n");
121 return -EINVAL;
124 if (cpu == -1 || !cpu_online(cpu))
125 cpu = cpumask_any(cpu_online_mask);
127 ret = irq_set_affinity(irq, cpumask_of(cpu));
128 if (ret)
129 dev_err(dev, "irq_set_affinity() on CPU %d failed\n", cpu);
131 return ret;
134 #endif /* __DPAA_SYS_H */