1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2013 Samsung Electronics Co., Ltd.
4 // Tomasz Figa <t.figa@samsung.com>
5 // Copyright (C) 2008 Openmoko, Inc.
6 // Copyright (C) 2004-2008 Simtec Electronics
7 // Ben Dooks <ben@simtec.co.uk>
8 // http://armlinux.simtec.co.uk/
10 // Samsung common power management (suspend to RAM) debug support
12 #include <linux/serial_core.h>
13 #include <linux/serial_s3c.h>
16 #include <asm/mach/map.h>
18 #include <linux/soc/samsung/s3c-pm.h>
20 static struct pm_uart_save uart_save
;
22 extern void printascii(const char *);
24 void s3c_pm_dbg(const char *fmt
, ...)
30 vsnprintf(buff
, sizeof(buff
), fmt
, va
);
36 static inline void __iomem
*s3c_pm_uart_base(void)
41 debug_ll_addr(&paddr
, &vaddr
);
43 return (void __iomem
*)vaddr
;
46 void s3c_pm_save_uarts(bool is_s3c2410
)
48 void __iomem
*regs
= s3c_pm_uart_base();
49 struct pm_uart_save
*save
= &uart_save
;
51 save
->ulcon
= __raw_readl(regs
+ S3C2410_ULCON
);
52 save
->ucon
= __raw_readl(regs
+ S3C2410_UCON
);
53 save
->ufcon
= __raw_readl(regs
+ S3C2410_UFCON
);
54 save
->umcon
= __raw_readl(regs
+ S3C2410_UMCON
);
55 save
->ubrdiv
= __raw_readl(regs
+ S3C2410_UBRDIV
);
58 save
->udivslot
= __raw_readl(regs
+ S3C2443_DIVSLOT
);
60 S3C_PMDBG("UART[%p]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
61 regs
, save
->ulcon
, save
->ucon
, save
->ufcon
, save
->ubrdiv
);
64 void s3c_pm_restore_uarts(bool is_s3c2410
)
66 void __iomem
*regs
= s3c_pm_uart_base();
67 struct pm_uart_save
*save
= &uart_save
;
69 s3c_pm_arch_update_uart(regs
, save
);
71 __raw_writel(save
->ulcon
, regs
+ S3C2410_ULCON
);
72 __raw_writel(save
->ucon
, regs
+ S3C2410_UCON
);
73 __raw_writel(save
->ufcon
, regs
+ S3C2410_UFCON
);
74 __raw_writel(save
->umcon
, regs
+ S3C2410_UMCON
);
75 __raw_writel(save
->ubrdiv
, regs
+ S3C2410_UBRDIV
);
78 __raw_writel(save
->udivslot
, regs
+ S3C2443_DIVSLOT
);