WIP FPC-III support
[linux/fpc-iii.git] / drivers / soc / tegra / fuse / fuse.h
blobe057a58e20603250878c68db46fab7e23fcb25be
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2010 Google, Inc.
4 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
6 * Author:
7 * Colin Cross <ccross@android.com>
8 */
10 #ifndef __DRIVERS_MISC_TEGRA_FUSE_H
11 #define __DRIVERS_MISC_TEGRA_FUSE_H
13 #include <linux/dmaengine.h>
14 #include <linux/types.h>
16 struct nvmem_cell_lookup;
17 struct nvmem_device;
18 struct tegra_fuse;
20 struct tegra_fuse_info {
21 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
22 unsigned int size;
23 unsigned int spare;
26 struct tegra_fuse_soc {
27 void (*init)(struct tegra_fuse *fuse);
28 void (*speedo_init)(struct tegra_sku_info *info);
29 int (*probe)(struct tegra_fuse *fuse);
31 const struct tegra_fuse_info *info;
33 const struct nvmem_cell_lookup *lookups;
34 unsigned int num_lookups;
36 const struct attribute_group *soc_attr_group;
39 struct tegra_fuse {
40 struct device *dev;
41 void __iomem *base;
42 phys_addr_t phys;
43 struct clk *clk;
45 u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);
46 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
47 const struct tegra_fuse_soc *soc;
49 /* APBDMA on Tegra20 */
50 struct {
51 struct mutex lock;
52 struct completion wait;
53 struct dma_chan *chan;
54 struct dma_slave_config config;
55 dma_addr_t phys;
56 u32 *virt;
57 } apbdma;
59 struct nvmem_device *nvmem;
60 struct nvmem_cell_lookup *lookups;
63 void tegra_init_revision(void);
64 void tegra_init_apbmisc(void);
66 bool __init tegra_fuse_read_spare(unsigned int spare);
67 u32 __init tegra_fuse_read_early(unsigned int offset);
69 u8 tegra_get_major_rev(void);
70 u8 tegra_get_minor_rev(void);
72 extern const struct attribute_group tegra_soc_attr_group;
74 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
75 void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
76 #endif
78 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
79 void tegra30_init_speedo_data(struct tegra_sku_info *sku_info);
80 #endif
82 #ifdef CONFIG_ARCH_TEGRA_114_SOC
83 void tegra114_init_speedo_data(struct tegra_sku_info *sku_info);
84 #endif
86 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
87 void tegra124_init_speedo_data(struct tegra_sku_info *sku_info);
88 #endif
90 #ifdef CONFIG_ARCH_TEGRA_210_SOC
91 void tegra210_init_speedo_data(struct tegra_sku_info *sku_info);
92 #endif
94 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
95 extern const struct tegra_fuse_soc tegra20_fuse_soc;
96 #endif
98 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
99 extern const struct tegra_fuse_soc tegra30_fuse_soc;
100 #endif
102 #ifdef CONFIG_ARCH_TEGRA_114_SOC
103 extern const struct tegra_fuse_soc tegra114_fuse_soc;
104 #endif
106 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
107 extern const struct tegra_fuse_soc tegra124_fuse_soc;
108 #endif
110 #ifdef CONFIG_ARCH_TEGRA_210_SOC
111 extern const struct tegra_fuse_soc tegra210_fuse_soc;
112 #endif
114 #ifdef CONFIG_ARCH_TEGRA_186_SOC
115 extern const struct tegra_fuse_soc tegra186_fuse_soc;
116 #endif
118 #if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
119 IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
120 extern const struct attribute_group tegra194_soc_attr_group;
121 #endif
123 #ifdef CONFIG_ARCH_TEGRA_194_SOC
124 extern const struct tegra_fuse_soc tegra194_fuse_soc;
125 #endif
127 #ifdef CONFIG_ARCH_TEGRA_234_SOC
128 extern const struct tegra_fuse_soc tegra234_fuse_soc;
129 #endif
131 #endif