WIP FPC-III support
[linux/fpc-iii.git] / drivers / staging / mt7621-dts / gbpc1.dts
bloba7c0d3115d7264f36b25c563a9ccee03c9923e2d
1 /dts-v1/;
3 #include "mt7621.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
8 / {
9         compatible = "gnubee,gb-pc1", "mediatek,mt7621-soc";
10         model = "GB-PC1";
12         memory@0 {
13                 device_type = "memory";
14                 reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
15         };
17         chosen {
18                 bootargs = "console=ttyS0,57600";
19         };
21         palmbus: palmbus@1E000000 {
22                 i2c@900 {
23                         status = "okay";
24                 };
25         };
27         gpio-keys {
28                 compatible = "gpio-keys";
30                 reset {
31                         label = "reset";
32                         gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
33                         linux,code = <KEY_RESTART>;
34                 };
35         };
37         gpio-leds {
38                 compatible = "gpio-leds";
40                 system {
41                         label = "gb-pc1:green:system";
42                         gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
43                 };
45                 status {
46                         label = "gb-pc1:green:status";
47                         gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
48                 };
50                 lan1 {
51                         label = "gb-pc1:green:lan1";
52                         gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
53                 };
55                 lan2 {
56                         label = "gb-pc1:green:lan2";
57                         gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
58                 };
59         };
62 &sdhci {
63         status = "okay";
66 &spi0 {
67         status = "okay";
69         m25p80@0 {
70                 #address-cells = <1>;
71                 #size-cells = <1>;
72                 compatible = "jedec,spi-nor";
73                 reg = <0>;
74                 spi-max-frequency = <50000000>;
75                 broken-flash-reset;
77                 partition@0 {
78                         label = "u-boot";
79                         reg = <0x0 0x30000>;
80                         read-only;
81                 };
83                 partition@30000 {
84                         label = "u-boot-env";
85                         reg = <0x30000 0x10000>;
86                         read-only;
87                 };
89                 factory: partition@40000 {
90                         label = "factory";
91                         reg = <0x40000 0x10000>;
92                         read-only;
93                 };
95                 partition@50000 {
96                         label = "firmware";
97                         reg = <0x50000 0x1FB0000>;
98                 };
100         };
103 &sysclock {
104                         compatible = "fixed-clock";
105                         /* This is normally 1/4 of cpuclock */
106                         clock-frequency = <225000000>;
109 &cpuclock {
110                         compatible = "fixed-clock";
111                         clock-frequency = <900000000>;
114 &pcie {
115         pinctrl-names = "default";
116         pinctrl-0 = <&pcie_pins>;
118         reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
119                         <&gpio 8 GPIO_ACTIVE_LOW>,
120                         <&gpio 7 GPIO_ACTIVE_LOW>;
121         status = "okay";
124 &pinctrl {
125         state_default: pinctrl0 {
126                 default_gpio: gpio {
127                         groups = "wdt", "rgmii2", "uart3";
128                         function = "gpio";
129                 };
130         };
133 &switch0 {
134         ports {
135                 port@0 {
136                         label = "ethblack";
137                         status = "ok";
138                 };
139                 port@4 {
140                         label = "ethblue";
141                         status = "ok";
142                 };
143         };