WIP FPC-III support
[linux/fpc-iii.git] / drivers / tty / serial / 8250 / 8250_mid.c
blobefa0515139f8ec052486a414f614519780ff96d3
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
5 * Copyright (C) 2015 Intel Corporation
6 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
7 */
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/rational.h>
14 #include <linux/dma/hsu.h>
15 #include <linux/8250_pci.h>
17 #include "8250.h"
19 #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
20 #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
21 #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
22 #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
23 #define PCI_DEVICE_ID_INTEL_CDF_UART 0x18d8
24 #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
26 /* Intel MID Specific registers */
27 #define INTEL_MID_UART_FISR 0x08
28 #define INTEL_MID_UART_PS 0x30
29 #define INTEL_MID_UART_MUL 0x34
30 #define INTEL_MID_UART_DIV 0x38
32 struct mid8250;
34 struct mid8250_board {
35 unsigned int flags;
36 unsigned long freq;
37 unsigned int base_baud;
38 int (*setup)(struct mid8250 *, struct uart_port *p);
39 void (*exit)(struct mid8250 *);
42 struct mid8250 {
43 int line;
44 int dma_index;
45 struct pci_dev *dma_dev;
46 struct uart_8250_dma dma;
47 struct mid8250_board *board;
48 struct hsu_dma_chip dma_chip;
51 /*****************************************************************************/
53 static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
55 struct pci_dev *pdev = to_pci_dev(p->dev);
57 switch (pdev->device) {
58 case PCI_DEVICE_ID_INTEL_PNW_UART1:
59 mid->dma_index = 0;
60 break;
61 case PCI_DEVICE_ID_INTEL_PNW_UART2:
62 mid->dma_index = 1;
63 break;
64 case PCI_DEVICE_ID_INTEL_PNW_UART3:
65 mid->dma_index = 2;
66 break;
67 default:
68 return -EINVAL;
71 mid->dma_dev = pci_get_slot(pdev->bus,
72 PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
73 return 0;
76 static int tng_handle_irq(struct uart_port *p)
78 struct mid8250 *mid = p->private_data;
79 struct uart_8250_port *up = up_to_u8250p(p);
80 struct hsu_dma_chip *chip;
81 u32 status;
82 int ret = 0;
83 int err;
85 chip = pci_get_drvdata(mid->dma_dev);
87 /* Rx DMA */
88 err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
89 if (err > 0) {
90 serial8250_rx_dma_flush(up);
91 ret |= 1;
92 } else if (err == 0)
93 ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
95 /* Tx DMA */
96 err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
97 if (err > 0)
98 ret |= 1;
99 else if (err == 0)
100 ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
102 /* UART */
103 ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
104 return IRQ_RETVAL(ret);
107 static int tng_setup(struct mid8250 *mid, struct uart_port *p)
109 struct pci_dev *pdev = to_pci_dev(p->dev);
110 int index = PCI_FUNC(pdev->devfn);
113 * Device 0000:00:04.0 is not a real HSU port. It provides a global
114 * register set for all HSU ports, although it has the same PCI ID.
115 * Skip it here.
117 if (index-- == 0)
118 return -ENODEV;
120 mid->dma_index = index;
121 mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
123 p->handle_irq = tng_handle_irq;
124 return 0;
127 static int dnv_handle_irq(struct uart_port *p)
129 struct mid8250 *mid = p->private_data;
130 struct uart_8250_port *up = up_to_u8250p(p);
131 unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
132 u32 status;
133 int ret = 0;
134 int err;
136 if (fisr & BIT(2)) {
137 err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
138 if (err > 0) {
139 serial8250_rx_dma_flush(up);
140 ret |= 1;
141 } else if (err == 0)
142 ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
144 if (fisr & BIT(1)) {
145 err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
146 if (err > 0)
147 ret |= 1;
148 else if (err == 0)
149 ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
151 if (fisr & BIT(0))
152 ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
153 return IRQ_RETVAL(ret);
156 #define DNV_DMA_CHAN_OFFSET 0x80
158 static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
160 struct hsu_dma_chip *chip = &mid->dma_chip;
161 struct pci_dev *pdev = to_pci_dev(p->dev);
162 unsigned int bar = FL_GET_BASE(mid->board->flags);
163 int ret;
165 pci_set_master(pdev);
167 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
168 if (ret < 0)
169 return ret;
171 p->irq = pci_irq_vector(pdev, 0);
173 chip->dev = &pdev->dev;
174 chip->irq = pci_irq_vector(pdev, 0);
175 chip->regs = p->membase;
176 chip->length = pci_resource_len(pdev, bar);
177 chip->offset = DNV_DMA_CHAN_OFFSET;
179 /* Falling back to PIO mode if DMA probing fails */
180 ret = hsu_dma_probe(chip);
181 if (ret)
182 return 0;
184 mid->dma_dev = pdev;
186 p->handle_irq = dnv_handle_irq;
187 return 0;
190 static void dnv_exit(struct mid8250 *mid)
192 if (!mid->dma_dev)
193 return;
194 hsu_dma_remove(&mid->dma_chip);
197 /*****************************************************************************/
199 static void mid8250_set_termios(struct uart_port *p,
200 struct ktermios *termios,
201 struct ktermios *old)
203 unsigned int baud = tty_termios_baud_rate(termios);
204 struct mid8250 *mid = p->private_data;
205 unsigned short ps = 16;
206 unsigned long fuart = baud * ps;
207 unsigned long w = BIT(24) - 1;
208 unsigned long mul, div;
210 /* Gracefully handle the B0 case: fall back to B9600 */
211 fuart = fuart ? fuart : 9600 * 16;
213 if (mid->board->freq < fuart) {
214 /* Find prescaler value that satisfies Fuart < Fref */
215 if (mid->board->freq > baud)
216 ps = mid->board->freq / baud; /* baud rate too high */
217 else
218 ps = 1; /* PLL case */
219 fuart = baud * ps;
220 } else {
221 /* Get Fuart closer to Fref */
222 fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
225 rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
226 p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
228 writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
229 writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
230 writel(div, p->membase + INTEL_MID_UART_DIV);
232 serial8250_do_set_termios(p, termios, old);
235 static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
237 struct hsu_dma_slave *s = param;
239 if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
240 return false;
242 chan->private = s;
243 return true;
246 static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
248 struct uart_8250_dma *dma = &mid->dma;
249 struct device *dev = port->port.dev;
250 struct hsu_dma_slave *rx_param;
251 struct hsu_dma_slave *tx_param;
253 if (!mid->dma_dev)
254 return 0;
256 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
257 if (!rx_param)
258 return -ENOMEM;
260 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
261 if (!tx_param)
262 return -ENOMEM;
264 rx_param->chan_id = mid->dma_index * 2 + 1;
265 tx_param->chan_id = mid->dma_index * 2;
267 dma->rxconf.src_maxburst = 64;
268 dma->txconf.dst_maxburst = 64;
270 rx_param->dma_dev = &mid->dma_dev->dev;
271 tx_param->dma_dev = &mid->dma_dev->dev;
273 dma->fn = mid8250_dma_filter;
274 dma->rx_param = rx_param;
275 dma->tx_param = tx_param;
277 port->dma = dma;
278 return 0;
281 static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
283 struct uart_8250_port uart;
284 struct mid8250 *mid;
285 unsigned int bar;
286 int ret;
288 ret = pcim_enable_device(pdev);
289 if (ret)
290 return ret;
292 mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
293 if (!mid)
294 return -ENOMEM;
296 mid->board = (struct mid8250_board *)id->driver_data;
297 bar = FL_GET_BASE(mid->board->flags);
299 memset(&uart, 0, sizeof(struct uart_8250_port));
301 uart.port.dev = &pdev->dev;
302 uart.port.irq = pdev->irq;
303 uart.port.private_data = mid;
304 uart.port.type = PORT_16750;
305 uart.port.iotype = UPIO_MEM;
306 uart.port.uartclk = mid->board->base_baud * 16;
307 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
308 uart.port.set_termios = mid8250_set_termios;
310 uart.port.mapbase = pci_resource_start(pdev, bar);
311 uart.port.membase = pcim_iomap(pdev, bar, 0);
312 if (!uart.port.membase)
313 return -ENOMEM;
315 if (mid->board->setup) {
316 ret = mid->board->setup(mid, &uart.port);
317 if (ret)
318 return ret;
321 ret = mid8250_dma_setup(mid, &uart);
322 if (ret)
323 goto err;
325 ret = serial8250_register_8250_port(&uart);
326 if (ret < 0)
327 goto err;
329 mid->line = ret;
331 pci_set_drvdata(pdev, mid);
332 return 0;
333 err:
334 if (mid->board->exit)
335 mid->board->exit(mid);
336 return ret;
339 static void mid8250_remove(struct pci_dev *pdev)
341 struct mid8250 *mid = pci_get_drvdata(pdev);
343 serial8250_unregister_port(mid->line);
345 if (mid->board->exit)
346 mid->board->exit(mid);
349 static const struct mid8250_board pnw_board = {
350 .flags = FL_BASE0,
351 .freq = 50000000,
352 .base_baud = 115200,
353 .setup = pnw_setup,
356 static const struct mid8250_board tng_board = {
357 .flags = FL_BASE0,
358 .freq = 38400000,
359 .base_baud = 1843200,
360 .setup = tng_setup,
363 static const struct mid8250_board dnv_board = {
364 .flags = FL_BASE1,
365 .freq = 133333333,
366 .base_baud = 115200,
367 .setup = dnv_setup,
368 .exit = dnv_exit,
371 #define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
373 static const struct pci_device_id pci_ids[] = {
374 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
375 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
376 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
377 MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
378 MID_DEVICE(PCI_DEVICE_ID_INTEL_CDF_UART, dnv_board),
379 MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
380 { },
382 MODULE_DEVICE_TABLE(pci, pci_ids);
384 static struct pci_driver mid8250_pci_driver = {
385 .name = "8250_mid",
386 .id_table = pci_ids,
387 .probe = mid8250_probe,
388 .remove = mid8250_remove,
391 module_pci_driver(mid8250_pci_driver);
393 MODULE_AUTHOR("Intel Corporation");
394 MODULE_LICENSE("GPL v2");
395 MODULE_DESCRIPTION("Intel MID UART driver");