1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for NEC VR4100 series Serial Interface Unit.
5 * Copyright (C) 2004-2008 Yoichi Yuasa <yuasa@linux-mips.org>
7 * Based on drivers/serial/8250.c, by Russell King.
10 #include <linux/console.h>
11 #include <linux/errno.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/ioport.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/serial.h>
18 #include <linux/serial_core.h>
19 #include <linux/serial_reg.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
24 #include <asm/vr41xx/siu.h>
25 #include <asm/vr41xx/vr41xx.h>
27 #define SIU_BAUD_BASE 1152000
29 #define SIU_MINOR_BASE 82
31 #define RX_MAX_COUNT 256
32 #define TX_MAX_COUNT 15
38 #define IRMSEL_HP 0x08
39 #define IRMSEL_TEMIC 0x04
40 #define IRMSEL_SHARP 0x00
44 static struct uart_port siu_uart_ports
[SIU_PORTS_MAX
] = {
45 [0 ... SIU_PORTS_MAX
-1] = {
46 .lock
= __SPIN_LOCK_UNLOCKED(siu_uart_ports
->lock
),
51 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
52 static uint8_t lsr_break_flag
[SIU_PORTS_MAX
];
55 #define siu_read(port, offset) readb((port)->membase + (offset))
56 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
58 void vr41xx_select_siu_interface(siu_interface_t interface
)
60 struct uart_port
*port
;
64 port
= &siu_uart_ports
[0];
66 spin_lock_irqsave(&port
->lock
, flags
);
68 irsel
= siu_read(port
, SIUIRSEL
);
69 if (interface
== SIU_INTERFACE_IRDA
)
73 siu_write(port
, SIUIRSEL
, irsel
);
75 spin_unlock_irqrestore(&port
->lock
, flags
);
77 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface
);
79 void vr41xx_use_irda(irda_use_t use
)
81 struct uart_port
*port
;
85 port
= &siu_uart_ports
[0];
87 spin_lock_irqsave(&port
->lock
, flags
);
89 irsel
= siu_read(port
, SIUIRSEL
);
90 if (use
== FIR_USE_IRDA
)
94 siu_write(port
, SIUIRSEL
, irsel
);
96 spin_unlock_irqrestore(&port
->lock
, flags
);
98 EXPORT_SYMBOL_GPL(vr41xx_use_irda
);
100 void vr41xx_select_irda_module(irda_module_t module
, irda_speed_t speed
)
102 struct uart_port
*port
;
106 port
= &siu_uart_ports
[0];
108 spin_lock_irqsave(&port
->lock
, flags
);
110 irsel
= siu_read(port
, SIUIRSEL
);
111 irsel
&= ~(IRMSEL
| TMICTX
| TMICMODE
);
114 irsel
|= IRMSEL_SHARP
;
117 irsel
|= IRMSEL_TEMIC
| TMICMODE
;
118 if (speed
== IRDA_TX_4MBPS
)
127 siu_write(port
, SIUIRSEL
, irsel
);
129 spin_unlock_irqrestore(&port
->lock
, flags
);
131 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module
);
133 static inline void siu_clear_fifo(struct uart_port
*port
)
135 siu_write(port
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
136 siu_write(port
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR_CLEAR_RCVR
|
137 UART_FCR_CLEAR_XMIT
);
138 siu_write(port
, UART_FCR
, 0);
141 static inline unsigned long siu_port_size(struct uart_port
*port
)
143 switch (port
->type
) {
144 case PORT_VR41XX_SIU
:
146 case PORT_VR41XX_DSIU
:
153 static inline unsigned int siu_check_type(struct uart_port
*port
)
156 return PORT_VR41XX_SIU
;
157 if (port
->line
== 1 && port
->irq
)
158 return PORT_VR41XX_DSIU
;
163 static inline const char *siu_type_name(struct uart_port
*port
)
165 switch (port
->type
) {
166 case PORT_VR41XX_SIU
:
168 case PORT_VR41XX_DSIU
:
175 static unsigned int siu_tx_empty(struct uart_port
*port
)
179 lsr
= siu_read(port
, UART_LSR
);
180 if (lsr
& UART_LSR_TEMT
)
186 static void siu_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
190 if (mctrl
& TIOCM_DTR
)
192 if (mctrl
& TIOCM_RTS
)
194 if (mctrl
& TIOCM_OUT1
)
195 mcr
|= UART_MCR_OUT1
;
196 if (mctrl
& TIOCM_OUT2
)
197 mcr
|= UART_MCR_OUT2
;
198 if (mctrl
& TIOCM_LOOP
)
199 mcr
|= UART_MCR_LOOP
;
201 siu_write(port
, UART_MCR
, mcr
);
204 static unsigned int siu_get_mctrl(struct uart_port
*port
)
207 unsigned int mctrl
= 0;
209 msr
= siu_read(port
, UART_MSR
);
210 if (msr
& UART_MSR_DCD
)
212 if (msr
& UART_MSR_RI
)
214 if (msr
& UART_MSR_DSR
)
216 if (msr
& UART_MSR_CTS
)
222 static void siu_stop_tx(struct uart_port
*port
)
227 spin_lock_irqsave(&port
->lock
, flags
);
229 ier
= siu_read(port
, UART_IER
);
230 ier
&= ~UART_IER_THRI
;
231 siu_write(port
, UART_IER
, ier
);
233 spin_unlock_irqrestore(&port
->lock
, flags
);
236 static void siu_start_tx(struct uart_port
*port
)
241 spin_lock_irqsave(&port
->lock
, flags
);
243 ier
= siu_read(port
, UART_IER
);
244 ier
|= UART_IER_THRI
;
245 siu_write(port
, UART_IER
, ier
);
247 spin_unlock_irqrestore(&port
->lock
, flags
);
250 static void siu_stop_rx(struct uart_port
*port
)
255 spin_lock_irqsave(&port
->lock
, flags
);
257 ier
= siu_read(port
, UART_IER
);
258 ier
&= ~UART_IER_RLSI
;
259 siu_write(port
, UART_IER
, ier
);
261 port
->read_status_mask
&= ~UART_LSR_DR
;
263 spin_unlock_irqrestore(&port
->lock
, flags
);
266 static void siu_enable_ms(struct uart_port
*port
)
271 spin_lock_irqsave(&port
->lock
, flags
);
273 ier
= siu_read(port
, UART_IER
);
275 siu_write(port
, UART_IER
, ier
);
277 spin_unlock_irqrestore(&port
->lock
, flags
);
280 static void siu_break_ctl(struct uart_port
*port
, int ctl
)
285 spin_lock_irqsave(&port
->lock
, flags
);
287 lcr
= siu_read(port
, UART_LCR
);
291 lcr
&= ~UART_LCR_SBC
;
292 siu_write(port
, UART_LCR
, lcr
);
294 spin_unlock_irqrestore(&port
->lock
, flags
);
297 static inline void receive_chars(struct uart_port
*port
, uint8_t *status
)
301 int max_count
= RX_MAX_COUNT
;
306 ch
= siu_read(port
, UART_RX
);
310 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
311 lsr
|= lsr_break_flag
[port
->line
];
312 lsr_break_flag
[port
->line
] = 0;
314 if (unlikely(lsr
& (UART_LSR_BI
| UART_LSR_FE
|
315 UART_LSR_PE
| UART_LSR_OE
))) {
316 if (lsr
& UART_LSR_BI
) {
317 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
320 if (uart_handle_break(port
))
324 if (lsr
& UART_LSR_FE
)
325 port
->icount
.frame
++;
326 if (lsr
& UART_LSR_PE
)
327 port
->icount
.parity
++;
328 if (lsr
& UART_LSR_OE
)
329 port
->icount
.overrun
++;
331 lsr
&= port
->read_status_mask
;
332 if (lsr
& UART_LSR_BI
)
334 if (lsr
& UART_LSR_FE
)
336 if (lsr
& UART_LSR_PE
)
340 if (uart_handle_sysrq_char(port
, ch
))
343 uart_insert_char(port
, lsr
, UART_LSR_OE
, ch
, flag
);
346 lsr
= siu_read(port
, UART_LSR
);
347 } while ((lsr
& UART_LSR_DR
) && (max_count
-- > 0));
349 tty_flip_buffer_push(&port
->state
->port
);
354 static inline void check_modem_status(struct uart_port
*port
)
358 msr
= siu_read(port
, UART_MSR
);
359 if ((msr
& UART_MSR_ANY_DELTA
) == 0)
361 if (msr
& UART_MSR_DDCD
)
362 uart_handle_dcd_change(port
, msr
& UART_MSR_DCD
);
363 if (msr
& UART_MSR_TERI
)
365 if (msr
& UART_MSR_DDSR
)
367 if (msr
& UART_MSR_DCTS
)
368 uart_handle_cts_change(port
, msr
& UART_MSR_CTS
);
370 wake_up_interruptible(&port
->state
->port
.delta_msr_wait
);
373 static inline void transmit_chars(struct uart_port
*port
)
375 struct circ_buf
*xmit
;
376 int max_count
= TX_MAX_COUNT
;
378 xmit
= &port
->state
->xmit
;
381 siu_write(port
, UART_TX
, port
->x_char
);
387 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
393 siu_write(port
, UART_TX
, xmit
->buf
[xmit
->tail
]);
394 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
396 if (uart_circ_empty(xmit
))
398 } while (max_count
-- > 0);
400 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
401 uart_write_wakeup(port
);
403 if (uart_circ_empty(xmit
))
407 static irqreturn_t
siu_interrupt(int irq
, void *dev_id
)
409 struct uart_port
*port
;
412 port
= (struct uart_port
*)dev_id
;
414 iir
= siu_read(port
, UART_IIR
);
415 if (iir
& UART_IIR_NO_INT
)
418 lsr
= siu_read(port
, UART_LSR
);
419 if (lsr
& UART_LSR_DR
)
420 receive_chars(port
, &lsr
);
422 check_modem_status(port
);
424 if (lsr
& UART_LSR_THRE
)
425 transmit_chars(port
);
430 static int siu_startup(struct uart_port
*port
)
434 if (port
->membase
== NULL
)
437 siu_clear_fifo(port
);
439 (void)siu_read(port
, UART_LSR
);
440 (void)siu_read(port
, UART_RX
);
441 (void)siu_read(port
, UART_IIR
);
442 (void)siu_read(port
, UART_MSR
);
444 if (siu_read(port
, UART_LSR
) == 0xff)
447 retval
= request_irq(port
->irq
, siu_interrupt
, 0, siu_type_name(port
), port
);
451 if (port
->type
== PORT_VR41XX_DSIU
)
452 vr41xx_enable_dsiuint(DSIUINT_ALL
);
454 siu_write(port
, UART_LCR
, UART_LCR_WLEN8
);
456 spin_lock_irq(&port
->lock
);
457 siu_set_mctrl(port
, port
->mctrl
);
458 spin_unlock_irq(&port
->lock
);
460 siu_write(port
, UART_IER
, UART_IER_RLSI
| UART_IER_RDI
);
462 (void)siu_read(port
, UART_LSR
);
463 (void)siu_read(port
, UART_RX
);
464 (void)siu_read(port
, UART_IIR
);
465 (void)siu_read(port
, UART_MSR
);
470 static void siu_shutdown(struct uart_port
*port
)
475 siu_write(port
, UART_IER
, 0);
477 spin_lock_irqsave(&port
->lock
, flags
);
479 port
->mctrl
&= ~TIOCM_OUT2
;
480 siu_set_mctrl(port
, port
->mctrl
);
482 spin_unlock_irqrestore(&port
->lock
, flags
);
484 lcr
= siu_read(port
, UART_LCR
);
485 lcr
&= ~UART_LCR_SBC
;
486 siu_write(port
, UART_LCR
, lcr
);
488 siu_clear_fifo(port
);
490 (void)siu_read(port
, UART_RX
);
492 if (port
->type
== PORT_VR41XX_DSIU
)
493 vr41xx_disable_dsiuint(DSIUINT_ALL
);
495 free_irq(port
->irq
, port
);
498 static void siu_set_termios(struct uart_port
*port
, struct ktermios
*new,
499 struct ktermios
*old
)
501 tcflag_t c_cflag
, c_iflag
;
502 uint8_t lcr
, fcr
, ier
;
503 unsigned int baud
, quot
;
506 c_cflag
= new->c_cflag
;
507 switch (c_cflag
& CSIZE
) {
509 lcr
= UART_LCR_WLEN5
;
512 lcr
= UART_LCR_WLEN6
;
515 lcr
= UART_LCR_WLEN7
;
518 lcr
= UART_LCR_WLEN8
;
522 if (c_cflag
& CSTOPB
)
523 lcr
|= UART_LCR_STOP
;
524 if (c_cflag
& PARENB
)
525 lcr
|= UART_LCR_PARITY
;
526 if ((c_cflag
& PARODD
) != PARODD
)
527 lcr
|= UART_LCR_EPAR
;
528 if (c_cflag
& CMSPAR
)
529 lcr
|= UART_LCR_SPAR
;
531 baud
= uart_get_baud_rate(port
, new, old
, 0, port
->uartclk
/16);
532 quot
= uart_get_divisor(port
, baud
);
534 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
;
536 spin_lock_irqsave(&port
->lock
, flags
);
538 uart_update_timeout(port
, c_cflag
, baud
);
540 c_iflag
= new->c_iflag
;
542 port
->read_status_mask
= UART_LSR_THRE
| UART_LSR_OE
| UART_LSR_DR
;
544 port
->read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
545 if (c_iflag
& (IGNBRK
| BRKINT
| PARMRK
))
546 port
->read_status_mask
|= UART_LSR_BI
;
548 port
->ignore_status_mask
= 0;
549 if (c_iflag
& IGNPAR
)
550 port
->ignore_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
551 if (c_iflag
& IGNBRK
) {
552 port
->ignore_status_mask
|= UART_LSR_BI
;
553 if (c_iflag
& IGNPAR
)
554 port
->ignore_status_mask
|= UART_LSR_OE
;
557 if ((c_cflag
& CREAD
) == 0)
558 port
->ignore_status_mask
|= UART_LSR_DR
;
560 ier
= siu_read(port
, UART_IER
);
561 ier
&= ~UART_IER_MSI
;
562 if (UART_ENABLE_MS(port
, c_cflag
))
564 siu_write(port
, UART_IER
, ier
);
566 siu_write(port
, UART_LCR
, lcr
| UART_LCR_DLAB
);
568 siu_write(port
, UART_DLL
, (uint8_t)quot
);
569 siu_write(port
, UART_DLM
, (uint8_t)(quot
>> 8));
571 siu_write(port
, UART_LCR
, lcr
);
573 siu_write(port
, UART_FCR
, fcr
);
575 siu_set_mctrl(port
, port
->mctrl
);
577 spin_unlock_irqrestore(&port
->lock
, flags
);
580 static void siu_pm(struct uart_port
*port
, unsigned int state
, unsigned int oldstate
)
584 switch (port
->type
) {
585 case PORT_VR41XX_SIU
:
586 vr41xx_supply_clock(SIU_CLOCK
);
588 case PORT_VR41XX_DSIU
:
589 vr41xx_supply_clock(DSIU_CLOCK
);
594 switch (port
->type
) {
595 case PORT_VR41XX_SIU
:
596 vr41xx_mask_clock(SIU_CLOCK
);
598 case PORT_VR41XX_DSIU
:
599 vr41xx_mask_clock(DSIU_CLOCK
);
606 static const char *siu_type(struct uart_port
*port
)
608 return siu_type_name(port
);
611 static void siu_release_port(struct uart_port
*port
)
615 if (port
->flags
& UPF_IOREMAP
) {
616 iounmap(port
->membase
);
617 port
->membase
= NULL
;
620 size
= siu_port_size(port
);
621 release_mem_region(port
->mapbase
, size
);
624 static int siu_request_port(struct uart_port
*port
)
627 struct resource
*res
;
629 size
= siu_port_size(port
);
630 res
= request_mem_region(port
->mapbase
, size
, siu_type_name(port
));
634 if (port
->flags
& UPF_IOREMAP
) {
635 port
->membase
= ioremap(port
->mapbase
, size
);
636 if (port
->membase
== NULL
) {
637 release_resource(res
);
645 static void siu_config_port(struct uart_port
*port
, int flags
)
647 if (flags
& UART_CONFIG_TYPE
) {
648 port
->type
= siu_check_type(port
);
649 (void)siu_request_port(port
);
653 static int siu_verify_port(struct uart_port
*port
, struct serial_struct
*serial
)
655 if (port
->type
!= PORT_VR41XX_SIU
&& port
->type
!= PORT_VR41XX_DSIU
)
657 if (port
->irq
!= serial
->irq
)
659 if (port
->iotype
!= serial
->io_type
)
661 if (port
->mapbase
!= (unsigned long)serial
->iomem_base
)
667 static const struct uart_ops siu_uart_ops
= {
668 .tx_empty
= siu_tx_empty
,
669 .set_mctrl
= siu_set_mctrl
,
670 .get_mctrl
= siu_get_mctrl
,
671 .stop_tx
= siu_stop_tx
,
672 .start_tx
= siu_start_tx
,
673 .stop_rx
= siu_stop_rx
,
674 .enable_ms
= siu_enable_ms
,
675 .break_ctl
= siu_break_ctl
,
676 .startup
= siu_startup
,
677 .shutdown
= siu_shutdown
,
678 .set_termios
= siu_set_termios
,
681 .release_port
= siu_release_port
,
682 .request_port
= siu_request_port
,
683 .config_port
= siu_config_port
,
684 .verify_port
= siu_verify_port
,
687 static int siu_init_ports(struct platform_device
*pdev
)
689 struct uart_port
*port
;
690 struct resource
*res
;
691 int *type
= dev_get_platdata(&pdev
->dev
);
697 port
= siu_uart_ports
;
698 for (i
= 0; i
< SIU_PORTS_MAX
; i
++) {
699 port
->type
= type
[i
];
700 if (port
->type
== PORT_UNKNOWN
)
702 port
->irq
= platform_get_irq(pdev
, i
);
703 port
->uartclk
= SIU_BAUD_BASE
* 16;
706 port
->iotype
= UPIO_MEM
;
707 port
->flags
= UPF_IOREMAP
| UPF_BOOT_AUTOCONF
;
709 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, i
);
710 port
->mapbase
= res
->start
;
717 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
719 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
721 static void wait_for_xmitr(struct uart_port
*port
)
727 lsr
= siu_read(port
, UART_LSR
);
728 if (lsr
& UART_LSR_BI
)
729 lsr_break_flag
[port
->line
] = UART_LSR_BI
;
731 if ((lsr
& BOTH_EMPTY
) == BOTH_EMPTY
)
733 } while (timeout
-- > 0);
735 if (port
->flags
& UPF_CONS_FLOW
) {
739 msr
= siu_read(port
, UART_MSR
);
740 if ((msr
& UART_MSR_CTS
) != 0)
742 } while (timeout
-- > 0);
746 static void siu_console_putchar(struct uart_port
*port
, int ch
)
748 wait_for_xmitr(port
);
749 siu_write(port
, UART_TX
, ch
);
752 static void siu_console_write(struct console
*con
, const char *s
, unsigned count
)
754 struct uart_port
*port
;
757 port
= &siu_uart_ports
[con
->index
];
759 ier
= siu_read(port
, UART_IER
);
760 siu_write(port
, UART_IER
, 0);
762 uart_console_write(port
, s
, count
, siu_console_putchar
);
764 wait_for_xmitr(port
);
765 siu_write(port
, UART_IER
, ier
);
768 static int __init
siu_console_setup(struct console
*con
, char *options
)
770 struct uart_port
*port
;
776 if (con
->index
>= SIU_PORTS_MAX
)
779 port
= &siu_uart_ports
[con
->index
];
780 if (port
->membase
== NULL
) {
781 if (port
->mapbase
== 0)
783 port
->membase
= ioremap(port
->mapbase
, siu_port_size(port
));
786 if (port
->type
== PORT_VR41XX_SIU
)
787 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C
);
790 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
792 return uart_set_options(port
, con
, baud
, parity
, bits
, flow
);
795 static struct uart_driver siu_uart_driver
;
797 static struct console siu_console
= {
799 .write
= siu_console_write
,
800 .device
= uart_console_device
,
801 .setup
= siu_console_setup
,
802 .flags
= CON_PRINTBUFFER
,
804 .data
= &siu_uart_driver
,
807 static int siu_console_init(void)
809 struct uart_port
*port
;
812 for (i
= 0; i
< SIU_PORTS_MAX
; i
++) {
813 port
= &siu_uart_ports
[i
];
814 port
->ops
= &siu_uart_ops
;
817 register_console(&siu_console
);
822 console_initcall(siu_console_init
);
824 void __init
vr41xx_siu_early_setup(struct uart_port
*port
)
826 if (port
->type
== PORT_UNKNOWN
)
829 siu_uart_ports
[port
->line
].line
= port
->line
;
830 siu_uart_ports
[port
->line
].type
= port
->type
;
831 siu_uart_ports
[port
->line
].uartclk
= SIU_BAUD_BASE
* 16;
832 siu_uart_ports
[port
->line
].mapbase
= port
->mapbase
;
833 siu_uart_ports
[port
->line
].ops
= &siu_uart_ops
;
836 #define SERIAL_VR41XX_CONSOLE &siu_console
838 #define SERIAL_VR41XX_CONSOLE NULL
841 static struct uart_driver siu_uart_driver
= {
842 .owner
= THIS_MODULE
,
843 .driver_name
= "SIU",
846 .minor
= SIU_MINOR_BASE
,
847 .cons
= SERIAL_VR41XX_CONSOLE
,
850 static int siu_probe(struct platform_device
*dev
)
852 struct uart_port
*port
;
855 num
= siu_init_ports(dev
);
859 siu_uart_driver
.nr
= num
;
860 retval
= uart_register_driver(&siu_uart_driver
);
864 for (i
= 0; i
< num
; i
++) {
865 port
= &siu_uart_ports
[i
];
866 port
->ops
= &siu_uart_ops
;
867 port
->dev
= &dev
->dev
;
868 port
->has_sysrq
= IS_ENABLED(CONFIG_SERIAL_VR41XX_CONSOLE
);
870 retval
= uart_add_one_port(&siu_uart_driver
, port
);
877 if (i
== 0 && retval
< 0) {
878 uart_unregister_driver(&siu_uart_driver
);
885 static int siu_remove(struct platform_device
*dev
)
887 struct uart_port
*port
;
890 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
891 port
= &siu_uart_ports
[i
];
892 if (port
->dev
== &dev
->dev
) {
893 uart_remove_one_port(&siu_uart_driver
, port
);
898 uart_unregister_driver(&siu_uart_driver
);
903 static int siu_suspend(struct platform_device
*dev
, pm_message_t state
)
905 struct uart_port
*port
;
908 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
909 port
= &siu_uart_ports
[i
];
910 if ((port
->type
== PORT_VR41XX_SIU
||
911 port
->type
== PORT_VR41XX_DSIU
) && port
->dev
== &dev
->dev
)
912 uart_suspend_port(&siu_uart_driver
, port
);
919 static int siu_resume(struct platform_device
*dev
)
921 struct uart_port
*port
;
924 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
925 port
= &siu_uart_ports
[i
];
926 if ((port
->type
== PORT_VR41XX_SIU
||
927 port
->type
== PORT_VR41XX_DSIU
) && port
->dev
== &dev
->dev
)
928 uart_resume_port(&siu_uart_driver
, port
);
934 static struct platform_driver siu_device_driver
= {
936 .remove
= siu_remove
,
937 .suspend
= siu_suspend
,
938 .resume
= siu_resume
,
944 module_platform_driver(siu_device_driver
);
946 MODULE_LICENSE("GPL");
947 MODULE_ALIAS("platform:SIU");