1 // SPDX-License-Identifier: GPL-2.0
3 * Standalone EHCI usb debug driver
5 * Originally written by:
6 * Eric W. Biederman" <ebiederm@xmission.com> and
7 * Yinghai Lu <yhlu.kernel@gmail.com>
9 * Changes for early/late printk and HW errata:
10 * Jason Wessel <jason.wessel@windriver.com>
11 * Copyright (C) 2009 Wind River Systems, Inc.
15 #include <linux/console.h>
16 #include <linux/errno.h>
17 #include <linux/init.h>
18 #include <linux/iopoll.h>
19 #include <linux/pci_regs.h>
20 #include <linux/pci_ids.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/ehci_def.h>
23 #include <linux/delay.h>
24 #include <linux/serial_core.h>
25 #include <linux/kgdb.h>
26 #include <linux/kthread.h>
28 #include <asm/pci-direct.h>
29 #include <asm/fixmap.h>
31 /* The code here is intended to talk directly to the EHCI debug port
32 * and does not require that you have any kind of USB host controller
33 * drivers or USB device drivers compiled into the kernel.
35 * If you make a change to anything in here, the following test cases
36 * need to pass where a USB debug device works in the following
39 * 1. boot args: earlyprintk=dbgp
40 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
41 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
42 * 2. boot args: earlyprintk=dbgp,keep
43 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
44 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
45 * 3. boot args: earlyprintk=dbgp console=ttyUSB0
46 * o kernel has CONFIG_USB_EHCI_HCD=y and
47 * CONFIG_USB_SERIAL_DEBUG=y
48 * 4. boot args: earlyprintk=vga,dbgp
49 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
50 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
52 * For the 4th configuration you can turn on or off the DBGP_DEBUG
53 * such that you can debug the dbgp device's driver code.
56 static int dbgp_phys_port
= 1;
58 static struct ehci_caps __iomem
*ehci_caps
;
59 static struct ehci_regs __iomem
*ehci_regs
;
60 static struct ehci_dbg_port __iomem
*ehci_debug
;
61 static int dbgp_not_safe
; /* Cannot use debug device during ehci reset */
62 static unsigned int dbgp_endpoint_out
;
63 static unsigned int dbgp_endpoint_in
;
71 static struct ehci_dev ehci_dev
;
73 #define USB_DEBUG_DEVNUM 127
76 #define dbgp_printk printk
77 static void dbgp_ehci_status(char *str
)
81 dbgp_printk("dbgp: %s\n", str
);
82 dbgp_printk(" Debug control: %08x", readl(&ehci_debug
->control
));
83 dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs
->command
));
84 dbgp_printk(" ehci conf flg: %08x\n",
85 readl(&ehci_regs
->configured_flag
));
86 dbgp_printk(" ehci status : %08x", readl(&ehci_regs
->status
));
87 dbgp_printk(" ehci portsc : %08x\n",
88 readl(&ehci_regs
->port_status
[dbgp_phys_port
- 1]));
91 static inline void dbgp_ehci_status(char *str
) { }
92 static inline void dbgp_printk(const char *fmt
, ...) { }
95 static inline u32
dbgp_len_update(u32 x
, u32 len
)
97 return (x
& ~0x0f) | (len
& 0x0f);
101 static struct kgdb_io kgdbdbgp_io_ops
;
102 #define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops)
104 #define dbgp_kgdb_mode (0)
107 /* Local version of HC_LENGTH macro as ehci struct is not available here */
108 #define EARLY_HC_LENGTH(p) (0x00ff & (p)) /* bits 7 : 0 */
111 * USB Packet IDs (PIDs)
115 #define USB_PID_OUT 0xe1
116 #define USB_PID_IN 0x69
117 #define USB_PID_SOF 0xa5
118 #define USB_PID_SETUP 0x2d
120 #define USB_PID_ACK 0xd2
121 #define USB_PID_NAK 0x5a
122 #define USB_PID_STALL 0x1e
123 #define USB_PID_NYET 0x96
125 #define USB_PID_DATA0 0xc3
126 #define USB_PID_DATA1 0x4b
127 #define USB_PID_DATA2 0x87
128 #define USB_PID_MDATA 0x0f
130 #define USB_PID_PREAMBLE 0x3c
131 #define USB_PID_ERR 0x3c
132 #define USB_PID_SPLIT 0x78
133 #define USB_PID_PING 0xb4
134 #define USB_PID_UNDEF_0 0xf0
136 #define USB_PID_DATA_TOGGLE 0x88
137 #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
139 #define PCI_CAP_ID_EHCI_DEBUG 0xa
141 #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
142 #define HUB_SHORT_RESET_TIME 10
143 #define HUB_LONG_RESET_TIME 200
144 #define HUB_RESET_TIMEOUT 500
146 #define DBGP_MAX_PACKET 8
147 #define DBGP_TIMEOUT (250 * 1000)
148 #define DBGP_LOOPS 1000
150 static inline u32
dbgp_pid_write_update(u32 x
, u32 tok
)
152 static int data0
= USB_PID_DATA1
;
153 data0
^= USB_PID_DATA_TOGGLE
;
154 return (x
& 0xffff0000) | (data0
<< 8) | (tok
& 0xff);
157 static inline u32
dbgp_pid_read_update(u32 x
, u32 tok
)
159 return (x
& 0xffff0000) | (USB_PID_DATA0
<< 8) | (tok
& 0xff);
162 static int dbgp_wait_until_complete(void)
167 ret
= readl_poll_timeout_atomic(&ehci_debug
->control
, ctrl
,
168 (ctrl
& DBGP_DONE
), 1, DBGP_TIMEOUT
);
170 return -DBGP_TIMEOUT
;
173 * Now that we have observed the completed transaction,
174 * clear the done bit.
176 writel(ctrl
| DBGP_DONE
, &ehci_debug
->control
);
177 return (ctrl
& DBGP_ERROR
) ? -DBGP_ERRCODE(ctrl
) : DBGP_LEN(ctrl
);
180 static inline void dbgp_mdelay(int ms
)
185 for (i
= 0; i
< 1000; i
++)
190 static void dbgp_breath(void)
192 /* Sleep to give the debug port a chance to breathe */
195 static int dbgp_wait_until_done(unsigned ctrl
, int loop
)
201 writel(ctrl
| DBGP_GO
, &ehci_debug
->control
);
202 ret
= dbgp_wait_until_complete();
203 pids
= readl(&ehci_debug
->pids
);
204 lpid
= DBGP_PID_GET(pids
);
207 /* A -DBGP_TIMEOUT failure here means the device has
208 * failed, perhaps because it was unplugged, in which
209 * case we do not want to hang the system so the dbgp
210 * will be marked as unsafe to use. EHCI reset is the
211 * only way to recover if you unplug the dbgp device.
213 if (ret
== -DBGP_TIMEOUT
&& !dbgp_not_safe
)
215 if (ret
== -DBGP_ERR_BAD
&& --loop
> 0)
221 * If the port is getting full or it has dropped data
222 * start pacing ourselves, not necessary but it's friendly.
224 if ((lpid
== USB_PID_NAK
) || (lpid
== USB_PID_NYET
))
227 /* If I get a NACK reissue the transmission */
228 if (lpid
== USB_PID_NAK
) {
236 static inline void dbgp_set_data(const void *buf
, int size
)
238 const unsigned char *bytes
= buf
;
243 for (i
= 0; i
< 4 && i
< size
; i
++)
244 lo
|= bytes
[i
] << (8*i
);
245 for (; i
< 8 && i
< size
; i
++)
246 hi
|= bytes
[i
] << (8*(i
- 4));
247 writel(lo
, &ehci_debug
->data03
);
248 writel(hi
, &ehci_debug
->data47
);
251 static inline void dbgp_get_data(void *buf
, int size
)
253 unsigned char *bytes
= buf
;
257 lo
= readl(&ehci_debug
->data03
);
258 hi
= readl(&ehci_debug
->data47
);
259 for (i
= 0; i
< 4 && i
< size
; i
++)
260 bytes
[i
] = (lo
>> (8*i
)) & 0xff;
261 for (; i
< 8 && i
< size
; i
++)
262 bytes
[i
] = (hi
>> (8*(i
- 4))) & 0xff;
265 static int dbgp_bulk_write(unsigned devnum
, unsigned endpoint
,
266 const char *bytes
, int size
)
272 if (size
> DBGP_MAX_PACKET
)
275 addr
= DBGP_EPADDR(devnum
, endpoint
);
277 pids
= readl(&ehci_debug
->pids
);
278 pids
= dbgp_pid_write_update(pids
, USB_PID_OUT
);
280 ctrl
= readl(&ehci_debug
->control
);
281 ctrl
= dbgp_len_update(ctrl
, size
);
285 dbgp_set_data(bytes
, size
);
286 writel(addr
, &ehci_debug
->address
);
287 writel(pids
, &ehci_debug
->pids
);
288 ret
= dbgp_wait_until_done(ctrl
, DBGP_LOOPS
);
293 static int dbgp_bulk_read(unsigned devnum
, unsigned endpoint
, void *data
,
296 u32 pids
, addr
, ctrl
;
299 if (size
> DBGP_MAX_PACKET
)
302 addr
= DBGP_EPADDR(devnum
, endpoint
);
304 pids
= readl(&ehci_debug
->pids
);
305 pids
= dbgp_pid_read_update(pids
, USB_PID_IN
);
307 ctrl
= readl(&ehci_debug
->control
);
308 ctrl
= dbgp_len_update(ctrl
, size
);
312 writel(addr
, &ehci_debug
->address
);
313 writel(pids
, &ehci_debug
->pids
);
314 ret
= dbgp_wait_until_done(ctrl
, loops
);
320 dbgp_get_data(data
, size
);
324 static int dbgp_control_msg(unsigned devnum
, int requesttype
,
325 int request
, int value
, int index
, void *data
, int size
)
327 u32 pids
, addr
, ctrl
;
328 struct usb_ctrlrequest req
;
332 read
= (requesttype
& USB_DIR_IN
) != 0;
333 if (size
> (read
? DBGP_MAX_PACKET
: 0))
336 /* Compute the control message */
337 req
.bRequestType
= requesttype
;
338 req
.bRequest
= request
;
339 req
.wValue
= cpu_to_le16(value
);
340 req
.wIndex
= cpu_to_le16(index
);
341 req
.wLength
= cpu_to_le16(size
);
343 pids
= DBGP_PID_SET(USB_PID_DATA0
, USB_PID_SETUP
);
344 addr
= DBGP_EPADDR(devnum
, 0);
346 ctrl
= readl(&ehci_debug
->control
);
347 ctrl
= dbgp_len_update(ctrl
, sizeof(req
));
351 /* Send the setup message */
352 dbgp_set_data(&req
, sizeof(req
));
353 writel(addr
, &ehci_debug
->address
);
354 writel(pids
, &ehci_debug
->pids
);
355 ret
= dbgp_wait_until_done(ctrl
, DBGP_LOOPS
);
359 /* Read the result */
360 return dbgp_bulk_read(devnum
, 0, data
, size
, DBGP_LOOPS
);
363 /* Find a PCI capability */
364 static u32 __init
find_cap(u32 num
, u32 slot
, u32 func
, int cap
)
369 if (!(read_pci_config_16(num
, slot
, func
, PCI_STATUS
) &
370 PCI_STATUS_CAP_LIST
))
373 pos
= read_pci_config_byte(num
, slot
, func
, PCI_CAPABILITY_LIST
);
374 for (bytes
= 0; bytes
< 48 && pos
>= 0x40; bytes
++) {
378 id
= read_pci_config_byte(num
, slot
, func
, pos
+PCI_CAP_LIST_ID
);
384 pos
= read_pci_config_byte(num
, slot
, func
,
385 pos
+PCI_CAP_LIST_NEXT
);
390 static u32 __init
__find_dbgp(u32 bus
, u32 slot
, u32 func
)
394 class = read_pci_config(bus
, slot
, func
, PCI_CLASS_REVISION
);
395 if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI
)
398 return find_cap(bus
, slot
, func
, PCI_CAP_ID_EHCI_DEBUG
);
401 static u32 __init
find_dbgp(int ehci_num
, u32
*rbus
, u32
*rslot
, u32
*rfunc
)
405 for (bus
= 0; bus
< 256; bus
++) {
406 for (slot
= 0; slot
< 32; slot
++) {
407 for (func
= 0; func
< 8; func
++) {
410 cap
= __find_dbgp(bus
, slot
, func
);
426 static int dbgp_ehci_startup(void)
428 u32 ctrl
, cmd
, status
;
431 /* Claim ownership, but do not enable yet */
432 ctrl
= readl(&ehci_debug
->control
);
434 ctrl
&= ~(DBGP_ENABLED
| DBGP_INUSE
);
435 writel(ctrl
, &ehci_debug
->control
);
438 dbgp_ehci_status("EHCI startup");
439 /* Start the ehci running */
440 cmd
= readl(&ehci_regs
->command
);
441 cmd
&= ~(CMD_LRESET
| CMD_IAAD
| CMD_PSE
| CMD_ASE
| CMD_RESET
);
443 writel(cmd
, &ehci_regs
->command
);
445 /* Ensure everything is routed to the EHCI */
446 writel(FLAG_CF
, &ehci_regs
->configured_flag
);
448 /* Wait until the controller is no longer halted */
451 status
= readl(&ehci_regs
->status
);
452 if (!(status
& STS_HALT
))
455 } while (--loop
> 0);
458 dbgp_printk("ehci can not be started\n");
461 dbgp_printk("ehci started\n");
465 static int dbgp_ehci_controller_reset(void)
467 int loop
= 250 * 1000;
470 /* Reset the EHCI controller */
471 cmd
= readl(&ehci_regs
->command
);
473 writel(cmd
, &ehci_regs
->command
);
475 cmd
= readl(&ehci_regs
->command
);
476 } while ((cmd
& CMD_RESET
) && (--loop
> 0));
479 dbgp_printk("can not reset ehci\n");
482 dbgp_ehci_status("ehci reset done");
485 static int ehci_wait_for_port(int port
);
486 /* Return 0 on success
487 * Return -ENODEV for any general failure
488 * Return -EIO if wait for port fails
490 static int _dbgp_external_startup(void)
493 struct usb_debug_descriptor dbgp_desc
;
495 u32 ctrl
, portsc
, cmd
;
496 int dbg_port
= dbgp_phys_port
;
498 int reset_port_tries
= 1;
499 int try_hard_once
= 1;
501 try_port_reset_again
:
502 ret
= dbgp_ehci_startup();
506 /* Wait for a device to show up in the debug port */
507 ret
= ehci_wait_for_port(dbg_port
);
509 portsc
= readl(&ehci_regs
->port_status
[dbg_port
- 1]);
510 if (!(portsc
& PORT_CONNECT
) && try_hard_once
) {
511 /* Last ditch effort to try to force enable
512 * the debug device by using the packet test
513 * ehci command to try and wake it up. */
515 cmd
= readl(&ehci_regs
->command
);
517 writel(cmd
, &ehci_regs
->command
);
518 portsc
= readl(&ehci_regs
->port_status
[dbg_port
- 1]);
519 portsc
|= PORT_TEST_PKT
;
520 writel(portsc
, &ehci_regs
->port_status
[dbg_port
- 1]);
521 dbgp_ehci_status("Trying to force debug port online");
523 dbgp_ehci_controller_reset();
524 goto try_port_reset_again
;
525 } else if (reset_port_tries
--) {
526 goto try_port_reset_again
;
528 dbgp_printk("No device found in debug port\n");
531 dbgp_ehci_status("wait for port done");
533 /* Enable the debug port */
534 ctrl
= readl(&ehci_debug
->control
);
536 writel(ctrl
, &ehci_debug
->control
);
537 ctrl
= readl(&ehci_debug
->control
);
538 if ((ctrl
& DBGP_CLAIM
) != DBGP_CLAIM
) {
539 dbgp_printk("No device in debug port\n");
540 writel(ctrl
& ~DBGP_CLAIM
, &ehci_debug
->control
);
543 dbgp_ehci_status("debug ported enabled");
545 /* Completely transfer the debug device to the debug controller */
546 portsc
= readl(&ehci_regs
->port_status
[dbg_port
- 1]);
548 writel(portsc
, &ehci_regs
->port_status
[dbg_port
- 1]);
553 /* Find the debug device and make it device number 127 */
554 for (devnum
= 0; devnum
<= 127; devnum
++) {
555 ret
= dbgp_control_msg(devnum
,
556 USB_DIR_IN
| USB_TYPE_STANDARD
| USB_RECIP_DEVICE
,
557 USB_REQ_GET_DESCRIPTOR
, (USB_DT_DEBUG
<< 8), 0,
558 &dbgp_desc
, sizeof(dbgp_desc
));
563 dbgp_printk("Could not find attached debug device\n");
566 dbgp_endpoint_out
= dbgp_desc
.bDebugOutEndpoint
;
567 dbgp_endpoint_in
= dbgp_desc
.bDebugInEndpoint
;
569 /* Move the device to 127 if it isn't already there */
570 if (devnum
!= USB_DEBUG_DEVNUM
) {
571 ret
= dbgp_control_msg(devnum
,
572 USB_DIR_OUT
| USB_TYPE_STANDARD
| USB_RECIP_DEVICE
,
573 USB_REQ_SET_ADDRESS
, USB_DEBUG_DEVNUM
, 0, NULL
, 0);
575 dbgp_printk("Could not move attached device to %d\n",
579 dbgp_printk("debug device renamed to 127\n");
582 /* Enable the debug interface */
583 ret
= dbgp_control_msg(USB_DEBUG_DEVNUM
,
584 USB_DIR_OUT
| USB_TYPE_STANDARD
| USB_RECIP_DEVICE
,
585 USB_REQ_SET_FEATURE
, USB_DEVICE_DEBUG_MODE
, 0, NULL
, 0);
587 dbgp_printk(" Could not enable the debug device\n");
590 dbgp_printk("debug interface enabled\n");
591 /* Perform a small write to get the even/odd data state in sync
593 ret
= dbgp_bulk_write(USB_DEBUG_DEVNUM
, dbgp_endpoint_out
, " ", 1);
595 dbgp_printk("dbgp_bulk_write failed: %d\n", ret
);
598 dbgp_printk("small write done\n");
608 static int ehci_reset_port(int port
)
611 u32 delay_time
, delay
;
614 dbgp_ehci_status("reset port");
615 /* Reset the usb debug port */
616 portsc
= readl(&ehci_regs
->port_status
[port
- 1]);
618 portsc
|= PORT_RESET
;
619 writel(portsc
, &ehci_regs
->port_status
[port
- 1]);
621 delay
= HUB_ROOT_RESET_TIME
;
622 for (delay_time
= 0; delay_time
< HUB_RESET_TIMEOUT
;
623 delay_time
+= delay
) {
625 portsc
= readl(&ehci_regs
->port_status
[port
- 1]);
626 if (!(portsc
& PORT_RESET
))
629 if (portsc
& PORT_RESET
) {
630 /* force reset to complete */
632 writel(portsc
& ~(PORT_RWC_BITS
| PORT_RESET
),
633 &ehci_regs
->port_status
[port
- 1]);
636 portsc
= readl(&ehci_regs
->port_status
[port
-1]);
637 } while ((portsc
& PORT_RESET
) && (--loop
> 0));
640 /* Device went away? */
641 if (!(portsc
& PORT_CONNECT
))
644 /* bomb out completely if something weird happened */
645 if ((portsc
& PORT_CSC
))
648 /* If we've finished resetting, then break out of the loop */
649 if (!(portsc
& PORT_RESET
) && (portsc
& PORT_PE
))
654 static int ehci_wait_for_port(int port
)
659 for (reps
= 0; reps
< 300; reps
++) {
660 status
= readl(&ehci_regs
->status
);
661 if (status
& STS_PCD
)
665 ret
= ehci_reset_port(port
);
671 typedef void (*set_debug_port_t
)(int port
);
673 static void __init
default_set_debug_port(int port
)
677 static set_debug_port_t __initdata set_debug_port
= default_set_debug_port
;
679 static void __init
nvidia_set_debug_port(int port
)
682 dword
= read_pci_config(ehci_dev
.bus
, ehci_dev
.slot
, ehci_dev
.func
,
684 dword
&= ~(0x0f<<12);
685 dword
|= ((port
& 0x0f)<<12);
686 write_pci_config(ehci_dev
.bus
, ehci_dev
.slot
, ehci_dev
.func
, 0x74,
688 dbgp_printk("set debug port to %d\n", port
);
691 static void __init
detect_set_debug_port(void)
695 vendorid
= read_pci_config(ehci_dev
.bus
, ehci_dev
.slot
, ehci_dev
.func
,
698 if ((vendorid
& 0xffff) == 0x10de) {
699 dbgp_printk("using nvidia set_debug_port\n");
700 set_debug_port
= nvidia_set_debug_port
;
704 /* The code in early_ehci_bios_handoff() is derived from the usb pci
705 * quirk initialization, but altered so as to use the early PCI
707 #define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
708 #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
709 static void __init
early_ehci_bios_handoff(void)
711 u32 hcc_params
= readl(&ehci_caps
->hcc_params
);
712 int offset
= (hcc_params
>> 8) & 0xff;
719 cap
= read_pci_config(ehci_dev
.bus
, ehci_dev
.slot
,
720 ehci_dev
.func
, offset
);
721 dbgp_printk("dbgp: ehci BIOS state %08x\n", cap
);
723 if ((cap
& 0xff) == 1 && (cap
& EHCI_USBLEGSUP_BIOS
)) {
724 dbgp_printk("dbgp: BIOS handoff\n");
725 write_pci_config_byte(ehci_dev
.bus
, ehci_dev
.slot
,
726 ehci_dev
.func
, offset
+ 3, 1);
729 /* if boot firmware now owns EHCI, spin till it hands it over. */
731 while ((cap
& EHCI_USBLEGSUP_BIOS
) && (msec
> 0)) {
734 cap
= read_pci_config(ehci_dev
.bus
, ehci_dev
.slot
,
735 ehci_dev
.func
, offset
);
738 if (cap
& EHCI_USBLEGSUP_BIOS
) {
739 /* well, possibly buggy BIOS... try to shut it down,
740 * and hope nothing goes too wrong */
741 dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap
);
742 write_pci_config_byte(ehci_dev
.bus
, ehci_dev
.slot
,
743 ehci_dev
.func
, offset
+ 2, 0);
746 /* just in case, always disable EHCI SMIs */
747 write_pci_config_byte(ehci_dev
.bus
, ehci_dev
.slot
, ehci_dev
.func
,
748 offset
+ EHCI_USBLEGCTLSTS
, 0);
751 static int __init
ehci_setup(void)
753 u32 ctrl
, portsc
, hcs_params
;
754 u32 debug_port
, new_debug_port
= 0, n_ports
;
759 early_ehci_bios_handoff();
766 hcs_params
= readl(&ehci_caps
->hcs_params
);
767 debug_port
= HCS_DEBUG_PORT(hcs_params
);
768 dbgp_phys_port
= debug_port
;
769 n_ports
= HCS_N_PORTS(hcs_params
);
771 dbgp_printk("debug_port: %d\n", debug_port
);
772 dbgp_printk("n_ports: %d\n", n_ports
);
773 dbgp_ehci_status("");
775 for (i
= 1; i
<= n_ports
; i
++) {
776 portsc
= readl(&ehci_regs
->port_status
[i
-1]);
777 dbgp_printk("portstatus%d: %08x\n", i
, portsc
);
780 if (port_map_tried
&& (new_debug_port
!= debug_port
)) {
782 set_debug_port(new_debug_port
);
788 /* Only reset the controller if it is not already in the
789 * configured state */
790 if (!(readl(&ehci_regs
->configured_flag
) & FLAG_CF
)) {
791 if (dbgp_ehci_controller_reset() != 0)
794 dbgp_ehci_status("ehci skip - already configured");
797 ret
= _dbgp_external_startup();
799 goto next_debug_port
;
802 /* Things didn't work so remove my claim */
803 ctrl
= readl(&ehci_debug
->control
);
804 ctrl
&= ~(DBGP_CLAIM
| DBGP_OUT
);
805 writel(ctrl
, &ehci_debug
->control
);
811 port_map_tried
|= (1<<(debug_port
- 1));
812 new_debug_port
= ((debug_port
-1+1)%n_ports
) + 1;
813 if (port_map_tried
!= ((1<<n_ports
) - 1)) {
814 set_debug_port(new_debug_port
);
818 set_debug_port(new_debug_port
);
825 int __init
early_dbgp_init(char *s
)
827 u32 debug_port
, bar
, offset
;
828 u32 bus
, slot
, func
, cap
;
829 void __iomem
*ehci_bar
;
836 if (!early_pci_allowed())
841 dbgp_num
= simple_strtoul(s
, &e
, 10);
842 dbgp_printk("dbgp_num: %d\n", dbgp_num
);
844 cap
= find_dbgp(dbgp_num
, &bus
, &slot
, &func
);
848 dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus
, slot
,
851 debug_port
= read_pci_config(bus
, slot
, func
, cap
);
852 bar
= (debug_port
>> 29) & 0x7;
853 bar
= (bar
* 4) + 0xc;
854 offset
= (debug_port
>> 16) & 0xfff;
855 dbgp_printk("bar: %02x offset: %03x\n", bar
, offset
);
856 if (bar
!= PCI_BASE_ADDRESS_0
) {
857 dbgp_printk("only debug ports on bar 1 handled.\n");
862 bar_val
= read_pci_config(bus
, slot
, func
, PCI_BASE_ADDRESS_0
);
863 dbgp_printk("bar_val: %02x offset: %03x\n", bar_val
, offset
);
864 if (bar_val
& ~PCI_BASE_ADDRESS_MEM_MASK
) {
865 dbgp_printk("only simple 32bit mmio bars supported\n");
870 /* double check if the mem space is enabled */
871 byte
= read_pci_config_byte(bus
, slot
, func
, 0x04);
874 write_pci_config_byte(bus
, slot
, func
, 0x04, byte
);
875 dbgp_printk("mmio for ehci enabled\n");
879 * FIXME I don't have the bar size so just guess PAGE_SIZE is more
880 * than enough. 1K is the biggest I have seen.
882 set_fixmap_nocache(FIX_DBGP_BASE
, bar_val
& PAGE_MASK
);
883 ehci_bar
= (void __iomem
*)__fix_to_virt(FIX_DBGP_BASE
);
884 ehci_bar
+= bar_val
& ~PAGE_MASK
;
885 dbgp_printk("ehci_bar: %p\n", ehci_bar
);
887 ehci_caps
= ehci_bar
;
888 ehci_regs
= ehci_bar
+ EARLY_HC_LENGTH(readl(&ehci_caps
->hc_capbase
));
889 ehci_debug
= ehci_bar
+ offset
;
891 ehci_dev
.slot
= slot
;
892 ehci_dev
.func
= func
;
894 detect_set_debug_port();
898 dbgp_printk("ehci_setup failed\n");
903 dbgp_ehci_status("early_init_complete");
908 static void early_dbgp_write(struct console
*con
, const char *str
, u32 n
)
911 char buf
[DBGP_MAX_PACKET
];
916 if (!ehci_debug
|| dbgp_not_safe
)
919 cmd
= readl(&ehci_regs
->command
);
920 if (unlikely(!(cmd
& CMD_RUN
))) {
921 /* If the ehci controller is not in the run state do extended
922 * checks to see if the acpi or some other initialization also
923 * reset the ehci debug port */
924 ctrl
= readl(&ehci_debug
->control
);
925 if (!(ctrl
& DBGP_ENABLED
)) {
927 _dbgp_external_startup();
930 writel(cmd
, &ehci_regs
->command
);
935 for (chunk
= 0; chunk
< DBGP_MAX_PACKET
&& n
> 0;
936 str
++, chunk
++, n
--) {
937 if (!use_cr
&& *str
== '\n') {
949 dbgp_bulk_write(USB_DEBUG_DEVNUM
,
950 dbgp_endpoint_out
, buf
, chunk
);
953 if (unlikely(reset_run
)) {
954 cmd
= readl(&ehci_regs
->command
);
956 writel(cmd
, &ehci_regs
->command
);
960 struct console early_dbgp_console
= {
962 .write
= early_dbgp_write
,
963 .flags
= CON_PRINTBUFFER
,
967 #if IS_ENABLED(CONFIG_USB)
968 int dbgp_reset_prep(struct usb_hcd
*hcd
)
970 int ret
= xen_dbgp_reset_prep(hcd
);
980 if ((early_dbgp_console
.index
!= -1 &&
981 !(early_dbgp_console
.flags
& CON_BOOT
)) ||
984 /* This means the console is not initialized, or should get
985 * shutdown so as to allow for reuse of the usb device, which
986 * means it is time to shutdown the usb debug port. */
987 ctrl
= readl(&ehci_debug
->control
);
988 if (ctrl
& DBGP_ENABLED
) {
989 ctrl
&= ~(DBGP_CLAIM
);
990 writel(ctrl
, &ehci_debug
->control
);
994 EXPORT_SYMBOL_GPL(dbgp_reset_prep
);
996 int dbgp_external_startup(struct usb_hcd
*hcd
)
998 return xen_dbgp_external_startup(hcd
) ?: _dbgp_external_startup();
1000 EXPORT_SYMBOL_GPL(dbgp_external_startup
);
1005 static char kgdbdbgp_buf
[DBGP_MAX_PACKET
];
1006 static int kgdbdbgp_buf_sz
;
1007 static int kgdbdbgp_buf_idx
;
1008 static int kgdbdbgp_loop_cnt
= DBGP_LOOPS
;
1010 static int kgdbdbgp_read_char(void)
1014 if (kgdbdbgp_buf_idx
< kgdbdbgp_buf_sz
) {
1015 char ch
= kgdbdbgp_buf
[kgdbdbgp_buf_idx
++];
1019 ret
= dbgp_bulk_read(USB_DEBUG_DEVNUM
, dbgp_endpoint_in
,
1020 &kgdbdbgp_buf
, DBGP_MAX_PACKET
,
1023 return NO_POLL_CHAR
;
1024 kgdbdbgp_buf_sz
= ret
;
1025 kgdbdbgp_buf_idx
= 1;
1026 return kgdbdbgp_buf
[0];
1029 static void kgdbdbgp_write_char(u8 chr
)
1031 early_dbgp_write(NULL
, &chr
, 1);
1034 static struct kgdb_io kgdbdbgp_io_ops
= {
1036 .read_char
= kgdbdbgp_read_char
,
1037 .write_char
= kgdbdbgp_write_char
,
1040 static int kgdbdbgp_wait_time
;
1042 static int __init
kgdbdbgp_parse_config(char *str
)
1047 if (early_dbgp_init(str
))
1050 ptr
= strchr(str
, ',');
1053 kgdbdbgp_wait_time
= simple_strtoul(ptr
, &ptr
, 10);
1055 kgdb_register_io_module(&kgdbdbgp_io_ops
);
1056 if (early_dbgp_console
.index
!= -1)
1057 kgdbdbgp_io_ops
.cons
= &early_dbgp_console
;
1061 early_param("kgdbdbgp", kgdbdbgp_parse_config
);
1063 static int kgdbdbgp_reader_thread(void *ptr
)
1067 while (readl(&ehci_debug
->control
) & DBGP_ENABLED
) {
1068 kgdbdbgp_loop_cnt
= 1;
1069 ret
= kgdbdbgp_read_char();
1070 kgdbdbgp_loop_cnt
= DBGP_LOOPS
;
1071 if (ret
!= NO_POLL_CHAR
) {
1072 if (ret
== 0x3 || ret
== '$') {
1079 schedule_timeout_interruptible(kgdbdbgp_wait_time
* HZ
);
1084 static int __init
kgdbdbgp_start_thread(void)
1086 if (dbgp_kgdb_mode
&& kgdbdbgp_wait_time
)
1087 kthread_run(kgdbdbgp_reader_thread
, NULL
, "%s", "dbgp");
1091 device_initcall(kgdbdbgp_start_thread
);
1092 #endif /* CONFIG_KGDB */