1 /* SPDX-License-Identifier: GPL-2.0+ */
2 #ifndef __ASPEED_VHUB_H
3 #define __ASPEED_VHUB_H
6 #include <linux/usb/ch11.h>
8 /*****************************
10 * VHUB register definitions *
12 *****************************/
14 #define AST_VHUB_CTRL 0x00 /* Root Function Control & Status Register */
15 #define AST_VHUB_CONF 0x04 /* Root Configuration Setting Register */
16 #define AST_VHUB_IER 0x08 /* Interrupt Ctrl Register */
17 #define AST_VHUB_ISR 0x0C /* Interrupt Status Register */
18 #define AST_VHUB_EP_ACK_IER 0x10 /* Programmable Endpoint Pool ACK Interrupt Enable Register */
19 #define AST_VHUB_EP_NACK_IER 0x14 /* Programmable Endpoint Pool NACK Interrupt Enable Register */
20 #define AST_VHUB_EP_ACK_ISR 0x18 /* Programmable Endpoint Pool ACK Interrupt Status Register */
21 #define AST_VHUB_EP_NACK_ISR 0x1C /* Programmable Endpoint Pool NACK Interrupt Status Register */
22 #define AST_VHUB_SW_RESET 0x20 /* Device Controller Soft Reset Enable Register */
23 #define AST_VHUB_USBSTS 0x24 /* USB Status Register */
24 #define AST_VHUB_EP_TOGGLE 0x28 /* Programmable Endpoint Pool Data Toggle Value Set */
25 #define AST_VHUB_ISO_FAIL_ACC 0x2C /* Isochronous Transaction Fail Accumulator */
26 #define AST_VHUB_EP0_CTRL 0x30 /* Endpoint 0 Contrl/Status Register */
27 #define AST_VHUB_EP0_DATA 0x34 /* Base Address of Endpoint 0 In/OUT Data Buffer Register */
28 #define AST_VHUB_EP1_CTRL 0x38 /* Endpoint 1 Contrl/Status Register */
29 #define AST_VHUB_EP1_STS_CHG 0x3C /* Endpoint 1 Status Change Bitmap Data */
30 #define AST_VHUB_SETUP0 0x80 /* Root Device Setup Data Buffer0 */
31 #define AST_VHUB_SETUP1 0x84 /* Root Device Setup Data Buffer1 */
33 /* Main control reg */
34 #define VHUB_CTRL_PHY_CLK (1 << 31)
35 #define VHUB_CTRL_PHY_LOOP_TEST (1 << 25)
36 #define VHUB_CTRL_DN_PWN (1 << 24)
37 #define VHUB_CTRL_DP_PWN (1 << 23)
38 #define VHUB_CTRL_LONG_DESC (1 << 18)
39 #define VHUB_CTRL_ISO_RSP_CTRL (1 << 17)
40 #define VHUB_CTRL_SPLIT_IN (1 << 16)
41 #define VHUB_CTRL_LOOP_T_RESULT (1 << 15)
42 #define VHUB_CTRL_LOOP_T_STS (1 << 14)
43 #define VHUB_CTRL_PHY_BIST_RESULT (1 << 13)
44 #define VHUB_CTRL_PHY_BIST_CTRL (1 << 12)
45 #define VHUB_CTRL_PHY_RESET_DIS (1 << 11)
46 #define VHUB_CTRL_SET_TEST_MODE(x) ((x) << 8)
47 #define VHUB_CTRL_MANUAL_REMOTE_WAKEUP (1 << 4)
48 #define VHUB_CTRL_AUTO_REMOTE_WAKEUP (1 << 3)
49 #define VHUB_CTRL_CLK_STOP_SUSPEND (1 << 2)
50 #define VHUB_CTRL_FULL_SPEED_ONLY (1 << 1)
51 #define VHUB_CTRL_UPSTREAM_CONNECT (1 << 0)
54 #define VHUB_IRQ_DEV1_BIT 9
55 #define VHUB_IRQ_USB_CMD_DEADLOCK (1 << 18)
56 #define VHUB_IRQ_EP_POOL_NAK (1 << 17)
57 #define VHUB_IRQ_EP_POOL_ACK_STALL (1 << 16)
58 #define VHUB_IRQ_DEVICE1 (1 << (VHUB_IRQ_DEV1_BIT))
59 #define VHUB_IRQ_BUS_RESUME (1 << 8)
60 #define VHUB_IRQ_BUS_SUSPEND (1 << 7)
61 #define VHUB_IRQ_BUS_RESET (1 << 6)
62 #define VHUB_IRQ_HUB_EP1_IN_DATA_ACK (1 << 5)
63 #define VHUB_IRQ_HUB_EP0_IN_DATA_NAK (1 << 4)
64 #define VHUB_IRQ_HUB_EP0_IN_ACK_STALL (1 << 3)
65 #define VHUB_IRQ_HUB_EP0_OUT_NAK (1 << 2)
66 #define VHUB_IRQ_HUB_EP0_OUT_ACK_STALL (1 << 1)
67 #define VHUB_IRQ_HUB_EP0_SETUP (1 << 0)
68 #define VHUB_IRQ_ACK_ALL 0x1ff
70 /* Downstream device IRQ mask. */
71 #define VHUB_DEV_IRQ(n) (VHUB_IRQ_DEVICE1 << (n))
74 #define VHUB_SW_RESET_EP_POOL (1 << 9)
75 #define VHUB_SW_RESET_DMA_CONTROLLER (1 << 8)
76 #define VHUB_SW_RESET_DEVICE5 (1 << 5)
77 #define VHUB_SW_RESET_DEVICE4 (1 << 4)
78 #define VHUB_SW_RESET_DEVICE3 (1 << 3)
79 #define VHUB_SW_RESET_DEVICE2 (1 << 2)
80 #define VHUB_SW_RESET_DEVICE1 (1 << 1)
81 #define VHUB_SW_RESET_ROOT_HUB (1 << 0)
83 /* EP ACK/NACK IRQ masks */
84 #define VHUB_EP_IRQ(n) (1 << (n))
87 #define VHUB_USBSTS_HISPEED (1 << 27)
90 #define VHUB_EP_TOGGLE_VALUE (1 << 8)
91 #define VHUB_EP_TOGGLE_SET_EPNUM(x) ((x) & 0x1f)
94 #define VHUB_EP0_CTRL_STALL (1 << 0)
95 #define VHUB_EP0_TX_BUFF_RDY (1 << 1)
96 #define VHUB_EP0_RX_BUFF_RDY (1 << 2)
97 #define VHUB_EP0_RX_LEN(x) (((x) >> 16) & 0x7f)
98 #define VHUB_EP0_SET_TX_LEN(x) (((x) & 0x7f) << 8)
100 /* HUB EP1 control */
101 #define VHUB_EP1_CTRL_RESET_TOGGLE (1 << 2)
102 #define VHUB_EP1_CTRL_STALL (1 << 1)
103 #define VHUB_EP1_CTRL_ENABLE (1 << 0)
105 /***********************************
107 * per-device register definitions *
109 ***********************************/
110 #define AST_VHUB_DEV_EN_CTRL 0x00
111 #define AST_VHUB_DEV_ISR 0x04
112 #define AST_VHUB_DEV_EP0_CTRL 0x08
113 #define AST_VHUB_DEV_EP0_DATA 0x0c
115 /* Device enable control */
116 #define VHUB_DEV_EN_SET_ADDR(x) ((x) << 8)
117 #define VHUB_DEV_EN_ADDR_MASK ((0xff) << 8)
118 #define VHUB_DEV_EN_EP0_NAK_IRQEN (1 << 6)
119 #define VHUB_DEV_EN_EP0_IN_ACK_IRQEN (1 << 5)
120 #define VHUB_DEV_EN_EP0_OUT_NAK_IRQEN (1 << 4)
121 #define VHUB_DEV_EN_EP0_OUT_ACK_IRQEN (1 << 3)
122 #define VHUB_DEV_EN_EP0_SETUP_IRQEN (1 << 2)
123 #define VHUB_DEV_EN_SPEED_SEL_HIGH (1 << 1)
124 #define VHUB_DEV_EN_ENABLE_PORT (1 << 0)
126 /* Interrupt status */
127 #define VHUV_DEV_IRQ_EP0_IN_DATA_NACK (1 << 4)
128 #define VHUV_DEV_IRQ_EP0_IN_ACK_STALL (1 << 3)
129 #define VHUV_DEV_IRQ_EP0_OUT_DATA_NACK (1 << 2)
130 #define VHUV_DEV_IRQ_EP0_OUT_ACK_STALL (1 << 1)
131 #define VHUV_DEV_IRQ_EP0_SETUP (1 << 0)
135 * Note: The driver relies on the bulk of those bits
136 * matching corresponding vHub EP0 control bits
138 #define VHUB_DEV_EP0_CTRL_STALL VHUB_EP0_CTRL_STALL
139 #define VHUB_DEV_EP0_TX_BUFF_RDY VHUB_EP0_TX_BUFF_RDY
140 #define VHUB_DEV_EP0_RX_BUFF_RDY VHUB_EP0_RX_BUFF_RDY
141 #define VHUB_DEV_EP0_RX_LEN(x) VHUB_EP0_RX_LEN(x)
142 #define VHUB_DEV_EP0_SET_TX_LEN(x) VHUB_EP0_SET_TX_LEN(x)
144 /*************************************
146 * per-endpoint register definitions *
148 *************************************/
150 #define AST_VHUB_EP_CONFIG 0x00
151 #define AST_VHUB_EP_DMA_CTLSTAT 0x04
152 #define AST_VHUB_EP_DESC_BASE 0x08
153 #define AST_VHUB_EP_DESC_STATUS 0x0C
156 #define VHUB_EP_CFG_SET_MAX_PKT(x) (((x) & 0x3ff) << 16)
157 #define VHUB_EP_CFG_AUTO_DATA_DISABLE (1 << 13)
158 #define VHUB_EP_CFG_STALL_CTRL (1 << 12)
159 #define VHUB_EP_CFG_SET_EP_NUM(x) (((x) & 0xf) << 8)
160 #define VHUB_EP_CFG_SET_TYPE(x) ((x) << 5)
161 #define EP_TYPE_OFF 0
162 #define EP_TYPE_BULK 1
163 #define EP_TYPE_INT 2
164 #define EP_TYPE_ISO 3
165 #define VHUB_EP_CFG_DIR_OUT (1 << 4)
166 #define VHUB_EP_CFG_SET_DEV(x) ((x) << 1)
167 #define VHUB_EP_CFG_ENABLE (1 << 0)
170 #define VHUB_EP_DMA_PROC_STATUS(x) (((x) >> 4) & 0xf)
171 #define EP_DMA_PROC_RX_IDLE 0
172 #define EP_DMA_PROC_TX_IDLE 8
173 #define VHUB_EP_DMA_IN_LONG_MODE (1 << 3)
174 #define VHUB_EP_DMA_OUT_CONTIG_MODE (1 << 3)
175 #define VHUB_EP_DMA_CTRL_RESET (1 << 2)
176 #define VHUB_EP_DMA_SINGLE_STAGE (1 << 1)
177 #define VHUB_EP_DMA_DESC_MODE (1 << 0)
180 #define VHUB_EP_DMA_SET_TX_SIZE(x) ((x) << 16)
181 #define VHUB_EP_DMA_TX_SIZE(x) (((x) >> 16) & 0x7ff)
182 #define VHUB_EP_DMA_RPTR(x) (((x) >> 8) & 0xff)
183 #define VHUB_EP_DMA_SET_RPTR(x) (((x) & 0xff) << 8)
184 #define VHUB_EP_DMA_SET_CPU_WPTR(x) (x)
185 #define VHUB_EP_DMA_SINGLE_KICK (1 << 0) /* WPTR = 1 for single mode */
187 /*******************************
189 * DMA descriptors definitions *
191 *******************************/
194 #define VHUB_DSC1_IN_INTERRUPT (1 << 31)
195 #define VHUB_DSC1_IN_SPID_DATA0 (0 << 14)
196 #define VHUB_DSC1_IN_SPID_DATA2 (1 << 14)
197 #define VHUB_DSC1_IN_SPID_DATA1 (2 << 14)
198 #define VHUB_DSC1_IN_SPID_MDATA (3 << 14)
199 #define VHUB_DSC1_IN_SET_LEN(x) ((x) & 0xfff)
200 #define VHUB_DSC1_IN_LEN(x) ((x) & 0xfff)
202 /****************************************
204 * Data structures and misc definitions *
206 ****************************************/
209 * AST_VHUB_NUM_GEN_EPs and AST_VHUB_NUM_PORTS are kept to avoid breaking
210 * existing AST2400/AST2500 platforms. AST2600 and future vhub revisions
211 * should define number of downstream ports and endpoints in device tree.
213 #define AST_VHUB_NUM_GEN_EPs 15 /* Generic non-0 EPs */
214 #define AST_VHUB_NUM_PORTS 5 /* vHub ports */
215 #define AST_VHUB_EP0_MAX_PACKET 64 /* EP0's max packet size */
216 #define AST_VHUB_EPn_MAX_PACKET 1024 /* Generic EPs max packet size */
217 #define AST_VHUB_DESCS_COUNT 256 /* Use 256 descriptor mode (valid
218 * values are 256 and 32)
225 * DMA descriptor (generic EPs only, currently only used
228 struct ast_vhub_desc
{
233 /* A transfer request, either core-originated or internal */
234 struct ast_vhub_req
{
235 struct usb_request req
;
236 struct list_head queue
;
238 /* Actual count written to descriptors (desc mode only) */
239 unsigned int act_count
;
242 * Desc number of the final packet or -1. For non-desc
243 * mode (or ep0), any >= 0 value means "last packet"
247 /* Request active (pending DMAs) */
250 /* Internal request (don't call back core) */
253 #define to_ast_req(__ureq) container_of(__ureq, struct ast_vhub_req, req)
255 /* Current state of an EP0 */
264 * An endpoint, either generic, ep0, actual gadget EP
265 * or internal use vhub EP0. vhub EP1 doesn't have an
266 * associated structure as it's mostly HW managed.
272 struct list_head queue
;
274 /* EP index in the device, 0 means this is an EP0 */
277 /* Dev pointer or NULL for vHub EP0 */
278 struct ast_vhub_dev
*dev
;
281 struct ast_vhub
*vhub
;
284 * DMA buffer for EP0, fallback DMA buffer for misaligned
285 * OUT transfers for generic EPs
290 /* The rest depends on the EP type */
292 /* EP0 (either device or vhub) */
295 * EP0 registers are "similar" for
296 * vHub and devices but located in
299 void __iomem
*ctlstat
;
302 /* Current state & direction */
303 enum ep0_state state
;
306 /* Internal use request */
307 struct ast_vhub_req req
;
310 /* Generic endpoint (aka EPn) */
315 /* Index in global pool (zero-based) */
318 /* DMA Descriptors */
319 struct ast_vhub_desc
*descs
;
320 dma_addr_t descs_dma
;
323 unsigned int dma_conf
;
325 /* Max chunk size for IN EPs */
326 unsigned int chunk_max
;
338 #define to_ast_ep(__uep) container_of(__uep, struct ast_vhub_ep, ep)
340 /* A device attached to a vHub port */
341 struct ast_vhub_dev
{
342 struct ast_vhub
*vhub
;
345 /* Device index (zero-based) and name string */
349 /* sysfs enclosure for the gadget gunk */
350 struct device
*port_dev
;
352 /* Link to gadget core */
353 struct usb_gadget gadget
;
354 struct usb_gadget_driver
*driver
;
359 /* Endpoint structures */
360 struct ast_vhub_ep ep0
;
361 struct ast_vhub_ep
**epns
;
365 #define to_ast_dev(__g) container_of(__g, struct ast_vhub_dev, gadget)
367 /* Per vhub port stateinfo structure */
368 struct ast_vhub_port
{
369 /* Port status & status change registers */
373 /* Associated device slot */
374 struct ast_vhub_dev dev
;
377 struct ast_vhub_full_cdesc
{
378 struct usb_config_descriptor cfg
;
379 struct usb_interface_descriptor intf
;
380 struct usb_endpoint_descriptor ep
;
383 /* Global vhub structure */
385 struct platform_device
*pdev
;
389 struct work_struct wake_work
;
392 /* EP0 DMA buffers allocated in one chunk */
394 dma_addr_t ep0_bufs_dma
;
396 /* EP0 of the vhub itself */
397 struct ast_vhub_ep ep0
;
399 /* State of vhub ep1 */
400 bool ep1_stalled
: 1;
403 struct ast_vhub_port
*ports
;
407 /* Generic EP data structures */
408 struct ast_vhub_ep
*epns
;
411 /* Upstream bus is suspended ? */
414 /* Hub itself can signal remote wakeup */
417 /* Force full speed only */
420 /* Upstream bus speed captured at bus reset */
423 /* Standard USB Descriptors of the vhub. */
424 struct usb_device_descriptor vhub_dev_desc
;
425 struct ast_vhub_full_cdesc vhub_conf_desc
;
426 struct usb_hub_descriptor vhub_hub_desc
;
427 struct list_head vhub_str_desc
;
430 /* Standard request handlers result codes */
432 std_req_stall
= -1, /* Stall requested */
433 std_req_complete
= 0, /* Request completed with no data */
434 std_req_data
= 1, /* Request completed with data */
435 std_req_driver
= 2, /* Pass to driver pls */
438 #ifdef CONFIG_USB_GADGET_VERBOSE
439 #define UDCVDBG(u, fmt...) dev_dbg(&(u)->pdev->dev, fmt)
441 #define EPVDBG(ep, fmt, ...) do { \
442 dev_dbg(&(ep)->vhub->pdev->dev, \
444 (ep)->dev ? (ep)->dev->name : "hub", \
445 (ep)->d_idx, ##__VA_ARGS__); \
448 #define DVDBG(d, fmt, ...) do { \
449 dev_dbg(&(d)->vhub->pdev->dev, \
450 "%s " fmt, (d)->name, \
455 #define UDCVDBG(u, fmt...) do { } while(0)
456 #define EPVDBG(ep, fmt, ...) do { } while(0)
457 #define DVDBG(d, fmt, ...) do { } while(0)
460 #ifdef CONFIG_USB_GADGET_DEBUG
461 #define UDCDBG(u, fmt...) dev_dbg(&(u)->pdev->dev, fmt)
463 #define EPDBG(ep, fmt, ...) do { \
464 dev_dbg(&(ep)->vhub->pdev->dev, \
466 (ep)->dev ? (ep)->dev->name : "hub", \
467 (ep)->d_idx, ##__VA_ARGS__); \
470 #define DDBG(d, fmt, ...) do { \
471 dev_dbg(&(d)->vhub->pdev->dev, \
472 "%s " fmt, (d)->name, \
476 #define UDCDBG(u, fmt...) do { } while(0)
477 #define EPDBG(ep, fmt, ...) do { } while(0)
478 #define DDBG(d, fmt, ...) do { } while(0)
481 static inline void vhub_dma_workaround(void *addr
)
484 * This works around a confirmed HW issue with the Aspeed chip.
486 * The core uses a different bus to memory than the AHB going to
487 * the USB device controller. Due to the latter having a higher
488 * priority than the core for arbitration on that bus, it's
489 * possible for an MMIO to the device, followed by a DMA by the
490 * device from memory to all be performed and services before
491 * a previous store to memory gets completed.
493 * This the following scenario can happen:
495 * - Driver writes to a DMA descriptor (Mbus)
496 * - Driver writes to the MMIO register to start the DMA (AHB)
497 * - The gadget sees the second write and sends a read of the
498 * descriptor to the memory controller (Mbus)
499 * - The gadget hits memory before the descriptor write
500 * causing it to read an obsolete value.
502 * Thankfully the problem is limited to the USB gadget device, other
503 * masters in the SoC all have a lower priority than the core, thus
504 * ensuring that the store by the core arrives first.
506 * The workaround consists of using a dummy read of the memory before
507 * doing the MMIO writes. This will ensure that the previous writes
508 * have been "pushed out".
511 (void)__raw_readl((void __iomem
*)addr
);
515 void ast_vhub_done(struct ast_vhub_ep
*ep
, struct ast_vhub_req
*req
,
517 void ast_vhub_nuke(struct ast_vhub_ep
*ep
, int status
);
518 struct usb_request
*ast_vhub_alloc_request(struct usb_ep
*u_ep
,
520 void ast_vhub_free_request(struct usb_ep
*u_ep
, struct usb_request
*u_req
);
521 void ast_vhub_init_hw(struct ast_vhub
*vhub
);
524 void ast_vhub_ep0_handle_ack(struct ast_vhub_ep
*ep
, bool in_ack
);
525 void ast_vhub_ep0_handle_setup(struct ast_vhub_ep
*ep
);
526 void ast_vhub_reset_ep0(struct ast_vhub_dev
*dev
);
527 void ast_vhub_init_ep0(struct ast_vhub
*vhub
, struct ast_vhub_ep
*ep
,
528 struct ast_vhub_dev
*dev
);
529 int ast_vhub_reply(struct ast_vhub_ep
*ep
, char *ptr
, int len
);
530 int __ast_vhub_simple_reply(struct ast_vhub_ep
*ep
, int len
, ...);
531 #define ast_vhub_simple_reply(udc, ...) \
532 __ast_vhub_simple_reply((udc), \
533 sizeof((u8[]) { __VA_ARGS__ })/sizeof(u8), \
537 int ast_vhub_init_hub(struct ast_vhub
*vhub
);
538 enum std_req_rc
ast_vhub_std_hub_request(struct ast_vhub_ep
*ep
,
539 struct usb_ctrlrequest
*crq
);
540 enum std_req_rc
ast_vhub_class_hub_request(struct ast_vhub_ep
*ep
,
541 struct usb_ctrlrequest
*crq
);
542 void ast_vhub_device_connect(struct ast_vhub
*vhub
, unsigned int port
,
544 void ast_vhub_hub_suspend(struct ast_vhub
*vhub
);
545 void ast_vhub_hub_resume(struct ast_vhub
*vhub
);
546 void ast_vhub_hub_reset(struct ast_vhub
*vhub
);
547 void ast_vhub_hub_wake_all(struct ast_vhub
*vhub
);
550 int ast_vhub_init_dev(struct ast_vhub
*vhub
, unsigned int idx
);
551 void ast_vhub_del_dev(struct ast_vhub_dev
*d
);
552 void ast_vhub_dev_irq(struct ast_vhub_dev
*d
);
553 int ast_vhub_std_dev_request(struct ast_vhub_ep
*ep
,
554 struct usb_ctrlrequest
*crq
);
557 void ast_vhub_epn_ack_irq(struct ast_vhub_ep
*ep
);
558 void ast_vhub_update_epn_stall(struct ast_vhub_ep
*ep
);
559 struct ast_vhub_ep
*ast_vhub_alloc_epn(struct ast_vhub_dev
*d
, u8 addr
);
560 void ast_vhub_dev_suspend(struct ast_vhub_dev
*d
);
561 void ast_vhub_dev_resume(struct ast_vhub_dev
*d
);
562 void ast_vhub_dev_reset(struct ast_vhub_dev
*d
);
564 #endif /* __ASPEED_VHUB_H */