1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016 MediaTek Inc.
5 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
9 #include <linux/dma-mapping.h>
10 #include <linux/iopoll.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/of_address.h>
14 #include <linux/of_irq.h>
15 #include <linux/platform_device.h>
19 #include "mtu3_debug.h"
21 /* u2-port0 should be powered on and enabled; */
22 int ssusb_check_clocks(struct ssusb_mtk
*ssusb
, u32 ex_clks
)
24 void __iomem
*ibase
= ssusb
->ippc_base
;
28 check_val
= ex_clks
| SSUSB_SYS125_RST_B_STS
| SSUSB_SYSPLL_STABLE
|
31 ret
= readl_poll_timeout(ibase
+ U3D_SSUSB_IP_PW_STS1
, value
,
32 (check_val
== (value
& check_val
)), 100, 20000);
34 dev_err(ssusb
->dev
, "clks of sts1 are not stable!\n");
38 ret
= readl_poll_timeout(ibase
+ U3D_SSUSB_IP_PW_STS2
, value
,
39 (value
& SSUSB_U2_MAC_SYS_RST_B_STS
), 100, 10000);
41 dev_err(ssusb
->dev
, "mac2 clock is not stable\n");
48 static int ssusb_phy_init(struct ssusb_mtk
*ssusb
)
53 for (i
= 0; i
< ssusb
->num_phys
; i
++) {
54 ret
= phy_init(ssusb
->phys
[i
]);
62 phy_exit(ssusb
->phys
[i
- 1]);
67 static int ssusb_phy_exit(struct ssusb_mtk
*ssusb
)
71 for (i
= 0; i
< ssusb
->num_phys
; i
++)
72 phy_exit(ssusb
->phys
[i
]);
77 static int ssusb_phy_power_on(struct ssusb_mtk
*ssusb
)
82 for (i
= 0; i
< ssusb
->num_phys
; i
++) {
83 ret
= phy_power_on(ssusb
->phys
[i
]);
91 phy_power_off(ssusb
->phys
[i
- 1]);
96 static void ssusb_phy_power_off(struct ssusb_mtk
*ssusb
)
100 for (i
= 0; i
< ssusb
->num_phys
; i
++)
101 phy_power_off(ssusb
->phys
[i
]);
104 static int ssusb_clks_enable(struct ssusb_mtk
*ssusb
)
108 ret
= clk_prepare_enable(ssusb
->sys_clk
);
110 dev_err(ssusb
->dev
, "failed to enable sys_clk\n");
114 ret
= clk_prepare_enable(ssusb
->ref_clk
);
116 dev_err(ssusb
->dev
, "failed to enable ref_clk\n");
120 ret
= clk_prepare_enable(ssusb
->mcu_clk
);
122 dev_err(ssusb
->dev
, "failed to enable mcu_clk\n");
126 ret
= clk_prepare_enable(ssusb
->dma_clk
);
128 dev_err(ssusb
->dev
, "failed to enable dma_clk\n");
135 clk_disable_unprepare(ssusb
->mcu_clk
);
137 clk_disable_unprepare(ssusb
->ref_clk
);
139 clk_disable_unprepare(ssusb
->sys_clk
);
144 static void ssusb_clks_disable(struct ssusb_mtk
*ssusb
)
146 clk_disable_unprepare(ssusb
->dma_clk
);
147 clk_disable_unprepare(ssusb
->mcu_clk
);
148 clk_disable_unprepare(ssusb
->ref_clk
);
149 clk_disable_unprepare(ssusb
->sys_clk
);
152 static int ssusb_rscs_init(struct ssusb_mtk
*ssusb
)
156 ret
= regulator_enable(ssusb
->vusb33
);
158 dev_err(ssusb
->dev
, "failed to enable vusb33\n");
162 ret
= ssusb_clks_enable(ssusb
);
166 ret
= ssusb_phy_init(ssusb
);
168 dev_err(ssusb
->dev
, "failed to init phy\n");
172 ret
= ssusb_phy_power_on(ssusb
);
174 dev_err(ssusb
->dev
, "failed to power on phy\n");
181 ssusb_phy_exit(ssusb
);
183 ssusb_clks_disable(ssusb
);
185 regulator_disable(ssusb
->vusb33
);
190 static void ssusb_rscs_exit(struct ssusb_mtk
*ssusb
)
192 ssusb_clks_disable(ssusb
);
193 regulator_disable(ssusb
->vusb33
);
194 ssusb_phy_power_off(ssusb
);
195 ssusb_phy_exit(ssusb
);
198 static void ssusb_ip_sw_reset(struct ssusb_mtk
*ssusb
)
200 /* reset whole ip (xhci & u3d) */
201 mtu3_setbits(ssusb
->ippc_base
, U3D_SSUSB_IP_PW_CTRL0
, SSUSB_IP_SW_RST
);
203 mtu3_clrbits(ssusb
->ippc_base
, U3D_SSUSB_IP_PW_CTRL0
, SSUSB_IP_SW_RST
);
206 * device ip may be powered on in firmware/BROM stage before entering
208 * power down device ip, otherwise ip-sleep will fail when working as
211 mtu3_setbits(ssusb
->ippc_base
, U3D_SSUSB_IP_PW_CTRL2
, SSUSB_IP_DEV_PDN
);
214 static int get_ssusb_rscs(struct platform_device
*pdev
, struct ssusb_mtk
*ssusb
)
216 struct device_node
*node
= pdev
->dev
.of_node
;
217 struct otg_switch_mtk
*otg_sx
= &ssusb
->otg_switch
;
218 struct device
*dev
= &pdev
->dev
;
222 ssusb
->vusb33
= devm_regulator_get(dev
, "vusb33");
223 if (IS_ERR(ssusb
->vusb33
)) {
224 dev_err(dev
, "failed to get vusb33\n");
225 return PTR_ERR(ssusb
->vusb33
);
228 ssusb
->sys_clk
= devm_clk_get(dev
, "sys_ck");
229 if (IS_ERR(ssusb
->sys_clk
)) {
230 dev_err(dev
, "failed to get sys clock\n");
231 return PTR_ERR(ssusb
->sys_clk
);
234 ssusb
->ref_clk
= devm_clk_get_optional(dev
, "ref_ck");
235 if (IS_ERR(ssusb
->ref_clk
))
236 return PTR_ERR(ssusb
->ref_clk
);
238 ssusb
->mcu_clk
= devm_clk_get_optional(dev
, "mcu_ck");
239 if (IS_ERR(ssusb
->mcu_clk
))
240 return PTR_ERR(ssusb
->mcu_clk
);
242 ssusb
->dma_clk
= devm_clk_get_optional(dev
, "dma_ck");
243 if (IS_ERR(ssusb
->dma_clk
))
244 return PTR_ERR(ssusb
->dma_clk
);
246 ssusb
->num_phys
= of_count_phandle_with_args(node
,
247 "phys", "#phy-cells");
248 if (ssusb
->num_phys
> 0) {
249 ssusb
->phys
= devm_kcalloc(dev
, ssusb
->num_phys
,
250 sizeof(*ssusb
->phys
), GFP_KERNEL
);
257 for (i
= 0; i
< ssusb
->num_phys
; i
++) {
258 ssusb
->phys
[i
] = devm_of_phy_get_by_index(dev
, node
, i
);
259 if (IS_ERR(ssusb
->phys
[i
])) {
260 dev_err(dev
, "failed to get phy-%d\n", i
);
261 return PTR_ERR(ssusb
->phys
[i
]);
265 ssusb
->ippc_base
= devm_platform_ioremap_resource_byname(pdev
, "ippc");
266 if (IS_ERR(ssusb
->ippc_base
))
267 return PTR_ERR(ssusb
->ippc_base
);
269 ssusb
->dr_mode
= usb_get_dr_mode(dev
);
270 if (ssusb
->dr_mode
== USB_DR_MODE_UNKNOWN
)
271 ssusb
->dr_mode
= USB_DR_MODE_OTG
;
273 if (ssusb
->dr_mode
== USB_DR_MODE_PERIPHERAL
)
276 /* if host role is supported */
277 ret
= ssusb_wakeup_of_property_parse(ssusb
, node
);
279 dev_err(dev
, "failed to parse uwk property\n");
283 /* optional property, ignore the error if it does not exist */
284 of_property_read_u32(node
, "mediatek,u3p-dis-msk",
285 &ssusb
->u3p_dis_msk
);
287 otg_sx
->vbus
= devm_regulator_get(dev
, "vbus");
288 if (IS_ERR(otg_sx
->vbus
)) {
289 dev_err(dev
, "failed to get vbus\n");
290 return PTR_ERR(otg_sx
->vbus
);
293 if (ssusb
->dr_mode
== USB_DR_MODE_HOST
)
296 /* if dual-role mode is supported */
297 otg_sx
->is_u3_drd
= of_property_read_bool(node
, "mediatek,usb3-drd");
298 otg_sx
->manual_drd_enabled
=
299 of_property_read_bool(node
, "enable-manual-drd");
300 otg_sx
->role_sw_used
= of_property_read_bool(node
, "usb-role-switch");
302 if (!otg_sx
->role_sw_used
&& of_property_read_bool(node
, "extcon")) {
303 otg_sx
->edev
= extcon_get_edev_by_phandle(ssusb
->dev
, 0);
304 if (IS_ERR(otg_sx
->edev
)) {
305 dev_err(ssusb
->dev
, "couldn't get extcon device\n");
306 return PTR_ERR(otg_sx
->edev
);
311 dev_info(dev
, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n",
312 ssusb
->dr_mode
, otg_sx
->is_u3_drd
, ssusb
->u3p_dis_msk
,
313 otg_sx
->manual_drd_enabled
? "manual" : "auto");
318 static int mtu3_probe(struct platform_device
*pdev
)
320 struct device_node
*node
= pdev
->dev
.of_node
;
321 struct device
*dev
= &pdev
->dev
;
322 struct ssusb_mtk
*ssusb
;
325 /* all elements are set to ZERO as default value */
326 ssusb
= devm_kzalloc(dev
, sizeof(*ssusb
), GFP_KERNEL
);
330 ret
= dma_set_mask_and_coherent(dev
, DMA_BIT_MASK(32));
332 dev_err(dev
, "No suitable DMA config available\n");
336 platform_set_drvdata(pdev
, ssusb
);
339 ret
= get_ssusb_rscs(pdev
, ssusb
);
343 ssusb_debugfs_create_root(ssusb
);
345 /* enable power domain */
346 pm_runtime_enable(dev
);
347 pm_runtime_get_sync(dev
);
348 device_enable_async_suspend(dev
);
350 ret
= ssusb_rscs_init(ssusb
);
354 ssusb_ip_sw_reset(ssusb
);
356 if (IS_ENABLED(CONFIG_USB_MTU3_HOST
))
357 ssusb
->dr_mode
= USB_DR_MODE_HOST
;
358 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET
))
359 ssusb
->dr_mode
= USB_DR_MODE_PERIPHERAL
;
361 /* default as host */
362 ssusb
->is_host
= !(ssusb
->dr_mode
== USB_DR_MODE_PERIPHERAL
);
364 switch (ssusb
->dr_mode
) {
365 case USB_DR_MODE_PERIPHERAL
:
366 ret
= ssusb_gadget_init(ssusb
);
368 dev_err(dev
, "failed to initialize gadget\n");
372 case USB_DR_MODE_HOST
:
373 ret
= ssusb_host_init(ssusb
, node
);
375 dev_err(dev
, "failed to initialize host\n");
379 case USB_DR_MODE_OTG
:
380 ret
= ssusb_gadget_init(ssusb
);
382 dev_err(dev
, "failed to initialize gadget\n");
386 ret
= ssusb_host_init(ssusb
, node
);
388 dev_err(dev
, "failed to initialize host\n");
392 ret
= ssusb_otg_switch_init(ssusb
);
394 dev_err(dev
, "failed to initialize switch\n");
399 dev_err(dev
, "unsupported mode: %d\n", ssusb
->dr_mode
);
407 ssusb_host_exit(ssusb
);
409 ssusb_gadget_exit(ssusb
);
411 ssusb_rscs_exit(ssusb
);
413 pm_runtime_put_sync(dev
);
414 pm_runtime_disable(dev
);
415 ssusb_debugfs_remove_root(ssusb
);
420 static int mtu3_remove(struct platform_device
*pdev
)
422 struct ssusb_mtk
*ssusb
= platform_get_drvdata(pdev
);
424 switch (ssusb
->dr_mode
) {
425 case USB_DR_MODE_PERIPHERAL
:
426 ssusb_gadget_exit(ssusb
);
428 case USB_DR_MODE_HOST
:
429 ssusb_host_exit(ssusb
);
431 case USB_DR_MODE_OTG
:
432 ssusb_otg_switch_exit(ssusb
);
433 ssusb_gadget_exit(ssusb
);
434 ssusb_host_exit(ssusb
);
440 ssusb_rscs_exit(ssusb
);
441 pm_runtime_put_sync(&pdev
->dev
);
442 pm_runtime_disable(&pdev
->dev
);
443 ssusb_debugfs_remove_root(ssusb
);
449 * when support dual-role mode, we reject suspend when
450 * it works as device mode;
452 static int __maybe_unused
mtu3_suspend(struct device
*dev
)
454 struct ssusb_mtk
*ssusb
= dev_get_drvdata(dev
);
456 dev_dbg(dev
, "%s\n", __func__
);
458 /* REVISIT: disconnect it for only device mode? */
462 ssusb_host_disable(ssusb
, true);
463 ssusb_phy_power_off(ssusb
);
464 ssusb_clks_disable(ssusb
);
465 ssusb_wakeup_set(ssusb
, true);
470 static int __maybe_unused
mtu3_resume(struct device
*dev
)
472 struct ssusb_mtk
*ssusb
= dev_get_drvdata(dev
);
475 dev_dbg(dev
, "%s\n", __func__
);
480 ssusb_wakeup_set(ssusb
, false);
481 ret
= ssusb_clks_enable(ssusb
);
485 ret
= ssusb_phy_power_on(ssusb
);
489 ssusb_host_enable(ssusb
);
494 ssusb_clks_disable(ssusb
);
499 static const struct dev_pm_ops mtu3_pm_ops
= {
500 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend
, mtu3_resume
)
503 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
507 static const struct of_device_id mtu3_of_match
[] = {
508 {.compatible
= "mediatek,mt8173-mtu3",},
509 {.compatible
= "mediatek,mtu3",},
513 MODULE_DEVICE_TABLE(of
, mtu3_of_match
);
517 static struct platform_driver mtu3_driver
= {
519 .remove
= mtu3_remove
,
521 .name
= MTU3_DRIVER_NAME
,
523 .of_match_table
= of_match_ptr(mtu3_of_match
),
526 module_platform_driver(mtu3_driver
);
528 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
529 MODULE_LICENSE("GPL v2");
530 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");