WIP FPC-III support
[linux/fpc-iii.git] / drivers / watchdog / ie6xx_wdt.c
blob8f28993fab8b56aa11effc154f3fc9d198710e7a
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Intel Atom E6xx Watchdog driver
5 * Copyright (C) 2011 Alexander Stein
6 * <alexander.stein@systec-electronic.com>
7 */
9 #include <linux/module.h>
10 #include <linux/moduleparam.h>
11 #include <linux/platform_device.h>
12 #include <linux/io.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/watchdog.h>
16 #include <linux/seq_file.h>
17 #include <linux/debugfs.h>
18 #include <linux/uaccess.h>
19 #include <linux/spinlock.h>
21 #define DRIVER_NAME "ie6xx_wdt"
23 #define PV1 0x00
24 #define PV2 0x04
26 #define RR0 0x0c
27 #define RR1 0x0d
28 #define WDT_RELOAD 0x01
29 #define WDT_TOUT 0x02
31 #define WDTCR 0x10
32 #define WDT_PRE_SEL 0x04
33 #define WDT_RESET_SEL 0x08
34 #define WDT_RESET_EN 0x10
35 #define WDT_TOUT_EN 0x20
37 #define DCR 0x14
39 #define WDTLR 0x18
40 #define WDT_LOCK 0x01
41 #define WDT_ENABLE 0x02
42 #define WDT_TOUT_CNF 0x03
44 #define MIN_TIME 1
45 #define MAX_TIME (10 * 60) /* 10 minutes */
46 #define DEFAULT_TIME 60
48 static unsigned int timeout = DEFAULT_TIME;
49 module_param(timeout, uint, 0);
50 MODULE_PARM_DESC(timeout,
51 "Default Watchdog timer setting ("
52 __MODULE_STRING(DEFAULT_TIME) "s)."
53 "The range is from 1 to 600");
55 static bool nowayout = WATCHDOG_NOWAYOUT;
56 module_param(nowayout, bool, 0);
57 MODULE_PARM_DESC(nowayout,
58 "Watchdog cannot be stopped once started (default="
59 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
61 static u8 resetmode = 0x10;
62 module_param(resetmode, byte, 0);
63 MODULE_PARM_DESC(resetmode,
64 "Resetmode bits: 0x08 warm reset (cold reset otherwise), "
65 "0x10 reset enable, 0x20 disable toggle GPIO[4] (default=0x10)");
67 static struct {
68 unsigned short sch_wdtba;
69 spinlock_t unlock_sequence;
70 #ifdef CONFIG_DEBUG_FS
71 struct dentry *debugfs;
72 #endif
73 } ie6xx_wdt_data;
76 * This is needed to write to preload and reload registers
77 * struct ie6xx_wdt_data.unlock_sequence must be used
78 * to prevent sequence interrupts
80 static void ie6xx_wdt_unlock_registers(void)
82 outb(0x80, ie6xx_wdt_data.sch_wdtba + RR0);
83 outb(0x86, ie6xx_wdt_data.sch_wdtba + RR0);
86 static int ie6xx_wdt_ping(struct watchdog_device *wdd)
88 spin_lock(&ie6xx_wdt_data.unlock_sequence);
89 ie6xx_wdt_unlock_registers();
90 outb(WDT_RELOAD, ie6xx_wdt_data.sch_wdtba + RR1);
91 spin_unlock(&ie6xx_wdt_data.unlock_sequence);
92 return 0;
95 static int ie6xx_wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
97 u32 preload;
98 u64 clock;
99 u8 wdtcr;
101 /* Watchdog clock is PCI Clock (33MHz) */
102 clock = 33000000;
103 /* and the preload value is loaded into [34:15] of the down counter */
104 preload = (t * clock) >> 15;
106 * Manual states preload must be one less.
107 * Does not wrap as t is at least 1
109 preload -= 1;
111 spin_lock(&ie6xx_wdt_data.unlock_sequence);
113 /* Set ResetMode & Enable prescaler for range 10ms to 10 min */
114 wdtcr = resetmode & 0x38;
115 outb(wdtcr, ie6xx_wdt_data.sch_wdtba + WDTCR);
117 ie6xx_wdt_unlock_registers();
118 outl(0, ie6xx_wdt_data.sch_wdtba + PV1);
120 ie6xx_wdt_unlock_registers();
121 outl(preload, ie6xx_wdt_data.sch_wdtba + PV2);
123 ie6xx_wdt_unlock_registers();
124 outb(WDT_RELOAD | WDT_TOUT, ie6xx_wdt_data.sch_wdtba + RR1);
126 spin_unlock(&ie6xx_wdt_data.unlock_sequence);
128 wdd->timeout = t;
129 return 0;
132 static int ie6xx_wdt_start(struct watchdog_device *wdd)
134 ie6xx_wdt_set_timeout(wdd, wdd->timeout);
136 /* Enable the watchdog timer */
137 spin_lock(&ie6xx_wdt_data.unlock_sequence);
138 outb(WDT_ENABLE, ie6xx_wdt_data.sch_wdtba + WDTLR);
139 spin_unlock(&ie6xx_wdt_data.unlock_sequence);
141 return 0;
144 static int ie6xx_wdt_stop(struct watchdog_device *wdd)
146 if (inb(ie6xx_wdt_data.sch_wdtba + WDTLR) & WDT_LOCK)
147 return -1;
149 /* Disable the watchdog timer */
150 spin_lock(&ie6xx_wdt_data.unlock_sequence);
151 outb(0, ie6xx_wdt_data.sch_wdtba + WDTLR);
152 spin_unlock(&ie6xx_wdt_data.unlock_sequence);
154 return 0;
157 static const struct watchdog_info ie6xx_wdt_info = {
158 .identity = "Intel Atom E6xx Watchdog",
159 .options = WDIOF_SETTIMEOUT |
160 WDIOF_MAGICCLOSE |
161 WDIOF_KEEPALIVEPING,
164 static const struct watchdog_ops ie6xx_wdt_ops = {
165 .owner = THIS_MODULE,
166 .start = ie6xx_wdt_start,
167 .stop = ie6xx_wdt_stop,
168 .ping = ie6xx_wdt_ping,
169 .set_timeout = ie6xx_wdt_set_timeout,
172 static struct watchdog_device ie6xx_wdt_dev = {
173 .info = &ie6xx_wdt_info,
174 .ops = &ie6xx_wdt_ops,
175 .min_timeout = MIN_TIME,
176 .max_timeout = MAX_TIME,
179 #ifdef CONFIG_DEBUG_FS
181 static int ie6xx_wdt_show(struct seq_file *s, void *unused)
183 seq_printf(s, "PV1 = 0x%08x\n",
184 inl(ie6xx_wdt_data.sch_wdtba + PV1));
185 seq_printf(s, "PV2 = 0x%08x\n",
186 inl(ie6xx_wdt_data.sch_wdtba + PV2));
187 seq_printf(s, "RR = 0x%08x\n",
188 inw(ie6xx_wdt_data.sch_wdtba + RR0));
189 seq_printf(s, "WDTCR = 0x%08x\n",
190 inw(ie6xx_wdt_data.sch_wdtba + WDTCR));
191 seq_printf(s, "DCR = 0x%08x\n",
192 inl(ie6xx_wdt_data.sch_wdtba + DCR));
193 seq_printf(s, "WDTLR = 0x%08x\n",
194 inw(ie6xx_wdt_data.sch_wdtba + WDTLR));
196 seq_printf(s, "\n");
197 return 0;
200 DEFINE_SHOW_ATTRIBUTE(ie6xx_wdt);
202 static void ie6xx_wdt_debugfs_init(void)
204 /* /sys/kernel/debug/ie6xx_wdt */
205 ie6xx_wdt_data.debugfs = debugfs_create_file("ie6xx_wdt",
206 S_IFREG | S_IRUGO, NULL, NULL, &ie6xx_wdt_fops);
209 static void ie6xx_wdt_debugfs_exit(void)
211 debugfs_remove(ie6xx_wdt_data.debugfs);
214 #else
215 static void ie6xx_wdt_debugfs_init(void)
219 static void ie6xx_wdt_debugfs_exit(void)
222 #endif
224 static int ie6xx_wdt_probe(struct platform_device *pdev)
226 struct resource *res;
227 u8 wdtlr;
228 int ret;
230 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
231 if (!res)
232 return -ENODEV;
234 if (!request_region(res->start, resource_size(res), pdev->name)) {
235 dev_err(&pdev->dev, "Watchdog region 0x%llx already in use!\n",
236 (u64)res->start);
237 return -EBUSY;
240 ie6xx_wdt_data.sch_wdtba = res->start;
241 dev_dbg(&pdev->dev, "WDT = 0x%X\n", ie6xx_wdt_data.sch_wdtba);
243 ie6xx_wdt_dev.timeout = timeout;
244 watchdog_set_nowayout(&ie6xx_wdt_dev, nowayout);
245 ie6xx_wdt_dev.parent = &pdev->dev;
247 spin_lock_init(&ie6xx_wdt_data.unlock_sequence);
249 wdtlr = inb(ie6xx_wdt_data.sch_wdtba + WDTLR);
250 if (wdtlr & WDT_LOCK)
251 dev_warn(&pdev->dev,
252 "Watchdog Timer is Locked (Reg=0x%x)\n", wdtlr);
254 ie6xx_wdt_debugfs_init();
256 ret = watchdog_register_device(&ie6xx_wdt_dev);
257 if (ret)
258 goto misc_register_error;
260 return 0;
262 misc_register_error:
263 ie6xx_wdt_debugfs_exit();
264 release_region(res->start, resource_size(res));
265 ie6xx_wdt_data.sch_wdtba = 0;
266 return ret;
269 static int ie6xx_wdt_remove(struct platform_device *pdev)
271 struct resource *res;
273 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
274 ie6xx_wdt_stop(NULL);
275 watchdog_unregister_device(&ie6xx_wdt_dev);
276 ie6xx_wdt_debugfs_exit();
277 release_region(res->start, resource_size(res));
278 ie6xx_wdt_data.sch_wdtba = 0;
280 return 0;
283 static struct platform_driver ie6xx_wdt_driver = {
284 .probe = ie6xx_wdt_probe,
285 .remove = ie6xx_wdt_remove,
286 .driver = {
287 .name = DRIVER_NAME,
291 static int __init ie6xx_wdt_init(void)
293 /* Check boot parameters to verify that their initial values */
294 /* are in range. */
295 if ((timeout < MIN_TIME) ||
296 (timeout > MAX_TIME)) {
297 pr_err("Watchdog timer: value of timeout %d (dec) "
298 "is out of range from %d to %d (dec)\n",
299 timeout, MIN_TIME, MAX_TIME);
300 return -EINVAL;
303 return platform_driver_register(&ie6xx_wdt_driver);
306 static void __exit ie6xx_wdt_exit(void)
308 platform_driver_unregister(&ie6xx_wdt_driver);
311 late_initcall(ie6xx_wdt_init);
312 module_exit(ie6xx_wdt_exit);
314 MODULE_AUTHOR("Alexander Stein <alexander.stein@systec-electronic.com>");
315 MODULE_DESCRIPTION("Intel Atom E6xx Watchdog Device Driver");
316 MODULE_LICENSE("GPL");
317 MODULE_ALIAS("platform:" DRIVER_NAME);