1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __DT_BINDINGS_CLOCK_EFM32_CMU_H
3 #define __DT_BINDINGS_CLOCK_EFM32_CMU_H
10 #define clk_AUXHFRCO 5
11 #define clk_HFCLKNODIV 6
13 #define clk_HFPERCLK 8
14 #define clk_HFCORECLK 9
17 #define clk_WDOGCLK 12
18 #define clk_HFCORECLKDMA 13
19 #define clk_HFCORECLKAES 14
20 #define clk_HFCORECLKUSBC 15
21 #define clk_HFCORECLKUSB 16
22 #define clk_HFCORECLKLE 17
23 #define clk_HFCORECLKEBI 18
24 #define clk_HFPERCLKUSART0 19
25 #define clk_HFPERCLKUSART1 20
26 #define clk_HFPERCLKUSART2 21
27 #define clk_HFPERCLKUART0 22
28 #define clk_HFPERCLKUART1 23
29 #define clk_HFPERCLKTIMER0 24
30 #define clk_HFPERCLKTIMER1 25
31 #define clk_HFPERCLKTIMER2 26
32 #define clk_HFPERCLKTIMER3 27
33 #define clk_HFPERCLKACMP0 28
34 #define clk_HFPERCLKACMP1 29
35 #define clk_HFPERCLKI2C0 30
36 #define clk_HFPERCLKI2C1 31
37 #define clk_HFPERCLKGPIO 32
38 #define clk_HFPERCLKVCMP 33
39 #define clk_HFPERCLKPRS 34
40 #define clk_HFPERCLKADC0 35
41 #define clk_HFPERCLKDAC0 36
43 #endif /* __DT_BINDINGS_CLOCK_EFM32_CMU_H */