WIP FPC-III support
[linux/fpc-iii.git] / include / soc / mscc / ocelot_ptp.h
blob6a7388fa7cc5283bfcf4d2590a31175b10c38789
1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2 /*
3 * Microsemi Ocelot Switch driver
5 * License: Dual MIT/GPL
6 * Copyright (c) 2017 Microsemi Corporation
7 * Copyright 2020 NXP
8 */
10 #ifndef _MSCC_OCELOT_PTP_H_
11 #define _MSCC_OCELOT_PTP_H_
13 #include <linux/ptp_clock_kernel.h>
14 #include <soc/mscc/ocelot.h>
16 #define PTP_PIN_CFG_RSZ 0x20
17 #define PTP_PIN_TOD_SEC_MSB_RSZ PTP_PIN_CFG_RSZ
18 #define PTP_PIN_TOD_SEC_LSB_RSZ PTP_PIN_CFG_RSZ
19 #define PTP_PIN_TOD_NSEC_RSZ PTP_PIN_CFG_RSZ
20 #define PTP_PIN_WF_HIGH_PERIOD_RSZ PTP_PIN_CFG_RSZ
21 #define PTP_PIN_WF_LOW_PERIOD_RSZ PTP_PIN_CFG_RSZ
23 #define PTP_PIN_CFG_DOM BIT(0)
24 #define PTP_PIN_CFG_SYNC BIT(2)
25 #define PTP_PIN_CFG_ACTION(x) ((x) << 3)
26 #define PTP_PIN_CFG_ACTION_MASK PTP_PIN_CFG_ACTION(0x7)
28 enum {
29 PTP_PIN_ACTION_IDLE = 0,
30 PTP_PIN_ACTION_LOAD,
31 PTP_PIN_ACTION_SAVE,
32 PTP_PIN_ACTION_CLOCK,
33 PTP_PIN_ACTION_DELTA,
34 PTP_PIN_ACTION_NOSYNC,
35 PTP_PIN_ACTION_SYNC,
38 #define PTP_CFG_MISC_PTP_EN BIT(2)
40 #define PSEC_PER_SEC 1000000000000LL
42 #define PTP_CFG_CLK_ADJ_CFG_ENA BIT(0)
43 #define PTP_CFG_CLK_ADJ_CFG_DIR BIT(1)
45 #define PTP_CFG_CLK_ADJ_FREQ_NS BIT(30)
47 int ocelot_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts);
48 int ocelot_ptp_settime64(struct ptp_clock_info *ptp,
49 const struct timespec64 *ts);
50 int ocelot_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta);
51 int ocelot_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm);
52 int ocelot_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
53 enum ptp_pin_function func, unsigned int chan);
54 int ocelot_ptp_enable(struct ptp_clock_info *ptp,
55 struct ptp_clock_request *rq, int on);
56 int ocelot_init_timestamp(struct ocelot *ocelot,
57 const struct ptp_clock_info *info);
58 int ocelot_deinit_timestamp(struct ocelot *ocelot);
59 #endif