WIP FPC-III support
[linux/fpc-iii.git] / include / uapi / rdma / hns-abi.h
blob90b739d05adfe7e4125223e404098cf83093aa5d
1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
2 /*
3 * Copyright (c) 2016 Hisilicon Limited.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
34 #ifndef HNS_ABI_USER_H
35 #define HNS_ABI_USER_H
37 #include <linux/types.h>
39 struct hns_roce_ib_create_cq {
40 __aligned_u64 buf_addr;
41 __aligned_u64 db_addr;
42 __u32 cqe_size;
43 __u32 reserved;
46 enum hns_roce_cq_cap_flags {
47 HNS_ROCE_CQ_FLAG_RECORD_DB = 1 << 0,
50 struct hns_roce_ib_create_cq_resp {
51 __aligned_u64 cqn; /* Only 32 bits used, 64 for compat */
52 __aligned_u64 cap_flags;
55 struct hns_roce_ib_create_srq {
56 __aligned_u64 buf_addr;
57 __aligned_u64 db_addr;
58 __aligned_u64 que_addr;
61 struct hns_roce_ib_create_srq_resp {
62 __u32 srqn;
63 __u32 reserved;
66 struct hns_roce_ib_create_qp {
67 __aligned_u64 buf_addr;
68 __aligned_u64 db_addr;
69 __u8 log_sq_bb_count;
70 __u8 log_sq_stride;
71 __u8 sq_no_prefetch;
72 __u8 reserved[5];
73 __aligned_u64 sdb_addr;
76 enum hns_roce_qp_cap_flags {
77 HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
78 HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1,
79 HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2,
82 struct hns_roce_ib_create_qp_resp {
83 __aligned_u64 cap_flags;
86 struct hns_roce_ib_alloc_ucontext_resp {
87 __u32 qp_tab_size;
88 __u32 cqe_size;
91 struct hns_roce_ib_alloc_pd_resp {
92 __u32 pdn;
95 #endif /* HNS_ABI_USER_H */