1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * max98390.c -- MAX98390 ALSA Soc Audio driver
5 * Copyright (C) 2020 Maxim Integrated Products
9 #include <linux/acpi.h>
10 #include <linux/cdev.h>
11 #include <linux/dmi.h>
12 #include <linux/firmware.h>
13 #include <linux/gpio.h>
14 #include <linux/i2c.h>
15 #include <linux/module.h>
16 #include <linux/of_gpio.h>
17 #include <linux/regmap.h>
18 #include <linux/slab.h>
19 #include <linux/time.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/tlv.h>
27 static struct reg_default max98390_reg_defaults
[] = {
28 {MAX98390_INT_EN1
, 0xf0},
29 {MAX98390_INT_EN2
, 0x00},
30 {MAX98390_INT_EN3
, 0x00},
31 {MAX98390_INT_FLAG_CLR1
, 0x00},
32 {MAX98390_INT_FLAG_CLR2
, 0x00},
33 {MAX98390_INT_FLAG_CLR3
, 0x00},
34 {MAX98390_IRQ_CTRL
, 0x01},
35 {MAX98390_CLK_MON
, 0x6d},
36 {MAX98390_DAT_MON
, 0x03},
37 {MAX98390_WDOG_CTRL
, 0x00},
38 {MAX98390_WDOG_RST
, 0x00},
39 {MAX98390_MEAS_ADC_THERM_WARN_THRESH
, 0x75},
40 {MAX98390_MEAS_ADC_THERM_SHDN_THRESH
, 0x8c},
41 {MAX98390_MEAS_ADC_THERM_HYSTERESIS
, 0x08},
42 {MAX98390_PIN_CFG
, 0x55},
43 {MAX98390_PCM_RX_EN_A
, 0x00},
44 {MAX98390_PCM_RX_EN_B
, 0x00},
45 {MAX98390_PCM_TX_EN_A
, 0x00},
46 {MAX98390_PCM_TX_EN_B
, 0x00},
47 {MAX98390_PCM_TX_HIZ_CTRL_A
, 0xff},
48 {MAX98390_PCM_TX_HIZ_CTRL_B
, 0xff},
49 {MAX98390_PCM_CH_SRC_1
, 0x00},
50 {MAX98390_PCM_CH_SRC_2
, 0x00},
51 {MAX98390_PCM_CH_SRC_3
, 0x00},
52 {MAX98390_PCM_MODE_CFG
, 0xc0},
53 {MAX98390_PCM_MASTER_MODE
, 0x1c},
54 {MAX98390_PCM_CLK_SETUP
, 0x44},
55 {MAX98390_PCM_SR_SETUP
, 0x08},
56 {MAX98390_ICC_RX_EN_A
, 0x00},
57 {MAX98390_ICC_RX_EN_B
, 0x00},
58 {MAX98390_ICC_TX_EN_A
, 0x00},
59 {MAX98390_ICC_TX_EN_B
, 0x00},
60 {MAX98390_ICC_HIZ_MANUAL_MODE
, 0x00},
61 {MAX98390_ICC_TX_HIZ_EN_A
, 0x00},
62 {MAX98390_ICC_TX_HIZ_EN_B
, 0x00},
63 {MAX98390_ICC_LNK_EN
, 0x00},
64 {MAX98390_R2039_AMP_DSP_CFG
, 0x0f},
65 {MAX98390_R203A_AMP_EN
, 0x81},
66 {MAX98390_TONE_GEN_DC_CFG
, 0x00},
67 {MAX98390_SPK_SRC_SEL
, 0x00},
68 {MAX98390_SSM_CFG
, 0x85},
69 {MAX98390_MEAS_EN
, 0x03},
70 {MAX98390_MEAS_DSP_CFG
, 0x0f},
71 {MAX98390_BOOST_CTRL0
, 0x1c},
72 {MAX98390_BOOST_CTRL3
, 0x01},
73 {MAX98390_BOOST_CTRL1
, 0x40},
74 {MAX98390_MEAS_ADC_CFG
, 0x07},
75 {MAX98390_MEAS_ADC_BASE_MSB
, 0x00},
76 {MAX98390_MEAS_ADC_BASE_LSB
, 0x23},
77 {MAX98390_ADC_CH0_DIVIDE
, 0x00},
78 {MAX98390_ADC_CH1_DIVIDE
, 0x00},
79 {MAX98390_ADC_CH2_DIVIDE
, 0x00},
80 {MAX98390_ADC_CH0_FILT_CFG
, 0x00},
81 {MAX98390_ADC_CH1_FILT_CFG
, 0x00},
82 {MAX98390_ADC_CH2_FILT_CFG
, 0x00},
83 {MAX98390_PWR_GATE_CTL
, 0x2c},
84 {MAX98390_BROWNOUT_EN
, 0x00},
85 {MAX98390_BROWNOUT_INFINITE_HOLD
, 0x00},
86 {MAX98390_BROWNOUT_INFINITE_HOLD_CLR
, 0x00},
87 {MAX98390_BROWNOUT_LVL_HOLD
, 0x00},
88 {MAX98390_BROWNOUT_LVL1_THRESH
, 0x00},
89 {MAX98390_BROWNOUT_LVL2_THRESH
, 0x00},
90 {MAX98390_BROWNOUT_LVL3_THRESH
, 0x00},
91 {MAX98390_BROWNOUT_LVL4_THRESH
, 0x00},
92 {MAX98390_BROWNOUT_THRESH_HYSTERYSIS
, 0x00},
93 {MAX98390_BROWNOUT_AMP_LIMITER_ATK_REL
, 0x1f},
94 {MAX98390_BROWNOUT_AMP_GAIN_ATK_REL
, 0x00},
95 {MAX98390_BROWNOUT_AMP1_CLIP_MODE
, 0x00},
96 {MAX98390_BROWNOUT_LVL1_CUR_LIMIT
, 0x00},
97 {MAX98390_BROWNOUT_LVL1_AMP1_CTRL1
, 0x00},
98 {MAX98390_BROWNOUT_LVL1_AMP1_CTRL2
, 0x00},
99 {MAX98390_BROWNOUT_LVL1_AMP1_CTRL3
, 0x00},
100 {MAX98390_BROWNOUT_LVL2_CUR_LIMIT
, 0x00},
101 {MAX98390_BROWNOUT_LVL2_AMP1_CTRL1
, 0x00},
102 {MAX98390_BROWNOUT_LVL2_AMP1_CTRL2
, 0x00},
103 {MAX98390_BROWNOUT_LVL2_AMP1_CTRL3
, 0x00},
104 {MAX98390_BROWNOUT_LVL3_CUR_LIMIT
, 0x00},
105 {MAX98390_BROWNOUT_LVL3_AMP1_CTRL1
, 0x00},
106 {MAX98390_BROWNOUT_LVL3_AMP1_CTRL2
, 0x00},
107 {MAX98390_BROWNOUT_LVL3_AMP1_CTRL3
, 0x00},
108 {MAX98390_BROWNOUT_LVL4_CUR_LIMIT
, 0x00},
109 {MAX98390_BROWNOUT_LVL4_AMP1_CTRL1
, 0x00},
110 {MAX98390_BROWNOUT_LVL4_AMP1_CTRL2
, 0x00},
111 {MAX98390_BROWNOUT_LVL4_AMP1_CTRL3
, 0x00},
112 {MAX98390_BROWNOUT_ILIM_HLD
, 0x00},
113 {MAX98390_BROWNOUT_LIM_HLD
, 0x00},
114 {MAX98390_BROWNOUT_CLIP_HLD
, 0x00},
115 {MAX98390_BROWNOUT_GAIN_HLD
, 0x00},
116 {MAX98390_ENV_TRACK_VOUT_HEADROOM
, 0x0f},
117 {MAX98390_ENV_TRACK_BOOST_VOUT_DELAY
, 0x80},
118 {MAX98390_ENV_TRACK_REL_RATE
, 0x07},
119 {MAX98390_ENV_TRACK_HOLD_RATE
, 0x07},
120 {MAX98390_ENV_TRACK_CTRL
, 0x01},
121 {MAX98390_BOOST_BYPASS1
, 0x49},
122 {MAX98390_BOOST_BYPASS2
, 0x2b},
123 {MAX98390_BOOST_BYPASS3
, 0x08},
124 {MAX98390_FET_SCALING1
, 0x00},
125 {MAX98390_FET_SCALING2
, 0x03},
126 {MAX98390_FET_SCALING3
, 0x00},
127 {MAX98390_FET_SCALING4
, 0x07},
128 {MAX98390_SPK_SPEEDUP
, 0x00},
129 {DSMIG_WB_DRC_RELEASE_TIME_1
, 0x00},
130 {DSMIG_WB_DRC_RELEASE_TIME_2
, 0x00},
131 {DSMIG_WB_DRC_ATTACK_TIME_1
, 0x00},
132 {DSMIG_WB_DRC_ATTACK_TIME_2
, 0x00},
133 {DSMIG_WB_DRC_COMPRESSION_RATIO
, 0x00},
134 {DSMIG_WB_DRC_COMPRESSION_THRESHOLD
, 0x00},
135 {DSMIG_WB_DRC_MAKEUPGAIN
, 0x00},
136 {DSMIG_WB_DRC_NOISE_GATE_THRESHOLD
, 0x00},
137 {DSMIG_WBDRC_HPF_ENABLE
, 0x00},
138 {DSMIG_WB_DRC_TEST_SMOOTHER_OUT_EN
, 0x00},
139 {DSMIG_PPR_THRESHOLD
, 0x00},
140 {DSM_STEREO_BASS_CHANNEL_SELECT
, 0x00},
141 {DSM_TPROT_THRESHOLD_BYTE0
, 0x00},
142 {DSM_TPROT_THRESHOLD_BYTE1
, 0x00},
143 {DSM_TPROT_ROOM_TEMPERATURE_BYTE0
, 0x00},
144 {DSM_TPROT_ROOM_TEMPERATURE_BYTE1
, 0x00},
145 {DSM_TPROT_RECIP_RDC_ROOM_BYTE0
, 0x00},
146 {DSM_TPROT_RECIP_RDC_ROOM_BYTE1
, 0x00},
147 {DSM_TPROT_RECIP_RDC_ROOM_BYTE2
, 0x00},
148 {DSM_TPROT_RECIP_TCONST_BYTE0
, 0x00},
149 {DSM_TPROT_RECIP_TCONST_BYTE1
, 0x00},
150 {DSM_TPROT_RECIP_TCONST_BYTE2
, 0x00},
151 {DSM_THERMAL_ATTENUATION_SETTINGS
, 0x00},
152 {DSM_THERMAL_PILOT_TONE_ATTENUATION
, 0x00},
153 {DSM_TPROT_PG_TEMP_THRESH_BYTE0
, 0x00},
154 {DSM_TPROT_PG_TEMP_THRESH_BYTE1
, 0x00},
155 {DSMIG_DEBUZZER_THRESHOLD
, 0x00},
156 {DSMIG_DEBUZZER_ALPHA_COEF_TEST_ONLY
, 0x08},
158 {DSM_VOL_CTRL
, 0xa0},
160 {MAX98390_R23E1_DSP_GLOBAL_EN
, 0x00},
161 {MAX98390_R23FF_GLOBAL_EN
, 0x00},
164 static int max98390_dsm_calibrate(struct snd_soc_component
*component
);
166 static int max98390_dai_set_fmt(struct snd_soc_dai
*codec_dai
, unsigned int fmt
)
168 struct snd_soc_component
*component
= codec_dai
->component
;
169 struct max98390_priv
*max98390
=
170 snd_soc_component_get_drvdata(component
);
173 unsigned int invert
= 0;
175 dev_dbg(component
->dev
, "%s: fmt 0x%08X\n", __func__
, fmt
);
177 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
178 case SND_SOC_DAIFMT_CBS_CFS
:
179 mode
= MAX98390_PCM_MASTER_MODE_SLAVE
;
181 case SND_SOC_DAIFMT_CBM_CFM
:
182 max98390
->master
= true;
183 mode
= MAX98390_PCM_MASTER_MODE_MASTER
;
186 dev_err(component
->dev
, "DAI clock mode unsupported\n");
190 regmap_update_bits(max98390
->regmap
,
191 MAX98390_PCM_MASTER_MODE
,
192 MAX98390_PCM_MASTER_MODE_MASK
,
195 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
196 case SND_SOC_DAIFMT_NB_NF
:
198 case SND_SOC_DAIFMT_IB_NF
:
199 invert
= MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE
;
202 dev_err(component
->dev
, "DAI invert mode unsupported\n");
206 regmap_update_bits(max98390
->regmap
,
207 MAX98390_PCM_MODE_CFG
,
208 MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE
,
211 /* interface format */
212 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
213 case SND_SOC_DAIFMT_I2S
:
214 format
= MAX98390_PCM_FORMAT_I2S
;
216 case SND_SOC_DAIFMT_LEFT_J
:
217 format
= MAX98390_PCM_FORMAT_LJ
;
219 case SND_SOC_DAIFMT_DSP_A
:
220 format
= MAX98390_PCM_FORMAT_TDM_MODE1
;
222 case SND_SOC_DAIFMT_DSP_B
:
223 format
= MAX98390_PCM_FORMAT_TDM_MODE0
;
229 regmap_update_bits(max98390
->regmap
,
230 MAX98390_PCM_MODE_CFG
,
231 MAX98390_PCM_MODE_CFG_FORMAT_MASK
,
232 format
<< MAX98390_PCM_MODE_CFG_FORMAT_SHIFT
);
237 static int max98390_get_bclk_sel(int bclk
)
240 /* BCLKs per LRCLK */
241 static int bclk_sel_table
[] = {
242 32, 48, 64, 96, 128, 192, 256, 320, 384, 512,
244 /* match BCLKs per LRCLK */
245 for (i
= 0; i
< ARRAY_SIZE(bclk_sel_table
); i
++) {
246 if (bclk_sel_table
[i
] == bclk
)
252 static int max98390_set_clock(struct snd_soc_component
*component
,
253 struct snd_pcm_hw_params
*params
)
255 struct max98390_priv
*max98390
=
256 snd_soc_component_get_drvdata(component
);
257 /* codec MCLK rate in master mode */
258 static int rate_table
[] = {
259 5644800, 6000000, 6144000, 6500000,
260 9600000, 11289600, 12000000, 12288000,
263 /* BCLK/LRCLK ratio calculation */
264 int blr_clk_ratio
= params_channels(params
)
265 * snd_pcm_format_width(params_format(params
));
268 if (max98390
->master
) {
270 /* match rate to closest value */
271 for (i
= 0; i
< ARRAY_SIZE(rate_table
); i
++) {
272 if (rate_table
[i
] >= max98390
->sysclk
)
275 if (i
== ARRAY_SIZE(rate_table
)) {
276 dev_err(component
->dev
, "failed to find proper clock rate.\n");
280 regmap_update_bits(max98390
->regmap
,
281 MAX98390_PCM_MASTER_MODE
,
282 MAX98390_PCM_MASTER_MODE_MCLK_MASK
,
283 i
<< MAX98390_PCM_MASTER_MODE_MCLK_RATE_SHIFT
);
286 if (!max98390
->tdm_mode
) {
287 /* BCLK configuration */
288 value
= max98390_get_bclk_sel(blr_clk_ratio
);
290 dev_err(component
->dev
, "format unsupported %d\n",
291 params_format(params
));
295 regmap_update_bits(max98390
->regmap
,
296 MAX98390_PCM_CLK_SETUP
,
297 MAX98390_PCM_CLK_SETUP_BSEL_MASK
,
303 static int max98390_dai_hw_params(struct snd_pcm_substream
*substream
,
304 struct snd_pcm_hw_params
*params
,
305 struct snd_soc_dai
*dai
)
307 struct snd_soc_component
*component
=
309 struct max98390_priv
*max98390
=
310 snd_soc_component_get_drvdata(component
);
312 unsigned int sampling_rate
;
313 unsigned int chan_sz
;
315 /* pcm mode configuration */
316 switch (snd_pcm_format_width(params_format(params
))) {
318 chan_sz
= MAX98390_PCM_MODE_CFG_CHANSZ_16
;
321 chan_sz
= MAX98390_PCM_MODE_CFG_CHANSZ_24
;
324 chan_sz
= MAX98390_PCM_MODE_CFG_CHANSZ_32
;
327 dev_err(component
->dev
, "format unsupported %d\n",
328 params_format(params
));
332 regmap_update_bits(max98390
->regmap
,
333 MAX98390_PCM_MODE_CFG
,
334 MAX98390_PCM_MODE_CFG_CHANSZ_MASK
, chan_sz
);
336 dev_dbg(component
->dev
, "format supported %d",
337 params_format(params
));
339 /* sampling rate configuration */
340 switch (params_rate(params
)) {
342 sampling_rate
= MAX98390_PCM_SR_SET1_SR_8000
;
345 sampling_rate
= MAX98390_PCM_SR_SET1_SR_11025
;
348 sampling_rate
= MAX98390_PCM_SR_SET1_SR_12000
;
351 sampling_rate
= MAX98390_PCM_SR_SET1_SR_16000
;
354 sampling_rate
= MAX98390_PCM_SR_SET1_SR_22050
;
357 sampling_rate
= MAX98390_PCM_SR_SET1_SR_24000
;
360 sampling_rate
= MAX98390_PCM_SR_SET1_SR_32000
;
363 sampling_rate
= MAX98390_PCM_SR_SET1_SR_44100
;
366 sampling_rate
= MAX98390_PCM_SR_SET1_SR_48000
;
369 dev_err(component
->dev
, "rate %d not supported\n",
370 params_rate(params
));
374 /* set DAI_SR to correct LRCLK frequency */
375 regmap_update_bits(max98390
->regmap
,
376 MAX98390_PCM_SR_SETUP
,
377 MAX98390_PCM_SR_SET1_SR_MASK
,
380 return max98390_set_clock(component
, params
);
385 static int max98390_dai_tdm_slot(struct snd_soc_dai
*dai
,
386 unsigned int tx_mask
, unsigned int rx_mask
,
387 int slots
, int slot_width
)
389 struct snd_soc_component
*component
= dai
->component
;
390 struct max98390_priv
*max98390
=
391 snd_soc_component_get_drvdata(component
);
394 unsigned int chan_sz
;
396 if (!tx_mask
&& !rx_mask
&& !slots
&& !slot_width
)
397 max98390
->tdm_mode
= false;
399 max98390
->tdm_mode
= true;
401 dev_dbg(component
->dev
,
402 "Tdm mode : %d\n", max98390
->tdm_mode
);
404 /* BCLK configuration */
405 bsel
= max98390_get_bclk_sel(slots
* slot_width
);
407 dev_err(component
->dev
, "BCLK %d not supported\n",
412 regmap_update_bits(max98390
->regmap
,
413 MAX98390_PCM_CLK_SETUP
,
414 MAX98390_PCM_CLK_SETUP_BSEL_MASK
,
417 /* Channel size configuration */
418 switch (slot_width
) {
420 chan_sz
= MAX98390_PCM_MODE_CFG_CHANSZ_16
;
423 chan_sz
= MAX98390_PCM_MODE_CFG_CHANSZ_24
;
426 chan_sz
= MAX98390_PCM_MODE_CFG_CHANSZ_32
;
429 dev_err(component
->dev
, "format unsupported %d\n",
434 regmap_update_bits(max98390
->regmap
,
435 MAX98390_PCM_MODE_CFG
,
436 MAX98390_PCM_MODE_CFG_CHANSZ_MASK
, chan_sz
);
438 /* Rx slot configuration */
439 regmap_write(max98390
->regmap
,
440 MAX98390_PCM_RX_EN_A
,
442 regmap_write(max98390
->regmap
,
443 MAX98390_PCM_RX_EN_B
,
444 (rx_mask
& 0xFF00) >> 8);
446 /* Tx slot Hi-Z configuration */
447 regmap_write(max98390
->regmap
,
448 MAX98390_PCM_TX_HIZ_CTRL_A
,
450 regmap_write(max98390
->regmap
,
451 MAX98390_PCM_TX_HIZ_CTRL_B
,
452 (~tx_mask
& 0xFF00) >> 8);
457 static int max98390_dai_set_sysclk(struct snd_soc_dai
*dai
,
458 int clk_id
, unsigned int freq
, int dir
)
460 struct snd_soc_component
*component
= dai
->component
;
461 struct max98390_priv
*max98390
=
462 snd_soc_component_get_drvdata(component
);
464 max98390
->sysclk
= freq
;
468 static const struct snd_soc_dai_ops max98390_dai_ops
= {
469 .set_sysclk
= max98390_dai_set_sysclk
,
470 .set_fmt
= max98390_dai_set_fmt
,
471 .hw_params
= max98390_dai_hw_params
,
472 .set_tdm_slot
= max98390_dai_tdm_slot
,
475 static int max98390_dac_event(struct snd_soc_dapm_widget
*w
,
476 struct snd_kcontrol
*kcontrol
, int event
)
478 struct snd_soc_component
*component
=
479 snd_soc_dapm_to_component(w
->dapm
);
480 struct max98390_priv
*max98390
=
481 snd_soc_component_get_drvdata(component
);
484 case SND_SOC_DAPM_POST_PMU
:
485 regmap_update_bits(max98390
->regmap
,
486 MAX98390_R203A_AMP_EN
,
487 MAX98390_AMP_EN_MASK
, 1);
488 regmap_update_bits(max98390
->regmap
,
489 MAX98390_R23FF_GLOBAL_EN
,
490 MAX98390_GLOBAL_EN_MASK
, 1);
492 case SND_SOC_DAPM_POST_PMD
:
493 regmap_update_bits(max98390
->regmap
,
494 MAX98390_R23FF_GLOBAL_EN
,
495 MAX98390_GLOBAL_EN_MASK
, 0);
496 regmap_update_bits(max98390
->regmap
,
497 MAX98390_R203A_AMP_EN
,
498 MAX98390_AMP_EN_MASK
, 0);
504 static const char * const max98390_switch_text
[] = {
505 "Left", "Right", "LeftRight"};
507 static const char * const max98390_boost_voltage_text
[] = {
508 "6.5V", "6.625V", "6.75V", "6.875V", "7V", "7.125V", "7.25V", "7.375V",
509 "7.5V", "7.625V", "7.75V", "7.875V", "8V", "8.125V", "8.25V", "8.375V",
510 "8.5V", "8.625V", "8.75V", "8.875V", "9V", "9.125V", "9.25V", "9.375V",
511 "9.5V", "9.625V", "9.75V", "9.875V", "10V"
514 static SOC_ENUM_SINGLE_DECL(max98390_boost_voltage
,
515 MAX98390_BOOST_CTRL0
, 0,
516 max98390_boost_voltage_text
);
518 static DECLARE_TLV_DB_SCALE(max98390_spk_tlv
, 300, 300, 0);
519 static DECLARE_TLV_DB_SCALE(max98390_digital_tlv
, -8000, 50, 0);
521 static const char * const max98390_current_limit_text
[] = {
522 "0.00A", "0.50A", "1.00A", "1.05A", "1.10A", "1.15A", "1.20A", "1.25A",
523 "1.30A", "1.35A", "1.40A", "1.45A", "1.50A", "1.55A", "1.60A", "1.65A",
524 "1.70A", "1.75A", "1.80A", "1.85A", "1.90A", "1.95A", "2.00A", "2.05A",
525 "2.10A", "2.15A", "2.20A", "2.25A", "2.30A", "2.35A", "2.40A", "2.45A",
526 "2.50A", "2.55A", "2.60A", "2.65A", "2.70A", "2.75A", "2.80A", "2.85A",
527 "2.90A", "2.95A", "3.00A", "3.05A", "3.10A", "3.15A", "3.20A", "3.25A",
528 "3.30A", "3.35A", "3.40A", "3.45A", "3.50A", "3.55A", "3.60A", "3.65A",
529 "3.70A", "3.75A", "3.80A", "3.85A", "3.90A", "3.95A", "4.00A", "4.05A",
533 static SOC_ENUM_SINGLE_DECL(max98390_current_limit
,
534 MAX98390_BOOST_CTRL1
, 0,
535 max98390_current_limit_text
);
537 static int max98390_ref_rdc_put(struct snd_kcontrol
*kcontrol
,
538 struct snd_ctl_elem_value
*ucontrol
)
540 struct snd_soc_component
*component
=
541 snd_soc_kcontrol_component(kcontrol
);
542 struct max98390_priv
*max98390
=
543 snd_soc_component_get_drvdata(component
);
545 max98390
->ref_rdc_value
= ucontrol
->value
.integer
.value
[0];
547 regmap_write(max98390
->regmap
, DSM_TPROT_RECIP_RDC_ROOM_BYTE0
,
548 max98390
->ref_rdc_value
& 0x000000ff);
549 regmap_write(max98390
->regmap
, DSM_TPROT_RECIP_RDC_ROOM_BYTE1
,
550 (max98390
->ref_rdc_value
>> 8) & 0x000000ff);
551 regmap_write(max98390
->regmap
, DSM_TPROT_RECIP_RDC_ROOM_BYTE2
,
552 (max98390
->ref_rdc_value
>> 16) & 0x000000ff);
557 static int max98390_ref_rdc_get(struct snd_kcontrol
*kcontrol
,
558 struct snd_ctl_elem_value
*ucontrol
)
560 struct snd_soc_component
*component
=
561 snd_soc_kcontrol_component(kcontrol
);
562 struct max98390_priv
*max98390
=
563 snd_soc_component_get_drvdata(component
);
565 ucontrol
->value
.integer
.value
[0] = max98390
->ref_rdc_value
;
570 static int max98390_ambient_temp_put(struct snd_kcontrol
*kcontrol
,
571 struct snd_ctl_elem_value
*ucontrol
)
573 struct snd_soc_component
*component
=
574 snd_soc_kcontrol_component(kcontrol
);
575 struct max98390_priv
*max98390
=
576 snd_soc_component_get_drvdata(component
);
578 max98390
->ambient_temp_value
= ucontrol
->value
.integer
.value
[0];
580 regmap_write(max98390
->regmap
, DSM_TPROT_ROOM_TEMPERATURE_BYTE1
,
581 (max98390
->ambient_temp_value
>> 8) & 0x000000ff);
582 regmap_write(max98390
->regmap
, DSM_TPROT_ROOM_TEMPERATURE_BYTE0
,
583 (max98390
->ambient_temp_value
) & 0x000000ff);
588 static int max98390_ambient_temp_get(struct snd_kcontrol
*kcontrol
,
589 struct snd_ctl_elem_value
*ucontrol
)
591 struct snd_soc_component
*component
=
592 snd_soc_kcontrol_component(kcontrol
);
593 struct max98390_priv
*max98390
=
594 snd_soc_component_get_drvdata(component
);
596 ucontrol
->value
.integer
.value
[0] = max98390
->ambient_temp_value
;
601 static int max98390_adaptive_rdc_put(struct snd_kcontrol
*kcontrol
,
602 struct snd_ctl_elem_value
*ucontrol
)
604 struct snd_soc_component
*component
=
605 snd_soc_kcontrol_component(kcontrol
);
607 dev_warn(component
->dev
, "Put adaptive rdc not supported\n");
612 static int max98390_adaptive_rdc_get(struct snd_kcontrol
*kcontrol
,
613 struct snd_ctl_elem_value
*ucontrol
)
616 struct snd_soc_component
*component
=
617 snd_soc_kcontrol_component(kcontrol
);
618 struct max98390_priv
*max98390
=
619 snd_soc_component_get_drvdata(component
);
621 regmap_read(max98390
->regmap
, THERMAL_RDC_RD_BACK_BYTE1
, &rdc
);
622 regmap_read(max98390
->regmap
, THERMAL_RDC_RD_BACK_BYTE0
, &rdc0
);
623 ucontrol
->value
.integer
.value
[0] = rdc0
| rdc
<< 8;
628 static int max98390_dsm_calib_get(struct snd_kcontrol
*kcontrol
,
629 struct snd_ctl_elem_value
*ucontrol
)
635 static int max98390_dsm_calib_put(struct snd_kcontrol
*kcontrol
,
636 struct snd_ctl_elem_value
*ucontrol
)
638 struct snd_soc_component
*component
=
639 snd_soc_kcontrol_component(kcontrol
);
641 max98390_dsm_calibrate(component
);
646 static const struct snd_kcontrol_new max98390_snd_controls
[] = {
647 SOC_SINGLE_TLV("Digital Volume", DSM_VOL_CTRL
,
649 max98390_digital_tlv
),
650 SOC_SINGLE_TLV("Speaker Volume", MAX98390_R203D_SPK_GAIN
,
653 SOC_SINGLE("Ramp Up Bypass Switch", MAX98390_R2039_AMP_DSP_CFG
,
654 MAX98390_AMP_DSP_CFG_RMP_UP_SHIFT
, 1, 0),
655 SOC_SINGLE("Ramp Down Bypass Switch", MAX98390_R2039_AMP_DSP_CFG
,
656 MAX98390_AMP_DSP_CFG_RMP_DN_SHIFT
, 1, 0),
657 SOC_SINGLE("Boost Clock Phase", MAX98390_BOOST_CTRL3
,
658 MAX98390_BOOST_CLK_PHASE_CFG_SHIFT
, 3, 0),
659 SOC_ENUM("Boost Output Voltage", max98390_boost_voltage
),
660 SOC_ENUM("Current Limit", max98390_current_limit
),
661 SOC_SINGLE_EXT("DSM Rdc", SND_SOC_NOPM
, 0, 0xffffff, 0,
662 max98390_ref_rdc_get
, max98390_ref_rdc_put
),
663 SOC_SINGLE_EXT("DSM Ambient Temp", SND_SOC_NOPM
, 0, 0xffff, 0,
664 max98390_ambient_temp_get
, max98390_ambient_temp_put
),
665 SOC_SINGLE_EXT("DSM Adaptive Rdc", SND_SOC_NOPM
, 0, 0xffff, 0,
666 max98390_adaptive_rdc_get
, max98390_adaptive_rdc_put
),
667 SOC_SINGLE_EXT("DSM Calibration", SND_SOC_NOPM
, 0, 1, 0,
668 max98390_dsm_calib_get
, max98390_dsm_calib_put
),
671 static const struct soc_enum dai_sel_enum
=
672 SOC_ENUM_SINGLE(MAX98390_PCM_CH_SRC_1
,
673 MAX98390_PCM_RX_CH_SRC_SHIFT
,
674 3, max98390_switch_text
);
676 static const struct snd_kcontrol_new max98390_dai_controls
=
677 SOC_DAPM_ENUM("DAI Sel", dai_sel_enum
);
679 static const struct snd_soc_dapm_widget max98390_dapm_widgets
[] = {
680 SND_SOC_DAPM_DAC_E("Amp Enable", "HiFi Playback",
681 SND_SOC_NOPM
, 0, 0, max98390_dac_event
,
682 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
683 SND_SOC_DAPM_MUX("DAI Sel Mux", SND_SOC_NOPM
, 0, 0,
684 &max98390_dai_controls
),
685 SND_SOC_DAPM_OUTPUT("BE_OUT"),
688 static const struct snd_soc_dapm_route max98390_audio_map
[] = {
690 {"DAI Sel Mux", "Left", "Amp Enable"},
691 {"DAI Sel Mux", "Right", "Amp Enable"},
692 {"DAI Sel Mux", "LeftRight", "Amp Enable"},
693 {"BE_OUT", NULL
, "DAI Sel Mux"},
696 static bool max98390_readable_register(struct device
*dev
, unsigned int reg
)
699 case MAX98390_SOFTWARE_RESET
... MAX98390_INT_EN3
:
700 case MAX98390_IRQ_CTRL
... MAX98390_WDOG_CTRL
:
701 case MAX98390_MEAS_ADC_THERM_WARN_THRESH
702 ... MAX98390_BROWNOUT_INFINITE_HOLD
:
703 case MAX98390_BROWNOUT_LVL_HOLD
... DSMIG_DEBUZZER_THRESHOLD
:
704 case DSM_VOL_ENA
... MAX98390_R24FF_REV_ID
:
711 static bool max98390_volatile_reg(struct device
*dev
, unsigned int reg
)
714 case MAX98390_SOFTWARE_RESET
... MAX98390_INT_EN3
:
715 case MAX98390_MEAS_ADC_CH0_READ
... MAX98390_MEAS_ADC_CH2_READ
:
716 case MAX98390_PWR_GATE_STATUS
... MAX98390_BROWNOUT_STATUS
:
717 case MAX98390_BROWNOUT_LOWEST_STATUS
:
718 case MAX98390_ENV_TRACK_BOOST_VOUT_READ
:
719 case DSM_STBASS_HPF_B0_BYTE0
... DSM_DEBUZZER_ATTACK_TIME_BYTE2
:
720 case THERMAL_RDC_RD_BACK_BYTE1
... DSMIG_DEBUZZER_THRESHOLD
:
721 case DSM_THERMAL_GAIN
... DSM_WBDRC_GAIN
:
728 #define MAX98390_RATES SNDRV_PCM_RATE_8000_48000
730 #define MAX98390_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
731 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
733 static struct snd_soc_dai_driver max98390_dai
[] = {
735 .name
= "max98390-aif1",
737 .stream_name
= "HiFi Playback",
740 .rates
= MAX98390_RATES
,
741 .formats
= MAX98390_FORMATS
,
744 .stream_name
= "HiFi Capture",
747 .rates
= MAX98390_RATES
,
748 .formats
= MAX98390_FORMATS
,
750 .ops
= &max98390_dai_ops
,
754 static int max98390_dsm_init(struct snd_soc_component
*component
)
757 int param_size
, param_start_addr
;
759 const char *vendor
, *product
;
760 struct max98390_priv
*max98390
=
761 snd_soc_component_get_drvdata(component
);
762 const struct firmware
*fw
;
765 vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
766 product
= dmi_get_system_info(DMI_PRODUCT_NAME
);
768 if (vendor
&& product
) {
769 snprintf(filename
, sizeof(filename
), "dsm_param_%s_%s.bin",
772 sprintf(filename
, "dsm_param.bin");
774 ret
= request_firmware(&fw
, filename
, component
->dev
);
776 ret
= request_firmware(&fw
, "dsm_param.bin", component
->dev
);
781 dev_dbg(component
->dev
,
782 "max98390: param fw size %zd\n",
784 if (fw
->size
< MAX98390_DSM_PARAM_MIN_SIZE
) {
785 dev_err(component
->dev
,
786 "param fw is invalid.\n");
790 dsm_param
= (char *)fw
->data
;
791 param_start_addr
= (dsm_param
[0] & 0xff) | (dsm_param
[1] & 0xff) << 8;
792 param_size
= (dsm_param
[2] & 0xff) | (dsm_param
[3] & 0xff) << 8;
793 if (param_size
> MAX98390_DSM_PARAM_MAX_SIZE
||
794 param_start_addr
< MAX98390_IRQ_CTRL
||
795 fw
->size
< param_size
+ MAX98390_DSM_PAYLOAD_OFFSET
) {
796 dev_err(component
->dev
,
797 "param fw is invalid.\n");
801 regmap_write(max98390
->regmap
, MAX98390_R203A_AMP_EN
, 0x80);
802 dsm_param
+= MAX98390_DSM_PAYLOAD_OFFSET
;
803 regmap_bulk_write(max98390
->regmap
, param_start_addr
,
804 dsm_param
, param_size
);
805 regmap_write(max98390
->regmap
, MAX98390_R23E1_DSP_GLOBAL_EN
, 0x01);
808 release_firmware(fw
);
813 static int max98390_dsm_calibrate(struct snd_soc_component
*component
)
815 unsigned int rdc
, rdc_cal_result
, temp
;
816 unsigned int rdc_integer
, rdc_factor
;
817 struct max98390_priv
*max98390
=
818 snd_soc_component_get_drvdata(component
);
820 regmap_write(max98390
->regmap
, MAX98390_R203A_AMP_EN
, 0x81);
821 regmap_write(max98390
->regmap
, MAX98390_R23FF_GLOBAL_EN
, 0x01);
823 regmap_read(max98390
->regmap
,
824 THERMAL_RDC_RD_BACK_BYTE1
, &rdc
);
825 regmap_read(max98390
->regmap
,
826 THERMAL_RDC_RD_BACK_BYTE0
, &rdc_cal_result
);
827 rdc_cal_result
|= (rdc
<< 8) & 0x0000FFFF;
829 max98390
->ref_rdc_value
= 268435456U / rdc_cal_result
;
831 regmap_read(max98390
->regmap
, MAX98390_MEAS_ADC_CH2_READ
, &temp
);
832 max98390
->ambient_temp_value
= temp
* 52 - 1188;
834 rdc_integer
= rdc_cal_result
* 937 / 65536;
835 rdc_factor
= ((rdc_cal_result
* 937 * 100) / 65536)
836 - (rdc_integer
* 100);
838 dev_info(component
->dev
, "rdc resistance about %d.%02d ohm, reg=0x%X temp reg=0x%X\n",
839 rdc_integer
, rdc_factor
, rdc_cal_result
, temp
);
841 regmap_write(max98390
->regmap
, MAX98390_R23FF_GLOBAL_EN
, 0x00);
842 regmap_write(max98390
->regmap
, MAX98390_R203A_AMP_EN
, 0x80);
847 static void max98390_init_regs(struct snd_soc_component
*component
)
849 struct max98390_priv
*max98390
=
850 snd_soc_component_get_drvdata(component
);
852 regmap_write(max98390
->regmap
, MAX98390_CLK_MON
, 0x6f);
853 regmap_write(max98390
->regmap
, MAX98390_DAT_MON
, 0x00);
854 regmap_write(max98390
->regmap
, MAX98390_PWR_GATE_CTL
, 0x00);
855 regmap_write(max98390
->regmap
, MAX98390_PCM_RX_EN_A
, 0x03);
856 regmap_write(max98390
->regmap
, MAX98390_ENV_TRACK_VOUT_HEADROOM
, 0x0e);
857 regmap_write(max98390
->regmap
, MAX98390_BOOST_BYPASS1
, 0x46);
858 regmap_write(max98390
->regmap
, MAX98390_FET_SCALING3
, 0x03);
861 static int max98390_probe(struct snd_soc_component
*component
)
863 struct max98390_priv
*max98390
=
864 snd_soc_component_get_drvdata(component
);
866 regmap_write(max98390
->regmap
, MAX98390_SOFTWARE_RESET
, 0x01);
867 /* Sleep reset settle time */
870 /* Amp init setting */
871 max98390_init_regs(component
);
872 /* Update dsm bin param */
873 max98390_dsm_init(component
);
876 if (max98390
->ref_rdc_value
) {
877 regmap_write(max98390
->regmap
, DSM_TPROT_RECIP_RDC_ROOM_BYTE0
,
878 max98390
->ref_rdc_value
& 0x000000ff);
879 regmap_write(max98390
->regmap
, DSM_TPROT_RECIP_RDC_ROOM_BYTE1
,
880 (max98390
->ref_rdc_value
>> 8) & 0x000000ff);
881 regmap_write(max98390
->regmap
, DSM_TPROT_RECIP_RDC_ROOM_BYTE2
,
882 (max98390
->ref_rdc_value
>> 16) & 0x000000ff);
884 if (max98390
->ambient_temp_value
) {
885 regmap_write(max98390
->regmap
, DSM_TPROT_ROOM_TEMPERATURE_BYTE1
,
886 (max98390
->ambient_temp_value
>> 8) & 0x000000ff);
887 regmap_write(max98390
->regmap
, DSM_TPROT_ROOM_TEMPERATURE_BYTE0
,
888 (max98390
->ambient_temp_value
) & 0x000000ff);
894 #ifdef CONFIG_PM_SLEEP
895 static int max98390_suspend(struct device
*dev
)
897 struct max98390_priv
*max98390
= dev_get_drvdata(dev
);
899 dev_dbg(dev
, "%s:Enter\n", __func__
);
901 regcache_cache_only(max98390
->regmap
, true);
902 regcache_mark_dirty(max98390
->regmap
);
907 static int max98390_resume(struct device
*dev
)
909 struct max98390_priv
*max98390
= dev_get_drvdata(dev
);
911 dev_dbg(dev
, "%s:Enter\n", __func__
);
913 regcache_cache_only(max98390
->regmap
, false);
914 regcache_sync(max98390
->regmap
);
920 static const struct dev_pm_ops max98390_pm
= {
921 SET_SYSTEM_SLEEP_PM_OPS(max98390_suspend
, max98390_resume
)
924 static const struct snd_soc_component_driver soc_codec_dev_max98390
= {
925 .probe
= max98390_probe
,
926 .controls
= max98390_snd_controls
,
927 .num_controls
= ARRAY_SIZE(max98390_snd_controls
),
928 .dapm_widgets
= max98390_dapm_widgets
,
929 .num_dapm_widgets
= ARRAY_SIZE(max98390_dapm_widgets
),
930 .dapm_routes
= max98390_audio_map
,
931 .num_dapm_routes
= ARRAY_SIZE(max98390_audio_map
),
933 .use_pmdown_time
= 1,
935 .non_legacy_dai_naming
= 1,
938 static const struct regmap_config max98390_regmap
= {
941 .max_register
= MAX98390_R24FF_REV_ID
,
942 .reg_defaults
= max98390_reg_defaults
,
943 .num_reg_defaults
= ARRAY_SIZE(max98390_reg_defaults
),
944 .readable_reg
= max98390_readable_register
,
945 .volatile_reg
= max98390_volatile_reg
,
946 .cache_type
= REGCACHE_RBTREE
,
949 static int max98390_i2c_probe(struct i2c_client
*i2c
,
950 const struct i2c_device_id
*id
)
955 struct max98390_priv
*max98390
= NULL
;
956 struct i2c_adapter
*adapter
= to_i2c_adapter(i2c
->dev
.parent
);
958 ret
= i2c_check_functionality(adapter
,
960 | I2C_FUNC_SMBUS_BYTE_DATA
);
962 dev_err(&i2c
->dev
, "I2C check functionality failed\n");
966 max98390
= devm_kzalloc(&i2c
->dev
, sizeof(*max98390
), GFP_KERNEL
);
971 i2c_set_clientdata(i2c
, max98390
);
973 ret
= device_property_read_u32(&i2c
->dev
, "maxim,temperature_calib",
974 &max98390
->ambient_temp_value
);
977 "no optional property 'temperature_calib' found, default:\n");
979 ret
= device_property_read_u32(&i2c
->dev
, "maxim,r0_calib",
980 &max98390
->ref_rdc_value
);
983 "no optional property 'r0_calib' found, default:\n");
987 "%s: r0_calib: 0x%x,temperature_calib: 0x%x",
988 __func__
, max98390
->ref_rdc_value
,
989 max98390
->ambient_temp_value
);
991 /* regmap initialization */
992 max98390
->regmap
= devm_regmap_init_i2c(i2c
, &max98390_regmap
);
993 if (IS_ERR(max98390
->regmap
)) {
994 ret
= PTR_ERR(max98390
->regmap
);
996 "Failed to allocate regmap: %d\n", ret
);
1000 /* Check Revision ID */
1001 ret
= regmap_read(max98390
->regmap
,
1002 MAX98390_R24FF_REV_ID
, ®
);
1005 "ret=%d, Failed to read: 0x%02X\n",
1006 ret
, MAX98390_R24FF_REV_ID
);
1009 dev_info(&i2c
->dev
, "MAX98390 revisionID: 0x%02X\n", reg
);
1011 ret
= devm_snd_soc_register_component(&i2c
->dev
,
1012 &soc_codec_dev_max98390
,
1013 max98390_dai
, ARRAY_SIZE(max98390_dai
));
1018 static const struct i2c_device_id max98390_i2c_id
[] = {
1023 MODULE_DEVICE_TABLE(i2c
, max98390_i2c_id
);
1025 #if defined(CONFIG_OF)
1026 static const struct of_device_id max98390_of_match
[] = {
1027 { .compatible
= "maxim,max98390", },
1030 MODULE_DEVICE_TABLE(of
, max98390_of_match
);
1034 static const struct acpi_device_id max98390_acpi_match
[] = {
1038 MODULE_DEVICE_TABLE(acpi
, max98390_acpi_match
);
1041 static struct i2c_driver max98390_i2c_driver
= {
1044 .of_match_table
= of_match_ptr(max98390_of_match
),
1045 .acpi_match_table
= ACPI_PTR(max98390_acpi_match
),
1048 .probe
= max98390_i2c_probe
,
1049 .id_table
= max98390_i2c_id
,
1052 module_i2c_driver(max98390_i2c_driver
)
1054 MODULE_DESCRIPTION("ALSA SoC MAX98390 driver");
1055 MODULE_AUTHOR("Steve Lee <steves.lee@maximintegrated.com>");
1056 MODULE_LICENSE("GPL");