sound/soc/codecs/rt1016.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // rt1016.c  --  RT1016 ALSA SoC audio amplifier driver
   4 //
   5 // Copyright 2020 Realtek Semiconductor Corp.
   6 // Author: Oder Chiou <oder_chiou@realtek.com>
   7 //
   8
   9 #include <linux/fs.h>
  10 #include <linux/module.h>
  11 #include <linux/moduleparam.h>
  12 #include <linux/init.h>
  13 #include <linux/delay.h>
  14 #include <linux/pm.h>
  15 #include <linux/regmap.h>
  16 #include <linux/i2c.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/firmware.h>
  19 #include <linux/gpio.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/pcm_params.h>
  23 #include <sound/soc.h>
  24 #include <sound/soc-dapm.h>
  25 #include <sound/initval.h>
  26 #include <sound/tlv.h>
  27
  28 #include "rl6231.h"
  29 #include "rt1016.h"
  30
  31 static const struct reg_sequence rt1016_patch[] = {
  32         {RT1016_VOL_CTRL_3,     0x8900},
  33         {RT1016_ANA_CTRL_1,     0xa002},
  34         {RT1016_ANA_CTRL_2,     0x0002},
  35         {RT1016_CLOCK_4,        0x6700},
  36         {RT1016_CLASSD_3,       0xdc55},
  37         {RT1016_CLASSD_4,       0x376a},
  38         {RT1016_CLASSD_5,       0x009f},
  39 };
  40
  41 static const struct reg_default rt1016_reg[] = {
  42         {0x00, 0x0000},
  43         {0x01, 0x5400},
  44         {0x02, 0x5506},
  45         {0x03, 0xf800},
  46         {0x04, 0x0000},
  47         {0x05, 0xbfbf},
  48         {0x06, 0x8900},
  49         {0x07, 0xa002},
  50         {0x08, 0x0000},
  51         {0x09, 0x0000},
  52         {0x0a, 0x0000},
  53         {0x0c, 0x0000},
  54         {0x0d, 0x0000},
  55         {0x0e, 0x10ec},
  56         {0x0f, 0x6595},
  57         {0x11, 0x0002},
  58         {0x1c, 0x0000},
  59         {0x1d, 0x0000},
  60         {0x1e, 0x0000},
  61         {0x1f, 0xf000},
  62         {0x20, 0x0000},
  63         {0x21, 0x6000},
  64         {0x22, 0x0000},
  65         {0x23, 0x6700},
  66         {0x24, 0x0000},
  67         {0x25, 0x0000},
  68         {0x26, 0x0000},
  69         {0x40, 0x0018},
  70         {0x60, 0x00a5},
  71         {0x80, 0x0010},
  72         {0x81, 0x0009},
  73         {0x82, 0x0000},
  74         {0x83, 0x0000},
  75         {0xa0, 0x0700},
  76         {0xc0, 0x0080},
  77         {0xc1, 0x02a0},
  78         {0xc2, 0x1400},
  79         {0xc3, 0x0a4a},
  80         {0xc4, 0x552a},
  81         {0xc5, 0x087e},
  82         {0xc6, 0x0020},
  83         {0xc7, 0xa833},
  84         {0xc8, 0x0433},
  85         {0xc9, 0x8040},
  86         {0xca, 0xdc55},
  87         {0xcb, 0x376a},
  88         {0xcc, 0x009f},
  89         {0xcf, 0x0020},
  90 };
  91
  92 static bool rt1016_volatile_register(struct device *dev, unsigned int reg)
  93 {
  94         switch (reg) {
  95         case RT1016_ANA_FLAG:
  96         case RT1016_VERSION2_ID:
  97         case RT1016_VERSION1_ID:
  98         case RT1016_VENDER_ID:
  99         case RT1016_DEVICE_ID:
 100         case RT1016_TEST_SIGNAL:
 101         case RT1016_SC_CTRL_1:
 102                 return true;
 103
 104         default:
 105                 return false;
 106         }
 107 }
 108
 109 static bool rt1016_readable_register(struct device *dev, unsigned int reg)
 110 {
 111         switch (reg) {
 112         case RT1016_RESET:
 113         case RT1016_PADS_CTRL_1:
 114         case RT1016_PADS_CTRL_2:
 115         case RT1016_I2C_CTRL:
 116         case RT1016_VOL_CTRL_1:
 117         case RT1016_VOL_CTRL_2:
 118         case RT1016_VOL_CTRL_3:
 119         case RT1016_ANA_CTRL_1:
 120         case RT1016_MUX_SEL:
 121         case RT1016_RX_I2S_CTRL:
 122         case RT1016_ANA_FLAG:
 123         case RT1016_VERSION2_ID:
 124         case RT1016_VERSION1_ID:
 125         case RT1016_VENDER_ID:
 126         case RT1016_DEVICE_ID:
 127         case RT1016_ANA_CTRL_2:
 128         case RT1016_TEST_SIGNAL:
 129         case RT1016_TEST_CTRL_1:
 130         case RT1016_TEST_CTRL_2:
 131         case RT1016_TEST_CTRL_3:
 132         case RT1016_CLOCK_1:
 133         case RT1016_CLOCK_2:
 134         case RT1016_CLOCK_3:
 135         case RT1016_CLOCK_4:
 136         case RT1016_CLOCK_5:
 137         case RT1016_CLOCK_6:
 138         case RT1016_CLOCK_7:
 139         case RT1016_I2S_CTRL:
 140         case RT1016_DAC_CTRL_1:
 141         case RT1016_SC_CTRL_1:
 142         case RT1016_SC_CTRL_2:
 143         case RT1016_SC_CTRL_3:
 144         case RT1016_SC_CTRL_4:
 145         case RT1016_SIL_DET:
 146         case RT1016_SYS_CLK:
 147         case RT1016_BIAS_CUR:
 148         case RT1016_DAC_CTRL_2:
 149         case RT1016_LDO_CTRL:
 150         case RT1016_CLASSD_1:
 151         case RT1016_PLL1:
 152         case RT1016_PLL2:
 153         case RT1016_PLL3:
 154         case RT1016_CLASSD_2:
 155         case RT1016_CLASSD_OUT:
 156         case RT1016_CLASSD_3:
 157         case RT1016_CLASSD_4:
 158         case RT1016_CLASSD_5:
 159         case RT1016_PWR_CTRL:
 160                 return true;
 161
 162         default:
 163                 return false;
 164         }
 165 }
 166
 167 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
 168
 169 static const struct snd_kcontrol_new rt1016_snd_controls[] = {
 170         SOC_DOUBLE_TLV("DAC Playback Volume", RT1016_VOL_CTRL_2,
 171                 RT1016_L_VOL_SFT, RT1016_R_VOL_SFT, 191, 0, dac_vol_tlv),
 172         SOC_DOUBLE("DAC Playback Switch", RT1016_VOL_CTRL_1,
 173                 RT1016_DA_MUTE_L_SFT, RT1016_DA_MUTE_R_SFT, 1, 1),
 174 };
 175
 176 static int rt1016_is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 177                          struct snd_soc_dapm_widget *sink)
 178 {
 179         struct snd_soc_component *component =
 180                 snd_soc_dapm_to_component(source->dapm);
 181         struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component);
 182
 183         if (rt1016->sysclk_src == RT1016_SCLK_S_PLL)
 184                 return 1;
 185         else
 186                 return 0;
 187 }
 188
 189 /* Interface data select */
 190 static const char * const rt1016_data_select[] = {
 191         "L/R", "R/L", "L/L", "R/R"
 192 };
 193
 194 static SOC_ENUM_SINGLE_DECL(rt1016_if_data_swap_enum,
 195         RT1016_I2S_CTRL, RT1016_I2S_DATA_SWAP_SFT, rt1016_data_select);
 196
 197 static const struct snd_kcontrol_new rt1016_if_data_swap_mux =
 198         SOC_DAPM_ENUM("Data Swap Mux", rt1016_if_data_swap_enum);
 199
 200 static const struct snd_soc_dapm_widget rt1016_dapm_widgets[] = {
 201         SND_SOC_DAPM_MUX("Data Swap Mux", SND_SOC_NOPM, 0, 0,
 202                         &rt1016_if_data_swap_mux),
 203
 204         SND_SOC_DAPM_SUPPLY("DAC Filter", RT1016_CLOCK_3,
 205                 RT1016_PWR_DAC_FILTER_BIT, 0, NULL, 0),
 206         SND_SOC_DAPM_SUPPLY("DAMOD", RT1016_CLOCK_3, RT1016_PWR_DACMOD_BIT, 0,
 207                 NULL, 0),
 208         SND_SOC_DAPM_SUPPLY("FIFO", RT1016_CLOCK_3, RT1016_PWR_CLK_FIFO_BIT, 0,
 209                 NULL, 0),
 210         SND_SOC_DAPM_SUPPLY("Pure DC", RT1016_CLOCK_3,
 211                 RT1016_PWR_CLK_PUREDC_BIT, 0, NULL, 0),
 212         SND_SOC_DAPM_SUPPLY("CLK Silence Det", RT1016_CLOCK_3,
 213                 RT1016_PWR_SIL_DET_BIT, 0, NULL, 0),
 214         SND_SOC_DAPM_SUPPLY("RC 25M", RT1016_CLOCK_3, RT1016_PWR_RC_25M_BIT, 0,
 215                 NULL, 0),
 216         SND_SOC_DAPM_SUPPLY("PLL1", RT1016_CLOCK_3, RT1016_PWR_PLL1_BIT, 0,
 217                 NULL, 0),
 218         SND_SOC_DAPM_SUPPLY("ANA CTRL", RT1016_CLOCK_3, RT1016_PWR_ANA_CTRL_BIT,
 219                 0, NULL, 0),
 220         SND_SOC_DAPM_SUPPLY("CLK SYS", RT1016_CLOCK_3, RT1016_PWR_CLK_SYS_BIT,
 221                 0, NULL, 0),
 222
 223         SND_SOC_DAPM_SUPPLY("LRCK Det", RT1016_CLOCK_4, RT1016_PWR_LRCK_DET_BIT,
 224                 0, NULL, 0),
 225         SND_SOC_DAPM_SUPPLY("BCLK Det", RT1016_CLOCK_4, RT1016_PWR_BCLK_DET_BIT,
 226                 0, NULL, 0),
 227
 228         SND_SOC_DAPM_SUPPLY("CKGEN DAC", RT1016_DAC_CTRL_2,
 229                 RT1016_CKGEN_DAC_BIT, 0, NULL, 0),
 230         SND_SOC_DAPM_SUPPLY("VCM SLOW", RT1016_CLASSD_1, RT1016_VCM_SLOW_BIT, 0,
 231                 NULL, 0),
 232         SND_SOC_DAPM_SUPPLY("Silence Det", RT1016_SIL_DET,
 233                 RT1016_SIL_DET_EN_BIT, 0, NULL, 0),
 234         SND_SOC_DAPM_SUPPLY("PLL2", RT1016_PLL2, RT1016_PLL2_EN_BIT, 0, NULL,
 235                 0),
 236
 237         SND_SOC_DAPM_SUPPLY_S("BG1 BG2", 1, RT1016_PWR_CTRL,
 238                 RT1016_PWR_BG_1_2_BIT, 0, NULL, 0),
 239         SND_SOC_DAPM_SUPPLY_S("MBIAS BG", 1, RT1016_PWR_CTRL,
 240                 RT1016_PWR_MBIAS_BG_BIT, 0, NULL, 0),
 241         SND_SOC_DAPM_SUPPLY_S("PLL", 1, RT1016_PWR_CTRL, RT1016_PWR_PLL_BIT, 0,
 242                 NULL, 0),
 243         SND_SOC_DAPM_SUPPLY_S("BASIC", 1, RT1016_PWR_CTRL, RT1016_PWR_BASIC_BIT,
 244                 0, NULL, 0),
 245         SND_SOC_DAPM_SUPPLY_S("CLASS D", 1, RT1016_PWR_CTRL,
 246                 RT1016_PWR_CLSD_BIT, 0, NULL, 0),
 247         SND_SOC_DAPM_SUPPLY_S("25M", 1, RT1016_PWR_CTRL, RT1016_PWR_25M_BIT, 0,
 248                 NULL, 0),
 249         SND_SOC_DAPM_SUPPLY_S("DACL", 1, RT1016_PWR_CTRL, RT1016_PWR_DACL_BIT,
 250                 0, NULL, 0),
 251         SND_SOC_DAPM_SUPPLY_S("DACR", 1, RT1016_PWR_CTRL, RT1016_PWR_DACR_BIT,
 252                 0, NULL, 0),
 253         SND_SOC_DAPM_SUPPLY_S("LDO2", 1, RT1016_PWR_CTRL, RT1016_PWR_LDO2_BIT,
 254                 0, NULL, 0),
 255         SND_SOC_DAPM_SUPPLY_S("VREF", 1, RT1016_PWR_CTRL, RT1016_PWR_VREF_BIT,
 256                 0, NULL, 0),
 257         SND_SOC_DAPM_SUPPLY_S("MBIAS", 1, RT1016_PWR_CTRL, RT1016_PWR_MBIAS_BIT,
 258                 0, NULL, 0),
 259
 260         SND_SOC_DAPM_AIF_IN("AIFRX", "AIF Playback", 0, SND_SOC_NOPM, 0, 0),
 261         SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
 262
 263         SND_SOC_DAPM_OUTPUT("SPO"),
 264 };
 265
 266 static const struct snd_soc_dapm_route rt1016_dapm_routes[] = {
 267         { "Data Swap Mux", "L/R", "AIFRX" },
 268         { "Data Swap Mux", "R/L", "AIFRX" },
 269         { "Data Swap Mux", "L/L", "AIFRX" },
 270         { "Data Swap Mux", "R/R", "AIFRX" },
 271
 272         { "DAC", NULL, "DAC Filter" },
 273         { "DAC", NULL, "DAMOD" },
 274         { "DAC", NULL, "FIFO" },
 275         { "DAC", NULL, "Pure DC" },
 276         { "DAC", NULL, "Silence Det" },
 277         { "DAC", NULL, "ANA CTRL" },
 278         { "DAC", NULL, "CLK SYS" },
 279         { "DAC", NULL, "LRCK Det" },
 280         { "DAC", NULL, "BCLK Det" },
 281         { "DAC", NULL, "CKGEN DAC" },
 282         { "DAC", NULL, "VCM SLOW" },
 283
 284         { "PLL", NULL, "PLL1" },
 285         { "PLL", NULL, "PLL2" },
 286         { "25M", NULL, "RC 25M" },
 287         { "Silence Det", NULL, "CLK Silence Det" },
 288
 289         { "DAC", NULL, "Data Swap Mux" },
 290         { "DAC", NULL, "BG1 BG2" },
 291         { "DAC", NULL, "MBIAS BG" },
 292         { "DAC", NULL, "PLL", rt1016_is_sys_clk_from_pll},
 293         { "DAC", NULL, "BASIC" },
 294         { "DAC", NULL, "CLASS D" },
 295         { "DAC", NULL, "25M" },
 296         { "DAC", NULL, "DACL" },
 297         { "DAC", NULL, "DACR" },
 298         { "DAC", NULL, "LDO2" },
 299         { "DAC", NULL, "VREF" },
 300         { "DAC", NULL, "MBIAS" },
 301
 302         { "SPO", NULL, "DAC" },
 303 };
 304
 305 static int rt1016_hw_params(struct snd_pcm_substream *substream,
 306         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 307 {
 308         struct snd_soc_component *component = dai->component;
 309         struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component);
 310         int pre_div, bclk_ms, frame_size;
 311         unsigned int val_len = 0;
 312
 313         rt1016->lrck = params_rate(params);
 314         pre_div = rl6231_get_clk_info(rt1016->sysclk, rt1016->lrck);
 315         if (pre_div < 0) {
 316                 dev_err(component->dev, "Unsupported clock rate\n");
 317                 return -EINVAL;
 318         }
 319
 320         frame_size = snd_soc_params_to_frame_size(params);
 321         if (frame_size < 0) {
 322                 dev_err(component->dev, "Unsupported frame size: %d\n",
 323                         frame_size);
 324                 return -EINVAL;
 325         }
 326
 327         bclk_ms = frame_size > 32;
 328         rt1016->bclk = rt1016->lrck * (32 << bclk_ms);
 329
 330         if (bclk_ms && rt1016->master)
 331                 snd_soc_component_update_bits(component, RT1016_I2S_CTRL,
 332                         RT1016_I2S_BCLK_MS_MASK, RT1016_I2S_BCLK_MS_64);
 333
 334         dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
 335                                 rt1016->lrck, pre_div, dai->id);
 336
 337         switch (params_width(params)) {
 338         case 16:
 339                 val_len = RT1016_I2S_DL_16;
 340                 break;
 341         case 20:
 342                 val_len = RT1016_I2S_DL_20;
 343                 break;
 344         case 24:
 345                 val_len = RT1016_I2S_DL_24;
 346                 break;
 347         case 32:
 348                 val_len = RT1016_I2S_DL_32;
 349                 break;
 350         default:
 351                 return -EINVAL;
 352         }
 353
 354         snd_soc_component_update_bits(component, RT1016_I2S_CTRL,
 355                 RT1016_I2S_DL_MASK, val_len);
 356         snd_soc_component_update_bits(component, RT1016_CLOCK_2,
 357                 RT1016_FS_PD_MASK | RT1016_OSR_PD_MASK,
 358                 ((pre_div + 3) << RT1016_FS_PD_SFT) |
 359                 (pre_div << RT1016_OSR_PD_SFT));
 360
 361         return 0;
 362 }
 363
 364 static int rt1016_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 365 {
 366         struct snd_soc_component *component = dai->component;
 367         struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component);
 368         unsigned int reg_val = 0;
 369
 370         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 371         case SND_SOC_DAIFMT_CBM_CFM:
 372                 reg_val |= RT1016_I2S_MS_M;
 373                 rt1016->master = 1;
 374                 break;
 375         case SND_SOC_DAIFMT_CBS_CFS:
 376                 reg_val |= RT1016_I2S_MS_S;
 377                 break;
 378         default:
 379                 return -EINVAL;
 380         }
 381
 382         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 383         case SND_SOC_DAIFMT_NB_NF:
 384                 break;
 385         case SND_SOC_DAIFMT_IB_NF:
 386                 reg_val |= RT1016_I2S_BCLK_POL_INV;
 387                 break;
 388         default:
 389                 return -EINVAL;
 390         }
 391
 392         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 393         case SND_SOC_DAIFMT_I2S:
 394                 break;
 395
 396         case SND_SOC_DAIFMT_LEFT_J:
 397                 reg_val |= RT1016_I2S_DF_LEFT;
 398                 break;
 399
 400         case SND_SOC_DAIFMT_DSP_A:
 401                 reg_val |= RT1016_I2S_DF_PCM_A;
 402                 break;
 403
 404         case SND_SOC_DAIFMT_DSP_B:
 405                 reg_val |= RT1016_I2S_DF_PCM_B;
 406                 break;
 407
 408         default:
 409                 return -EINVAL;
 410         }
 411
 412         snd_soc_component_update_bits(component, RT1016_I2S_CTRL,
 413                         RT1016_I2S_MS_MASK | RT1016_I2S_BCLK_POL_MASK |
 414                         RT1016_I2S_DF_MASK, reg_val);
 415
 416         return 0;
 417 }
 418
 419 static int rt1016_set_component_sysclk(struct snd_soc_component *component,
 420                 int clk_id, int source, unsigned int freq, int dir)
 421 {
 422         struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component);
 423         unsigned int reg_val = 0;
 424
 425         if (freq == rt1016->sysclk && clk_id == rt1016->sysclk_src)
 426                 return 0;
 427
 428         switch (clk_id) {
 429         case RT1016_SCLK_S_MCLK:
 430                 reg_val |= RT1016_CLK_SYS_SEL_MCLK;
 431                 break;
 432
 433         case RT1016_SCLK_S_PLL:
 434                 reg_val |= RT1016_CLK_SYS_SEL_PLL;
 435                 break;
 436
 437         default:
 438                 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
 439                 return -EINVAL;
 440         }
 441
 442         rt1016->sysclk = freq;
 443         rt1016->sysclk_src = clk_id;
 444
 445         dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
 446                 freq, clk_id);
 447
 448         snd_soc_component_update_bits(component, RT1016_CLOCK_1,
 449                         RT1016_CLK_SYS_SEL_MASK, reg_val);
 450
 451         return 0;
 452 }
 453
 454 static int rt1016_set_component_pll(struct snd_soc_component *component,
 455                 int pll_id, int source, unsigned int freq_in,
 456                 unsigned int freq_out)
 457 {
 458         struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component);
 459         struct rl6231_pll_code pll_code;
 460         int ret;
 461
 462         if (!freq_in || !freq_out) {
 463                 dev_dbg(component->dev, "PLL disabled\n");
 464
 465                 rt1016->pll_in = 0;
 466                 rt1016->pll_out = 0;
 467
 468                 return 0;
 469         }
 470
 471         if (source == rt1016->pll_src && freq_in == rt1016->pll_in &&
 472                 freq_out == rt1016->pll_out)
 473                 return 0;
 474
 475         switch (source) {
 476         case RT1016_PLL_S_MCLK:
 477                 snd_soc_component_update_bits(component, RT1016_CLOCK_1,
 478                         RT1016_PLL_SEL_MASK, RT1016_PLL_SEL_MCLK);
 479                 break;
 480
 481         case RT1016_PLL_S_BCLK:
 482                 snd_soc_component_update_bits(component, RT1016_CLOCK_1,
 483                         RT1016_PLL_SEL_MASK, RT1016_PLL_SEL_BCLK);
 484                 break;
 485
 486         default:
 487                 dev_err(component->dev, "Unknown PLL Source %d\n", source);
 488                 return -EINVAL;
 489         }
 490
 491         ret = rl6231_pll_calc(freq_in, freq_out * 4, &pll_code);
 492         if (ret < 0) {
 493                 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
 494                 return ret;
 495         }
 496
 497         dev_dbg(component->dev, "mbypass=%d m=%d n=%d kbypass=%d k=%d\n",
 498                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
 499                 pll_code.n_code, pll_code.k_bp,
 500                 (pll_code.k_bp ? 0 : pll_code.k_code));
 501
 502         snd_soc_component_write(component, RT1016_PLL1,
 503                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT1016_PLL_M_SFT |
 504                 pll_code.m_bp << RT1016_PLL_M_BP_SFT | pll_code.n_code);
 505         snd_soc_component_write(component, RT1016_PLL2,
 506                 pll_code.k_bp << RT1016_PLL_K_BP_SFT |
 507                 (pll_code.k_bp ? 0 : pll_code.k_code));
 508
 509         rt1016->pll_in = freq_in;
 510         rt1016->pll_out = freq_out;
 511         rt1016->pll_src = source;
 512
 513         return 0;
 514 }
 515
 516 static int rt1016_probe(struct snd_soc_component *component)
 517 {
 518         struct rt1016_priv *rt1016 =
 519                 snd_soc_component_get_drvdata(component);
 520
 521         rt1016->component = component;
 522
 523         return 0;
 524 }
 525
 526 static void rt1016_remove(struct snd_soc_component *component)
 527 {
 528         struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component);
 529
 530         regmap_write(rt1016->regmap, RT1016_RESET, 0);
 531 }
 532
 533 #define RT1016_STEREO_RATES SNDRV_PCM_RATE_8000_48000
 534 #define RT1016_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
 535                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
 536
 537 static struct snd_soc_dai_ops rt1016_aif_dai_ops = {
 538         .hw_params = rt1016_hw_params,
 539         .set_fmt = rt1016_set_dai_fmt,
 540 };
 541
 542 static struct snd_soc_dai_driver rt1016_dai[] = {
 543         {
 544                 .name = "rt1016-aif",
 545                 .id = 0,
 546                 .playback = {
 547                         .stream_name = "AIF Playback",
 548                         .channels_min = 1,
 549                         .channels_max = 2,
 550                         .rates = RT1016_STEREO_RATES,
 551                         .formats = RT1016_FORMATS,
 552                 },
 553                 .ops = &rt1016_aif_dai_ops,
 554         }
 555 };
 556
 557 #ifdef CONFIG_PM
 558 static int rt1016_suspend(struct snd_soc_component *component)
 559 {
 560         struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component);
 561
 562         regcache_cache_only(rt1016->regmap, true);
 563         regcache_mark_dirty(rt1016->regmap);
 564
 565         return 0;
 566 }
 567
 568 static int rt1016_resume(struct snd_soc_component *component)
 569 {
 570         struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component);
 571
 572         regcache_cache_only(rt1016->regmap, false);
 573         regcache_sync(rt1016->regmap);
 574
 575         return 0;
 576 }
 577 #else
 578 #define rt1016_suspend NULL
 579 #define rt1016_resume NULL
 580 #endif
 581
 582 static const struct snd_soc_component_driver soc_component_dev_rt1016 = {
 583         .probe = rt1016_probe,
 584         .remove = rt1016_remove,
 585         .suspend = rt1016_suspend,
 586         .resume = rt1016_resume,
 587         .controls = rt1016_snd_controls,
 588         .num_controls = ARRAY_SIZE(rt1016_snd_controls),
 589         .dapm_widgets = rt1016_dapm_widgets,
 590         .num_dapm_widgets = ARRAY_SIZE(rt1016_dapm_widgets),
 591         .dapm_routes = rt1016_dapm_routes,
 592         .num_dapm_routes = ARRAY_SIZE(rt1016_dapm_routes),
 593         .set_sysclk = rt1016_set_component_sysclk,
 594         .set_pll = rt1016_set_component_pll,
 595         .use_pmdown_time        = 1,
 596         .endianness             = 1,
 597         .non_legacy_dai_naming  = 1,
 598 };
 599
 600 static const struct regmap_config rt1016_regmap = {
 601         .reg_bits = 8,
 602         .val_bits = 16,
 603         .max_register = RT1016_PWR_CTRL,
 604         .volatile_reg = rt1016_volatile_register,
 605         .readable_reg = rt1016_readable_register,
 606         .cache_type = REGCACHE_RBTREE,
 607         .reg_defaults = rt1016_reg,
 608         .num_reg_defaults = ARRAY_SIZE(rt1016_reg),
 609 };
 610
 611 static const struct i2c_device_id rt1016_i2c_id[] = {
 612         { "rt1016", 0 },
 613         { }
 614 };
 615 MODULE_DEVICE_TABLE(i2c, rt1016_i2c_id);
 616
 617 #if defined(CONFIG_OF)
 618 static const struct of_device_id rt1016_of_match[] = {
 619         { .compatible = "realtek,rt1016", },
 620         {},
 621 };
 622 MODULE_DEVICE_TABLE(of, rt1016_of_match);
 623 #endif
 624
 625 #ifdef CONFIG_ACPI
 626 static struct acpi_device_id rt1016_acpi_match[] = {
 627         {"10EC1016", 0,},
 628         {},
 629 };
 630 MODULE_DEVICE_TABLE(acpi, rt1016_acpi_match);
 631 #endif
 632
 633 static int rt1016_i2c_probe(struct i2c_client *i2c,
 634         const struct i2c_device_id *id)
 635 {
 636         struct rt1016_priv *rt1016;
 637         int ret;
 638         unsigned int val;
 639
 640         rt1016 = devm_kzalloc(&i2c->dev, sizeof(struct rt1016_priv),
 641                                 GFP_KERNEL);
 642         if (rt1016 == NULL)
 643                 return -ENOMEM;
 644
 645         i2c_set_clientdata(i2c, rt1016);
 646
 647         rt1016->regmap = devm_regmap_init_i2c(i2c, &rt1016_regmap);
 648         if (IS_ERR(rt1016->regmap)) {
 649                 ret = PTR_ERR(rt1016->regmap);
 650                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
 651                         ret);
 652                 return ret;
 653         }
 654
 655         regmap_read(rt1016->regmap, RT1016_DEVICE_ID, &val);
 656         if (val != RT1016_DEVICE_ID_VAL) {
 657                 dev_err(&i2c->dev,
 658                         "Device with ID register %x is not rt1016\n", val);
 659                 return -ENODEV;
 660         }
 661
 662         regmap_write(rt1016->regmap, RT1016_RESET, 0);
 663
 664         ret = regmap_register_patch(rt1016->regmap, rt1016_patch,
 665                                     ARRAY_SIZE(rt1016_patch));
 666         if (ret != 0)
 667                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
 668
 669         return devm_snd_soc_register_component(&i2c->dev,
 670                 &soc_component_dev_rt1016,
 671                 rt1016_dai, ARRAY_SIZE(rt1016_dai));
 672 }
 673
 674 static void rt1016_i2c_shutdown(struct i2c_client *client)
 675 {
 676         struct rt1016_priv *rt1016 = i2c_get_clientdata(client);
 677
 678         regmap_write(rt1016->regmap, RT1016_RESET, 0);
 679 }
 680
 681 static struct i2c_driver rt1016_i2c_driver = {
 682         .driver = {
 683                 .name = "rt1016",
 684                 .of_match_table = of_match_ptr(rt1016_of_match),
 685                 .acpi_match_table = ACPI_PTR(rt1016_acpi_match),
 686         },
 687         .probe = rt1016_i2c_probe,
 688         .shutdown = rt1016_i2c_shutdown,
 689         .id_table = rt1016_i2c_id,
 690 };
 691 module_i2c_driver(rt1016_i2c_driver);
 692
 693 MODULE_DESCRIPTION("ASoC RT1016 driver");
 694 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
 695 MODULE_LICENSE("GPL v2");