1 // SPDX-License-Identifier: GPL-2.0
3 // Driver for the Texas Instruments TAS2764 CODEC
4 // Copyright (C) 2020 Texas Instruments Inc.
6 #include <linux/module.h>
7 #include <linux/moduleparam.h>
9 #include <linux/init.h>
10 #include <linux/delay.h>
12 #include <linux/i2c.h>
13 #include <linux/gpio.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/regmap.h>
18 #include <linux/of_gpio.h>
19 #include <linux/slab.h>
20 #include <sound/soc.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/initval.h>
24 #include <sound/tlv.h>
29 struct snd_soc_component
*component
;
30 struct gpio_desc
*reset_gpio
;
31 struct gpio_desc
*sdz_gpio
;
32 struct regmap
*regmap
;
39 static void tas2764_reset(struct tas2764_priv
*tas2764
)
41 if (tas2764
->reset_gpio
) {
42 gpiod_set_value_cansleep(tas2764
->reset_gpio
, 0);
44 gpiod_set_value_cansleep(tas2764
->reset_gpio
, 1);
47 snd_soc_component_write(tas2764
->component
, TAS2764_SW_RST
,
51 static int tas2764_set_bias_level(struct snd_soc_component
*component
,
52 enum snd_soc_bias_level level
)
54 struct tas2764_priv
*tas2764
= snd_soc_component_get_drvdata(component
);
58 snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
59 TAS2764_PWR_CTRL_MASK
,
60 TAS2764_PWR_CTRL_ACTIVE
);
62 case SND_SOC_BIAS_STANDBY
:
63 case SND_SOC_BIAS_PREPARE
:
64 snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
65 TAS2764_PWR_CTRL_MASK
,
66 TAS2764_PWR_CTRL_MUTE
);
68 case SND_SOC_BIAS_OFF
:
69 snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
70 TAS2764_PWR_CTRL_MASK
,
71 TAS2764_PWR_CTRL_SHUTDOWN
);
76 "wrong power level setting %d\n", level
);
84 static int tas2764_codec_suspend(struct snd_soc_component
*component
)
86 struct tas2764_priv
*tas2764
= snd_soc_component_get_drvdata(component
);
89 ret
= snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
90 TAS2764_PWR_CTRL_MASK
,
91 TAS2764_PWR_CTRL_SHUTDOWN
);
96 if (tas2764
->sdz_gpio
)
97 gpiod_set_value_cansleep(tas2764
->sdz_gpio
, 0);
99 regcache_cache_only(tas2764
->regmap
, true);
100 regcache_mark_dirty(tas2764
->regmap
);
105 static int tas2764_codec_resume(struct snd_soc_component
*component
)
107 struct tas2764_priv
*tas2764
= snd_soc_component_get_drvdata(component
);
110 if (tas2764
->sdz_gpio
)
111 gpiod_set_value_cansleep(tas2764
->sdz_gpio
, 1);
113 ret
= snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
114 TAS2764_PWR_CTRL_MASK
,
115 TAS2764_PWR_CTRL_ACTIVE
);
120 regcache_cache_only(tas2764
->regmap
, false);
122 return regcache_sync(tas2764
->regmap
);
125 #define tas2764_codec_suspend NULL
126 #define tas2764_codec_resume NULL
129 static const char * const tas2764_ASI1_src
[] = {
130 "I2C offset", "Left", "Right", "LeftRightDiv2",
133 static SOC_ENUM_SINGLE_DECL(
134 tas2764_ASI1_src_enum
, TAS2764_TDM_CFG2
, 4, tas2764_ASI1_src
);
136 static const struct snd_kcontrol_new tas2764_asi1_mux
=
137 SOC_DAPM_ENUM("ASI1 Source", tas2764_ASI1_src_enum
);
139 static int tas2764_dac_event(struct snd_soc_dapm_widget
*w
,
140 struct snd_kcontrol
*kcontrol
, int event
)
142 struct snd_soc_component
*component
= snd_soc_dapm_to_component(w
->dapm
);
143 struct tas2764_priv
*tas2764
= snd_soc_component_get_drvdata(component
);
147 case SND_SOC_DAPM_POST_PMU
:
148 ret
= snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
149 TAS2764_PWR_CTRL_MASK
,
150 TAS2764_PWR_CTRL_MUTE
);
152 case SND_SOC_DAPM_PRE_PMD
:
153 ret
= snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
154 TAS2764_PWR_CTRL_MASK
,
155 TAS2764_PWR_CTRL_SHUTDOWN
);
158 dev_err(tas2764
->dev
, "Unsupported event\n");
168 static const struct snd_kcontrol_new isense_switch
=
169 SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL
, TAS2764_ISENSE_POWER_EN
, 1, 1);
170 static const struct snd_kcontrol_new vsense_switch
=
171 SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL
, TAS2764_VSENSE_POWER_EN
, 1, 1);
173 static const struct snd_soc_dapm_widget tas2764_dapm_widgets
[] = {
174 SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM
, 0, 0),
175 SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM
, 0, 0, &tas2764_asi1_mux
),
176 SND_SOC_DAPM_SWITCH("ISENSE", TAS2764_PWR_CTRL
, TAS2764_ISENSE_POWER_EN
,
178 SND_SOC_DAPM_SWITCH("VSENSE", TAS2764_PWR_CTRL
, TAS2764_VSENSE_POWER_EN
,
180 SND_SOC_DAPM_DAC_E("DAC", NULL
, SND_SOC_NOPM
, 0, 0, tas2764_dac_event
,
181 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
182 SND_SOC_DAPM_OUTPUT("OUT"),
183 SND_SOC_DAPM_SIGGEN("VMON"),
184 SND_SOC_DAPM_SIGGEN("IMON")
187 static const struct snd_soc_dapm_route tas2764_audio_map
[] = {
188 {"ASI1 Sel", "I2C offset", "ASI1"},
189 {"ASI1 Sel", "Left", "ASI1"},
190 {"ASI1 Sel", "Right", "ASI1"},
191 {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
192 {"DAC", NULL
, "ASI1 Sel"},
193 {"OUT", NULL
, "DAC"},
194 {"ISENSE", "Switch", "IMON"},
195 {"VSENSE", "Switch", "VMON"},
198 static int tas2764_mute(struct snd_soc_dai
*dai
, int mute
, int direction
)
200 struct snd_soc_component
*component
= dai
->component
;
203 ret
= snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
204 TAS2764_PWR_CTRL_MASK
,
205 mute
? TAS2764_PWR_CTRL_MUTE
: 0);
213 static int tas2764_set_bitwidth(struct tas2764_priv
*tas2764
, int bitwidth
)
215 struct snd_soc_component
*component
= tas2764
->component
;
221 case SNDRV_PCM_FORMAT_S16_LE
:
222 ret
= snd_soc_component_update_bits(component
,
224 TAS2764_TDM_CFG2_RXW_MASK
,
225 TAS2764_TDM_CFG2_RXW_16BITS
);
227 case SNDRV_PCM_FORMAT_S24_LE
:
228 ret
= snd_soc_component_update_bits(component
,
230 TAS2764_TDM_CFG2_RXW_MASK
,
231 TAS2764_TDM_CFG2_RXW_24BITS
);
233 case SNDRV_PCM_FORMAT_S32_LE
:
234 ret
= snd_soc_component_update_bits(component
,
236 TAS2764_TDM_CFG2_RXW_MASK
,
237 TAS2764_TDM_CFG2_RXW_32BITS
);
247 val
= snd_soc_component_read(tas2764
->component
, TAS2764_PWR_CTRL
);
251 if (val
& (1 << TAS2764_VSENSE_POWER_EN
))
254 sense_en
= TAS2764_TDM_CFG5_VSNS_ENABLE
;
256 ret
= snd_soc_component_update_bits(tas2764
->component
, TAS2764_TDM_CFG5
,
257 TAS2764_TDM_CFG5_VSNS_ENABLE
,
262 if (val
& (1 << TAS2764_ISENSE_POWER_EN
))
265 sense_en
= TAS2764_TDM_CFG6_ISNS_ENABLE
;
267 ret
= snd_soc_component_update_bits(tas2764
->component
, TAS2764_TDM_CFG6
,
268 TAS2764_TDM_CFG6_ISNS_ENABLE
,
276 static int tas2764_set_samplerate(struct tas2764_priv
*tas2764
, int samplerate
)
278 struct snd_soc_component
*component
= tas2764
->component
;
282 switch (samplerate
) {
284 ramp_rate_val
= TAS2764_TDM_CFG0_SMP_48KHZ
|
285 TAS2764_TDM_CFG0_44_1_48KHZ
;
288 ramp_rate_val
= TAS2764_TDM_CFG0_SMP_44_1KHZ
|
289 TAS2764_TDM_CFG0_44_1_48KHZ
;
292 ramp_rate_val
= TAS2764_TDM_CFG0_SMP_48KHZ
|
293 TAS2764_TDM_CFG0_88_2_96KHZ
;
296 ramp_rate_val
= TAS2764_TDM_CFG0_SMP_44_1KHZ
|
297 TAS2764_TDM_CFG0_88_2_96KHZ
;
303 ret
= snd_soc_component_update_bits(component
, TAS2764_TDM_CFG0
,
304 TAS2764_TDM_CFG0_SMP_MASK
|
305 TAS2764_TDM_CFG0_MASK
,
313 static int tas2764_hw_params(struct snd_pcm_substream
*substream
,
314 struct snd_pcm_hw_params
*params
,
315 struct snd_soc_dai
*dai
)
317 struct snd_soc_component
*component
= dai
->component
;
318 struct tas2764_priv
*tas2764
= snd_soc_component_get_drvdata(component
);
321 ret
= tas2764_set_bitwidth(tas2764
, params_format(params
));
325 return tas2764_set_samplerate(tas2764
, params_rate(params
));
328 static int tas2764_set_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
330 struct snd_soc_component
*component
= dai
->component
;
331 struct tas2764_priv
*tas2764
= snd_soc_component_get_drvdata(component
);
332 u8 tdm_rx_start_slot
= 0, asi_cfg_1
= 0;
336 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
337 case SND_SOC_DAIFMT_NB_NF
:
338 asi_cfg_1
= TAS2764_TDM_CFG1_RX_RISING
;
340 case SND_SOC_DAIFMT_IB_NF
:
341 asi_cfg_1
= TAS2764_TDM_CFG1_RX_FALLING
;
344 dev_err(tas2764
->dev
, "ASI format Inverse is not found\n");
348 ret
= snd_soc_component_update_bits(component
, TAS2764_TDM_CFG1
,
349 TAS2764_TDM_CFG1_RX_MASK
,
354 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
355 case SND_SOC_DAIFMT_I2S
:
356 case SND_SOC_DAIFMT_DSP_A
:
357 iface
= TAS2764_TDM_CFG2_SCFG_I2S
;
358 tdm_rx_start_slot
= 1;
360 case SND_SOC_DAIFMT_DSP_B
:
361 case SND_SOC_DAIFMT_LEFT_J
:
362 iface
= TAS2764_TDM_CFG2_SCFG_LEFT_J
;
363 tdm_rx_start_slot
= 0;
366 dev_err(tas2764
->dev
,
367 "DAI Format is not found, fmt=0x%x\n", fmt
);
371 ret
= snd_soc_component_update_bits(component
, TAS2764_TDM_CFG1
,
372 TAS2764_TDM_CFG1_MASK
,
373 (tdm_rx_start_slot
<< TAS2764_TDM_CFG1_51_SHIFT
));
377 ret
= snd_soc_component_update_bits(component
, TAS2764_TDM_CFG2
,
378 TAS2764_TDM_CFG2_SCFG_MASK
, iface
);
385 static int tas2764_set_dai_tdm_slot(struct snd_soc_dai
*dai
,
386 unsigned int tx_mask
,
387 unsigned int rx_mask
,
388 int slots
, int slot_width
)
390 struct snd_soc_component
*component
= dai
->component
;
391 struct tas2764_priv
*tas2764
= snd_soc_component_get_drvdata(component
);
392 int left_slot
, right_slot
;
397 if (tx_mask
== 0 || rx_mask
!= 0)
406 left_slot
= __ffs(tx_mask
);
407 tx_mask
&= ~(1 << left_slot
);
409 right_slot
= left_slot
;
411 right_slot
= __ffs(tx_mask
);
412 tx_mask
&= ~(1 << right_slot
);
416 if (tx_mask
!= 0 || left_slot
>= slots
|| right_slot
>= slots
)
419 slots_cfg
= (right_slot
<< TAS2764_TDM_CFG3_RXS_SHIFT
) | left_slot
;
421 ret
= snd_soc_component_write(component
, TAS2764_TDM_CFG3
, slots_cfg
);
425 switch (slot_width
) {
427 slot_size
= TAS2764_TDM_CFG2_RXS_16BITS
;
430 slot_size
= TAS2764_TDM_CFG2_RXS_24BITS
;
433 slot_size
= TAS2764_TDM_CFG2_RXS_32BITS
;
439 ret
= snd_soc_component_update_bits(component
, TAS2764_TDM_CFG2
,
440 TAS2764_TDM_CFG2_RXS_MASK
,
445 ret
= snd_soc_component_update_bits(component
, TAS2764_TDM_CFG5
,
446 TAS2764_TDM_CFG5_50_MASK
,
447 tas2764
->v_sense_slot
);
451 ret
= snd_soc_component_update_bits(component
, TAS2764_TDM_CFG6
,
452 TAS2764_TDM_CFG6_50_MASK
,
453 tas2764
->i_sense_slot
);
460 static struct snd_soc_dai_ops tas2764_dai_ops
= {
461 .mute_stream
= tas2764_mute
,
462 .hw_params
= tas2764_hw_params
,
463 .set_fmt
= tas2764_set_fmt
,
464 .set_tdm_slot
= tas2764_set_dai_tdm_slot
,
465 .no_capture_mute
= 1,
468 #define TAS2764_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
469 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
471 #define TAS2764_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
472 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_88200)
474 static struct snd_soc_dai_driver tas2764_dai_driver
[] = {
476 .name
= "tas2764 ASI1",
479 .stream_name
= "ASI1 Playback",
482 .rates
= TAS2764_RATES
,
483 .formats
= TAS2764_FORMATS
,
486 .stream_name
= "ASI1 Capture",
489 .rates
= TAS2764_RATES
,
490 .formats
= TAS2764_FORMATS
,
492 .ops
= &tas2764_dai_ops
,
493 .symmetric_rates
= 1,
497 static int tas2764_codec_probe(struct snd_soc_component
*component
)
499 struct tas2764_priv
*tas2764
= snd_soc_component_get_drvdata(component
);
502 tas2764
->component
= component
;
504 if (tas2764
->sdz_gpio
)
505 gpiod_set_value_cansleep(tas2764
->sdz_gpio
, 1);
507 tas2764_reset(tas2764
);
509 ret
= snd_soc_component_update_bits(tas2764
->component
, TAS2764_TDM_CFG5
,
510 TAS2764_TDM_CFG5_VSNS_ENABLE
, 0);
514 ret
= snd_soc_component_update_bits(tas2764
->component
, TAS2764_TDM_CFG6
,
515 TAS2764_TDM_CFG6_ISNS_ENABLE
, 0);
519 ret
= snd_soc_component_update_bits(component
, TAS2764_PWR_CTRL
,
520 TAS2764_PWR_CTRL_MASK
,
521 TAS2764_PWR_CTRL_MUTE
);
528 static DECLARE_TLV_DB_SCALE(tas2764_digital_tlv
, 1100, 50, 0);
529 static DECLARE_TLV_DB_SCALE(tas2764_playback_volume
, -10000, 50, 0);
531 static const struct snd_kcontrol_new tas2764_snd_controls
[] = {
532 SOC_SINGLE_TLV("Speaker Volume", TAS2764_DVC
, 0,
533 TAS2764_DVC_MAX
, 1, tas2764_playback_volume
),
534 SOC_SINGLE_TLV("Amp Gain Volume", TAS2764_CHNL_0
, 0, 0x14, 0,
535 tas2764_digital_tlv
),
538 static const struct snd_soc_component_driver soc_component_driver_tas2764
= {
539 .probe
= tas2764_codec_probe
,
540 .suspend
= tas2764_codec_suspend
,
541 .resume
= tas2764_codec_resume
,
542 .set_bias_level
= tas2764_set_bias_level
,
543 .controls
= tas2764_snd_controls
,
544 .num_controls
= ARRAY_SIZE(tas2764_snd_controls
),
545 .dapm_widgets
= tas2764_dapm_widgets
,
546 .num_dapm_widgets
= ARRAY_SIZE(tas2764_dapm_widgets
),
547 .dapm_routes
= tas2764_audio_map
,
548 .num_dapm_routes
= ARRAY_SIZE(tas2764_audio_map
),
551 .non_legacy_dai_naming
= 1,
554 static const struct reg_default tas2764_reg_defaults
[] = {
555 { TAS2764_PAGE
, 0x00 },
556 { TAS2764_SW_RST
, 0x00 },
557 { TAS2764_PWR_CTRL
, 0x1a },
558 { TAS2764_DVC
, 0x00 },
559 { TAS2764_CHNL_0
, 0x00 },
560 { TAS2764_TDM_CFG0
, 0x09 },
561 { TAS2764_TDM_CFG1
, 0x02 },
562 { TAS2764_TDM_CFG2
, 0x0a },
563 { TAS2764_TDM_CFG3
, 0x10 },
564 { TAS2764_TDM_CFG5
, 0x42 },
567 static const struct regmap_range_cfg tas2764_regmap_ranges
[] = {
570 .range_max
= 1 * 128,
571 .selector_reg
= TAS2764_PAGE
,
572 .selector_mask
= 0xff,
579 static const struct regmap_config tas2764_i2c_regmap
= {
582 .reg_defaults
= tas2764_reg_defaults
,
583 .num_reg_defaults
= ARRAY_SIZE(tas2764_reg_defaults
),
584 .cache_type
= REGCACHE_RBTREE
,
585 .ranges
= tas2764_regmap_ranges
,
586 .num_ranges
= ARRAY_SIZE(tas2764_regmap_ranges
),
587 .max_register
= 1 * 128,
590 static int tas2764_parse_dt(struct device
*dev
, struct tas2764_priv
*tas2764
)
594 tas2764
->reset_gpio
= devm_gpiod_get_optional(tas2764
->dev
, "reset",
596 if (IS_ERR(tas2764
->reset_gpio
)) {
597 if (PTR_ERR(tas2764
->reset_gpio
) == -EPROBE_DEFER
) {
598 tas2764
->reset_gpio
= NULL
;
599 return -EPROBE_DEFER
;
603 tas2764
->sdz_gpio
= devm_gpiod_get_optional(dev
, "shutdown", GPIOD_OUT_HIGH
);
604 if (IS_ERR(tas2764
->sdz_gpio
)) {
605 if (PTR_ERR(tas2764
->sdz_gpio
) == -EPROBE_DEFER
)
606 return -EPROBE_DEFER
;
608 tas2764
->sdz_gpio
= NULL
;
611 ret
= fwnode_property_read_u32(dev
->fwnode
, "ti,imon-slot-no",
612 &tas2764
->i_sense_slot
);
614 tas2764
->i_sense_slot
= 0;
616 ret
= fwnode_property_read_u32(dev
->fwnode
, "ti,vmon-slot-no",
617 &tas2764
->v_sense_slot
);
619 tas2764
->v_sense_slot
= 2;
624 static int tas2764_i2c_probe(struct i2c_client
*client
,
625 const struct i2c_device_id
*id
)
627 struct tas2764_priv
*tas2764
;
630 tas2764
= devm_kzalloc(&client
->dev
, sizeof(struct tas2764_priv
),
635 tas2764
->dev
= &client
->dev
;
636 i2c_set_clientdata(client
, tas2764
);
637 dev_set_drvdata(&client
->dev
, tas2764
);
639 tas2764
->regmap
= devm_regmap_init_i2c(client
, &tas2764_i2c_regmap
);
640 if (IS_ERR(tas2764
->regmap
)) {
641 result
= PTR_ERR(tas2764
->regmap
);
642 dev_err(&client
->dev
, "Failed to allocate register map: %d\n",
647 if (client
->dev
.of_node
) {
648 result
= tas2764_parse_dt(&client
->dev
, tas2764
);
650 dev_err(tas2764
->dev
, "%s: Failed to parse devicetree\n",
656 return devm_snd_soc_register_component(tas2764
->dev
,
657 &soc_component_driver_tas2764
,
659 ARRAY_SIZE(tas2764_dai_driver
));
662 static const struct i2c_device_id tas2764_i2c_id
[] = {
666 MODULE_DEVICE_TABLE(i2c
, tas2764_i2c_id
);
668 #if defined(CONFIG_OF)
669 static const struct of_device_id tas2764_of_match
[] = {
670 { .compatible
= "ti,tas2764" },
673 MODULE_DEVICE_TABLE(of
, tas2764_of_match
);
676 static struct i2c_driver tas2764_i2c_driver
= {
679 .of_match_table
= of_match_ptr(tas2764_of_match
),
681 .probe
= tas2764_i2c_probe
,
682 .id_table
= tas2764_i2c_id
,
684 module_i2c_driver(tas2764_i2c_driver
);
686 MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
687 MODULE_DESCRIPTION("TAS2764 I2C Smart Amplifier driver");
688 MODULE_LICENSE("GPL v2");