1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2020 The Linux Foundation. All rights reserved.
5 * lpass-hdmi.c -- ALSA SoC HDMI-CPU DAI driver for QTi LPASS HDMI
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <sound/pcm_params.h>
12 #include <linux/regmap.h>
13 #include <sound/soc.h>
14 #include <sound/soc-dai.h>
15 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "lpass-lpaif-reg.h"
19 static int lpass_hdmi_daiops_hw_params(struct snd_pcm_substream
*substream
,
20 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
22 struct lpass_data
*drvdata
= snd_soc_dai_get_drvdata(dai
);
23 snd_pcm_format_t format
= params_format(params
);
24 unsigned int rate
= params_rate(params
);
25 unsigned int channels
= params_channels(params
);
28 unsigned int word_length
;
29 unsigned int ch_sts_buf0
;
30 unsigned int ch_sts_buf1
;
31 unsigned int data_format
;
32 unsigned int sampling_freq
;
34 struct lpass_dp_metadata_ctl
*meta_ctl
= drvdata
->meta_ctl
;
35 struct lpass_sstream_ctl
*sstream_ctl
= drvdata
->sstream_ctl
;
37 bitwidth
= snd_pcm_format_width(format
);
39 dev_err(dai
->dev
, "%s invalid bit width given : %d\n",
46 word_length
= LPASS_DP_AUDIO_BITWIDTH16
;
49 word_length
= LPASS_DP_AUDIO_BITWIDTH24
;
52 dev_err(dai
->dev
, "%s invalid bit width given : %d\n",
59 sampling_freq
= LPASS_SAMPLING_FREQ32
;
62 sampling_freq
= LPASS_SAMPLING_FREQ44
;
65 sampling_freq
= LPASS_SAMPLING_FREQ48
;
68 dev_err(dai
->dev
, "%s invalid bit width given : %d\n",
72 data_format
= LPASS_DATA_FORMAT_LINEAR
;
73 ch_sts_buf0
= (((data_format
<< LPASS_DATA_FORMAT_SHIFT
) & LPASS_DATA_FORMAT_MASK
)
74 | ((sampling_freq
<< LPASS_FREQ_BIT_SHIFT
) & LPASS_FREQ_BIT_MASK
));
75 ch_sts_buf1
= (word_length
) & LPASS_WORDLENGTH_MASK
;
77 ret
= regmap_field_write(drvdata
->tx_ctl
->soft_reset
, LPASS_TX_CTL_RESET
);
81 ret
= regmap_field_write(drvdata
->tx_ctl
->soft_reset
, LPASS_TX_CTL_CLEAR
);
85 ret
= regmap_field_write(drvdata
->hdmitx_legacy_en
, LPASS_HDMITX_LEGACY_DISABLE
);
89 ret
= regmap_field_write(drvdata
->hdmitx_parity_calc_en
, HDMITX_PARITY_CALC_EN
);
93 ret
= regmap_field_write(drvdata
->vbit_ctl
->replace_vbit
, REPLACE_VBIT
);
97 ret
= regmap_field_write(drvdata
->vbit_ctl
->vbit_stream
, LINEAR_PCM_DATA
);
101 ret
= regmap_field_write(drvdata
->hdmitx_ch_msb
[0], ch_sts_buf1
);
105 ret
= regmap_field_write(drvdata
->hdmitx_ch_lsb
[0], ch_sts_buf0
);
109 ret
= regmap_field_write(drvdata
->hdmi_tx_dmactl
[0]->use_hw_chs
, HW_MODE
);
113 ret
= regmap_field_write(drvdata
->hdmi_tx_dmactl
[0]->hw_chs_sel
, SW_MODE
);
117 ret
= regmap_field_write(drvdata
->hdmi_tx_dmactl
[0]->use_hw_usr
, HW_MODE
);
121 ret
= regmap_field_write(drvdata
->hdmi_tx_dmactl
[0]->hw_usr_sel
, SW_MODE
);
125 ret
= regmap_field_write(meta_ctl
->mute
, LPASS_MUTE_ENABLE
);
129 ret
= regmap_field_write(meta_ctl
->as_sdp_cc
, channels
- 1);
133 ret
= regmap_field_write(meta_ctl
->as_sdp_ct
, LPASS_META_DEFAULT_VAL
);
137 ret
= regmap_field_write(meta_ctl
->aif_db4
, LPASS_META_DEFAULT_VAL
);
141 ret
= regmap_field_write(meta_ctl
->frequency
, sampling_freq
);
145 ret
= regmap_field_write(meta_ctl
->mst_index
, LPASS_META_DEFAULT_VAL
);
149 ret
= regmap_field_write(meta_ctl
->dptx_index
, LPASS_META_DEFAULT_VAL
);
153 ret
= regmap_field_write(sstream_ctl
->sstream_en
, LPASS_SSTREAM_DISABLE
);
157 ret
= regmap_field_write(sstream_ctl
->dma_sel
, ch
);
161 ret
= regmap_field_write(sstream_ctl
->auto_bbit_en
, LPASS_SSTREAM_DEFAULT_ENABLE
);
165 ret
= regmap_field_write(sstream_ctl
->layout
, LPASS_SSTREAM_DEFAULT_DISABLE
);
169 ret
= regmap_field_write(sstream_ctl
->layout_sp
, LPASS_LAYOUT_SP_DEFAULT
);
173 ret
= regmap_field_write(sstream_ctl
->dp_audio
, LPASS_SSTREAM_DEFAULT_ENABLE
);
177 ret
= regmap_field_write(sstream_ctl
->set_sp_on_en
, LPASS_SSTREAM_DEFAULT_ENABLE
);
181 ret
= regmap_field_write(sstream_ctl
->dp_sp_b_hw_en
, LPASS_SSTREAM_DEFAULT_ENABLE
);
185 ret
= regmap_field_write(sstream_ctl
->dp_staffing_en
, LPASS_SSTREAM_DEFAULT_ENABLE
);
192 static int lpass_hdmi_daiops_prepare(struct snd_pcm_substream
*substream
,
193 struct snd_soc_dai
*dai
)
196 struct lpass_data
*drvdata
= snd_soc_dai_get_drvdata(dai
);
198 ret
= regmap_field_write(drvdata
->sstream_ctl
->sstream_en
, LPASS_SSTREAM_ENABLE
);
202 ret
= regmap_field_write(drvdata
->meta_ctl
->mute
, LPASS_MUTE_DISABLE
);
209 static int lpass_hdmi_daiops_trigger(struct snd_pcm_substream
*substream
,
210 int cmd
, struct snd_soc_dai
*dai
)
212 struct lpass_data
*drvdata
= snd_soc_dai_get_drvdata(dai
);
213 struct lpass_dp_metadata_ctl
*meta_ctl
= drvdata
->meta_ctl
;
214 struct lpass_sstream_ctl
*sstream_ctl
= drvdata
->sstream_ctl
;
218 case SNDRV_PCM_TRIGGER_START
:
219 case SNDRV_PCM_TRIGGER_RESUME
:
220 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
221 ret
= regmap_field_write(sstream_ctl
->sstream_en
, LPASS_SSTREAM_ENABLE
);
225 ret
= regmap_field_write(meta_ctl
->mute
, LPASS_MUTE_DISABLE
);
230 case SNDRV_PCM_TRIGGER_STOP
:
231 case SNDRV_PCM_TRIGGER_SUSPEND
:
232 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
233 ret
= regmap_field_write(sstream_ctl
->sstream_en
, LPASS_SSTREAM_DISABLE
);
237 ret
= regmap_field_write(meta_ctl
->mute
, LPASS_MUTE_ENABLE
);
241 ret
= regmap_field_write(sstream_ctl
->dp_audio
, 0);
250 const struct snd_soc_dai_ops asoc_qcom_lpass_hdmi_dai_ops
= {
251 .hw_params
= lpass_hdmi_daiops_hw_params
,
252 .prepare
= lpass_hdmi_daiops_prepare
,
253 .trigger
= lpass_hdmi_daiops_trigger
,
255 EXPORT_SYMBOL_GPL(asoc_qcom_lpass_hdmi_dai_ops
);
257 MODULE_DESCRIPTION("QTi LPASS HDMI Driver");
258 MODULE_LICENSE("GPL v2");