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WIP FPC-III support
[linux/fpc-iii.git] / tools / perf / arch / x86 / util / intel-pt.c
bloba6420c64795974b42cd7bc80660209136be42d0f
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * intel_pt.c: Intel Processor Trace support
4 * Copyright (c) 2013-2015, Intel Corporation.
5 */
6
7 #include <errno.h>
8 #include <stdbool.h>
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/bitops.h>
12 #include <linux/log2.h>
13 #include <linux/zalloc.h>
14 #include <cpuid.h>
15
16 #include "../../../util/session.h"
17 #include "../../../util/event.h"
18 #include "../../../util/evlist.h"
19 #include "../../../util/evsel.h"
20 #include "../../../util/evsel_config.h"
21 #include "../../../util/cpumap.h"
22 #include "../../../util/mmap.h"
23 #include <subcmd/parse-options.h>
24 #include "../../../util/parse-events.h"
25 #include "../../../util/pmu.h"
26 #include "../../../util/debug.h"
27 #include "../../../util/auxtrace.h"
28 #include "../../../util/perf_api_probe.h"
29 #include "../../../util/record.h"
30 #include "../../../util/target.h"
31 #include "../../../util/tsc.h"
32 #include <internal/lib.h> // page_size
33 #include "../../../util/intel-pt.h"
34
35 #define KiB(x) ((x) * 1024)
36 #define MiB(x) ((x) * 1024 * 1024)
37 #define KiB_MASK(x) (KiB(x) - 1)
38 #define MiB_MASK(x) (MiB(x) - 1)
39
40 #define INTEL_PT_PSB_PERIOD_NEAR 256
41
42 struct intel_pt_snapshot_ref {
43 void *ref_buf;
44 size_t ref_offset;
45 bool wrapped;
46 };
47
48 struct intel_pt_recording {
49 struct auxtrace_record itr;
50 struct perf_pmu *intel_pt_pmu;
51 int have_sched_switch;
52 struct evlist *evlist;
53 bool snapshot_mode;
54 bool snapshot_init_done;
55 size_t snapshot_size;
56 size_t snapshot_ref_buf_size;
57 int snapshot_ref_cnt;
58 struct intel_pt_snapshot_ref *snapshot_refs;
59 size_t priv_size;
60 };
61
62 static int intel_pt_parse_terms_with_default(const char *pmu_name,
63 struct list_head *formats,
64 const char *str,
65 u64 *config)
66 {
67 struct list_head *terms;
68 struct perf_event_attr attr = { .size = 0, };
69 int err;
70
71 terms = malloc(sizeof(struct list_head));
72 if (!terms)
73 return -ENOMEM;
74
75 INIT_LIST_HEAD(terms);
76
77 err = parse_events_terms(terms, str);
78 if (err)
79 goto out_free;
80
81 attr.config = *config;
82 err = perf_pmu__config_terms(pmu_name, formats, &attr, terms, true,
83 NULL);
84 if (err)
85 goto out_free;
86
87 *config = attr.config;
88 out_free:
89 parse_events_terms__delete(terms);
90 return err;
91 }
92
93 static int intel_pt_parse_terms(const char *pmu_name, struct list_head *formats,
94 const char *str, u64 *config)
95 {
96 *config = 0;
97 return intel_pt_parse_terms_with_default(pmu_name, formats, str,
98 config);
99 }
100
101 static u64 intel_pt_masked_bits(u64 mask, u64 bits)
102 {
103 const u64 top_bit = 1ULL << 63;
104 u64 res = 0;
105 int i;
106
107 for (i = 0; i < 64; i++) {
108 if (mask & top_bit) {
109 res <<= 1;
110 if (bits & top_bit)
111 res |= 1;
112 }
113 mask <<= 1;
114 bits <<= 1;
115 }
116
117 return res;
118 }
119
120 static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str,
121 struct evlist *evlist, u64 *res)
122 {
123 struct evsel *evsel;
124 u64 mask;
125
126 *res = 0;
127
128 mask = perf_pmu__format_bits(&intel_pt_pmu->format, str);
129 if (!mask)
130 return -EINVAL;
131
132 evlist__for_each_entry(evlist, evsel) {
133 if (evsel->core.attr.type == intel_pt_pmu->type) {
134 *res = intel_pt_masked_bits(mask, evsel->core.attr.config);
135 return 0;
136 }
137 }
138
139 return -EINVAL;
140 }
141
142 static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu,
143 struct evlist *evlist)
144 {
145 u64 val;
146 int err, topa_multiple_entries;
147 size_t psb_period;
148
149 if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries",
150 "%d", &topa_multiple_entries) != 1)
151 topa_multiple_entries = 0;
152
153 /*
154 * Use caps/topa_multiple_entries to indicate early hardware that had
155 * extra frequent PSBs.
156 */
157 if (!topa_multiple_entries) {
158 psb_period = 256;
159 goto out;
160 }
161
162 err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val);
163 if (err)
164 val = 0;
165
166 psb_period = 1 << (val + 11);
167 out:
168 pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period);
169 return psb_period;
170 }
171
172 static int intel_pt_pick_bit(int bits, int target)
173 {
174 int pos, pick = -1;
175
176 for (pos = 0; bits; bits >>= 1, pos++) {
177 if (bits & 1) {
178 if (pos <= target || pick < 0)
179 pick = pos;
180 if (pos >= target)
181 break;
182 }
183 }
184
185 return pick;
186 }
187
188 static u64 intel_pt_default_config(struct perf_pmu *intel_pt_pmu)
189 {
190 char buf[256];
191 int mtc, mtc_periods = 0, mtc_period;
192 int psb_cyc, psb_periods, psb_period;
193 int pos = 0;
194 u64 config;
195 char c;
196
197 pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc");
198
199 if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc", "%d",
200 &mtc) != 1)
201 mtc = 1;
202
203 if (mtc) {
204 if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc_periods", "%x",
205 &mtc_periods) != 1)
206 mtc_periods = 0;
207 if (mtc_periods) {
208 mtc_period = intel_pt_pick_bit(mtc_periods, 3);
209 pos += scnprintf(buf + pos, sizeof(buf) - pos,
210 ",mtc,mtc_period=%d", mtc_period);
211 }
212 }
213
214 if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_cyc", "%d",
215 &psb_cyc) != 1)
216 psb_cyc = 1;
217
218 if (psb_cyc && mtc_periods) {
219 if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_periods", "%x",
220 &psb_periods) != 1)
221 psb_periods = 0;
222 if (psb_periods) {
223 psb_period = intel_pt_pick_bit(psb_periods, 3);
224 pos += scnprintf(buf + pos, sizeof(buf) - pos,
225 ",psb_period=%d", psb_period);
226 }
227 }
228
229 if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 &&
230 perf_pmu__scan_file(intel_pt_pmu, "format/branch", "%c", &c) == 1)
231 pos += scnprintf(buf + pos, sizeof(buf) - pos, ",pt,branch");
232
233 pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf);
234
235 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, buf,
236 &config);
237
238 return config;
239 }
240
241 static int intel_pt_parse_snapshot_options(struct auxtrace_record *itr,
242 struct record_opts *opts,
243 const char *str)
244 {
245 struct intel_pt_recording *ptr =
246 container_of(itr, struct intel_pt_recording, itr);
247 unsigned long long snapshot_size = 0;
248 char *endptr;
249
250 if (str) {
251 snapshot_size = strtoull(str, &endptr, 0);
252 if (*endptr || snapshot_size > SIZE_MAX)
253 return -1;
254 }
255
256 opts->auxtrace_snapshot_mode = true;
257 opts->auxtrace_snapshot_size = snapshot_size;
258
259 ptr->snapshot_size = snapshot_size;
260
261 return 0;
262 }
263
264 struct perf_event_attr *
265 intel_pt_pmu_default_config(struct perf_pmu *intel_pt_pmu)
266 {
267 struct perf_event_attr *attr;
268
269 attr = zalloc(sizeof(struct perf_event_attr));
270 if (!attr)
271 return NULL;
272
273 attr->config = intel_pt_default_config(intel_pt_pmu);
274
275 intel_pt_pmu->selectable = true;
276
277 return attr;
278 }
279
280 static const char *intel_pt_find_filter(struct evlist *evlist,
281 struct perf_pmu *intel_pt_pmu)
282 {
283 struct evsel *evsel;
284
285 evlist__for_each_entry(evlist, evsel) {
286 if (evsel->core.attr.type == intel_pt_pmu->type)
287 return evsel->filter;
288 }
289
290 return NULL;
291 }
292
293 static size_t intel_pt_filter_bytes(const char *filter)
294 {
295 size_t len = filter ? strlen(filter) : 0;
296
297 return len ? roundup(len + 1, 8) : 0;
298 }
299
300 static size_t
301 intel_pt_info_priv_size(struct auxtrace_record *itr, struct evlist *evlist)
302 {
303 struct intel_pt_recording *ptr =
304 container_of(itr, struct intel_pt_recording, itr);
305 const char *filter = intel_pt_find_filter(evlist, ptr->intel_pt_pmu);
306
307 ptr->priv_size = (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) +
308 intel_pt_filter_bytes(filter);
309
310 return ptr->priv_size;
311 }
312
313 static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d)
314 {
315 unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
316
317 __get_cpuid(0x15, &eax, &ebx, &ecx, &edx);
318 *n = ebx;
319 *d = eax;
320 }
321
322 static int intel_pt_info_fill(struct auxtrace_record *itr,
323 struct perf_session *session,
324 struct perf_record_auxtrace_info *auxtrace_info,
325 size_t priv_size)
326 {
327 struct intel_pt_recording *ptr =
328 container_of(itr, struct intel_pt_recording, itr);
329 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
330 struct perf_event_mmap_page *pc;
331 struct perf_tsc_conversion tc = { .time_mult = 0, };
332 bool cap_user_time_zero = false, per_cpu_mmaps;
333 u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit;
334 u32 tsc_ctc_ratio_n, tsc_ctc_ratio_d;
335 unsigned long max_non_turbo_ratio;
336 size_t filter_str_len;
337 const char *filter;
338 __u64 *info;
339 int err;
340
341 if (priv_size != ptr->priv_size)
342 return -EINVAL;
343
344 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
345 "tsc", &tsc_bit);
346 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
347 "noretcomp", &noretcomp_bit);
348 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
349 "mtc", &mtc_bit);
350 mtc_freq_bits = perf_pmu__format_bits(&intel_pt_pmu->format,
351 "mtc_period");
352 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
353 "cyc", &cyc_bit);
354
355 intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d);
356
357 if (perf_pmu__scan_file(intel_pt_pmu, "max_nonturbo_ratio",
358 "%lu", &max_non_turbo_ratio) != 1)
359 max_non_turbo_ratio = 0;
360
361 filter = intel_pt_find_filter(session->evlist, ptr->intel_pt_pmu);
362 filter_str_len = filter ? strlen(filter) : 0;
363
364 if (!session->evlist->core.nr_mmaps)
365 return -EINVAL;
366
367 pc = session->evlist->mmap[0].core.base;
368 if (pc) {
369 err = perf_read_tsc_conversion(pc, &tc);
370 if (err) {
371 if (err != -EOPNOTSUPP)
372 return err;
373 } else {
374 cap_user_time_zero = tc.time_mult != 0;
375 }
376 if (!cap_user_time_zero)
377 ui__warning("Intel Processor Trace: TSC not available\n");
378 }
379
380 per_cpu_mmaps = !perf_cpu_map__empty(session->evlist->core.cpus);
381
382 auxtrace_info->type = PERF_AUXTRACE_INTEL_PT;
383 auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type;
384 auxtrace_info->priv[INTEL_PT_TIME_SHIFT] = tc.time_shift;
385 auxtrace_info->priv[INTEL_PT_TIME_MULT] = tc.time_mult;
386 auxtrace_info->priv[INTEL_PT_TIME_ZERO] = tc.time_zero;
387 auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO] = cap_user_time_zero;
388 auxtrace_info->priv[INTEL_PT_TSC_BIT] = tsc_bit;
389 auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT] = noretcomp_bit;
390 auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH] = ptr->have_sched_switch;
391 auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE] = ptr->snapshot_mode;
392 auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS] = per_cpu_mmaps;
393 auxtrace_info->priv[INTEL_PT_MTC_BIT] = mtc_bit;
394 auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS] = mtc_freq_bits;
395 auxtrace_info->priv[INTEL_PT_TSC_CTC_N] = tsc_ctc_ratio_n;
396 auxtrace_info->priv[INTEL_PT_TSC_CTC_D] = tsc_ctc_ratio_d;
397 auxtrace_info->priv[INTEL_PT_CYC_BIT] = cyc_bit;
398 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO] = max_non_turbo_ratio;
399 auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] = filter_str_len;
400
401 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
402
403 if (filter_str_len) {
404 size_t len = intel_pt_filter_bytes(filter);
405
406 strncpy((char *)info, filter, len);
407 info += len >> 3;
408 }
409
410 return 0;
411 }
412
413 static int intel_pt_track_switches(struct evlist *evlist)
414 {
415 const char *sched_switch = "sched:sched_switch";
416 struct evsel *evsel;
417 int err;
418
419 if (!evlist__can_select_event(evlist, sched_switch))
420 return -EPERM;
421
422 err = parse_events(evlist, sched_switch, NULL);
423 if (err) {
424 pr_debug2("%s: failed to parse %s, error %d\n",
425 __func__, sched_switch, err);
426 return err;
427 }
428
429 evsel = evlist__last(evlist);
430
431 evsel__set_sample_bit(evsel, CPU);
432 evsel__set_sample_bit(evsel, TIME);
433
434 evsel->core.system_wide = true;
435 evsel->no_aux_samples = true;
436 evsel->immediate = true;
437
438 return 0;
439 }
440
441 static void intel_pt_valid_str(char *str, size_t len, u64 valid)
442 {
443 unsigned int val, last = 0, state = 1;
444 int p = 0;
445
446 str[0] = '\0';
447
448 for (val = 0; val <= 64; val++, valid >>= 1) {
449 if (valid & 1) {
450 last = val;
451 switch (state) {
452 case 0:
453 p += scnprintf(str + p, len - p, ",");
454 /* Fall through */
455 case 1:
456 p += scnprintf(str + p, len - p, "%u", val);
457 state = 2;
458 break;
459 case 2:
460 state = 3;
461 break;
462 case 3:
463 state = 4;
464 break;
465 default:
466 break;
467 }
468 } else {
469 switch (state) {
470 case 3:
471 p += scnprintf(str + p, len - p, ",%u", last);
472 state = 0;
473 break;
474 case 4:
475 p += scnprintf(str + p, len - p, "-%u", last);
476 state = 0;
477 break;
478 default:
479 break;
480 }
481 if (state != 1)
482 state = 0;
483 }
484 }
485 }
486
487 static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu,
488 const char *caps, const char *name,
489 const char *supported, u64 config)
490 {
491 char valid_str[256];
492 unsigned int shift;
493 unsigned long long valid;
494 u64 bits;
495 int ok;
496
497 if (perf_pmu__scan_file(intel_pt_pmu, caps, "%llx", &valid) != 1)
498 valid = 0;
499
500 if (supported &&
501 perf_pmu__scan_file(intel_pt_pmu, supported, "%d", &ok) == 1 && !ok)
502 valid = 0;
503
504 valid |= 1;
505
506 bits = perf_pmu__format_bits(&intel_pt_pmu->format, name);
507
508 config &= bits;
509
510 for (shift = 0; bits && !(bits & 1); shift++)
511 bits >>= 1;
512
513 config >>= shift;
514
515 if (config > 63)
516 goto out_err;
517
518 if (valid & (1 << config))
519 return 0;
520 out_err:
521 intel_pt_valid_str(valid_str, sizeof(valid_str), valid);
522 pr_err("Invalid %s for %s. Valid values are: %s\n",
523 name, INTEL_PT_PMU_NAME, valid_str);
524 return -EINVAL;
525 }
526
527 static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu,
528 struct evsel *evsel)
529 {
530 int err;
531 char c;
532
533 if (!evsel)
534 return 0;
535
536 /*
537 * If supported, force pass-through config term (pt=1) even if user
538 * sets pt=0, which avoids senseless kernel errors.
539 */
540 if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 &&
541 !(evsel->core.attr.config & 1)) {
542 pr_warning("pt=0 doesn't make sense, forcing pt=1\n");
543 evsel->core.attr.config |= 1;
544 }
545
546 err = intel_pt_val_config_term(intel_pt_pmu, "caps/cycle_thresholds",
547 "cyc_thresh", "caps/psb_cyc",
548 evsel->core.attr.config);
549 if (err)
550 return err;
551
552 err = intel_pt_val_config_term(intel_pt_pmu, "caps/mtc_periods",
553 "mtc_period", "caps/mtc",
554 evsel->core.attr.config);
555 if (err)
556 return err;
557
558 return intel_pt_val_config_term(intel_pt_pmu, "caps/psb_periods",
559 "psb_period", "caps/psb_cyc",
560 evsel->core.attr.config);
561 }
562
563 static void intel_pt_config_sample_mode(struct perf_pmu *intel_pt_pmu,
564 struct evsel *evsel)
565 {
566 u64 user_bits = 0, bits;
567 struct evsel_config_term *term = evsel__get_config_term(evsel, CFG_CHG);
568
569 if (term)
570 user_bits = term->val.cfg_chg;
571
572 bits = perf_pmu__format_bits(&intel_pt_pmu->format, "psb_period");
573
574 /* Did user change psb_period */
575 if (bits & user_bits)
576 return;
577
578 /* Set psb_period to 0 */
579 evsel->core.attr.config &= ~bits;
580 }
581
582 static void intel_pt_min_max_sample_sz(struct evlist *evlist,
583 size_t *min_sz, size_t *max_sz)
584 {
585 struct evsel *evsel;
586
587 evlist__for_each_entry(evlist, evsel) {
588 size_t sz = evsel->core.attr.aux_sample_size;
589
590 if (!sz)
591 continue;
592 if (min_sz && (sz < *min_sz || !*min_sz))
593 *min_sz = sz;
594 if (max_sz && sz > *max_sz)
595 *max_sz = sz;
596 }
597 }
598
599 /*
600 * Currently, there is not enough information to disambiguate different PEBS
601 * events, so only allow one.
602 */
603 static bool intel_pt_too_many_aux_output(struct evlist *evlist)
604 {
605 struct evsel *evsel;
606 int aux_output_cnt = 0;
607
608 evlist__for_each_entry(evlist, evsel)
609 aux_output_cnt += !!evsel->core.attr.aux_output;
610
611 if (aux_output_cnt > 1) {
612 pr_err(INTEL_PT_PMU_NAME " supports at most one event with aux-output\n");
613 return true;
614 }
615
616 return false;
617 }
618
619 static int intel_pt_recording_options(struct auxtrace_record *itr,
620 struct evlist *evlist,
621 struct record_opts *opts)
622 {
623 struct intel_pt_recording *ptr =
624 container_of(itr, struct intel_pt_recording, itr);
625 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
626 bool have_timing_info, need_immediate = false;
627 struct evsel *evsel, *intel_pt_evsel = NULL;
628 const struct perf_cpu_map *cpus = evlist->core.cpus;
629 bool privileged = perf_event_paranoid_check(-1);
630 u64 tsc_bit;
631 int err;
632
633 ptr->evlist = evlist;
634 ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
635
636 evlist__for_each_entry(evlist, evsel) {
637 if (evsel->core.attr.type == intel_pt_pmu->type) {
638 if (intel_pt_evsel) {
639 pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n");
640 return -EINVAL;
641 }
642 evsel->core.attr.freq = 0;
643 evsel->core.attr.sample_period = 1;
644 evsel->no_aux_samples = true;
645 intel_pt_evsel = evsel;
646 opts->full_auxtrace = true;
647 }
648 }
649
650 if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) {
651 pr_err("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n");
652 return -EINVAL;
653 }
654
655 if (opts->auxtrace_snapshot_mode && opts->auxtrace_sample_mode) {
656 pr_err("Snapshot mode (" INTEL_PT_PMU_NAME " PMU) and sample trace cannot be used together\n");
657 return -EINVAL;
658 }
659
660 if (opts->use_clockid) {
661 pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n");
662 return -EINVAL;
663 }
664
665 if (intel_pt_too_many_aux_output(evlist))
666 return -EINVAL;
667
668 if (!opts->full_auxtrace)
669 return 0;
670
671 if (opts->auxtrace_sample_mode)
672 intel_pt_config_sample_mode(intel_pt_pmu, intel_pt_evsel);
673
674 err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel);
675 if (err)
676 return err;
677
678 /* Set default sizes for snapshot mode */
679 if (opts->auxtrace_snapshot_mode) {
680 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
681
682 if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) {
683 if (privileged) {
684 opts->auxtrace_mmap_pages = MiB(4) / page_size;
685 } else {
686 opts->auxtrace_mmap_pages = KiB(128) / page_size;
687 if (opts->mmap_pages == UINT_MAX)
688 opts->mmap_pages = KiB(256) / page_size;
689 }
690 } else if (!opts->auxtrace_mmap_pages && !privileged &&
691 opts->mmap_pages == UINT_MAX) {
692 opts->mmap_pages = KiB(256) / page_size;
693 }
694 if (!opts->auxtrace_snapshot_size)
695 opts->auxtrace_snapshot_size =
696 opts->auxtrace_mmap_pages * (size_t)page_size;
697 if (!opts->auxtrace_mmap_pages) {
698 size_t sz = opts->auxtrace_snapshot_size;
699
700 sz = round_up(sz, page_size) / page_size;
701 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
702 }
703 if (opts->auxtrace_snapshot_size >
704 opts->auxtrace_mmap_pages * (size_t)page_size) {
705 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n",
706 opts->auxtrace_snapshot_size,
707 opts->auxtrace_mmap_pages * (size_t)page_size);
708 return -EINVAL;
709 }
710 if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) {
711 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n");
712 return -EINVAL;
713 }
714 pr_debug2("Intel PT snapshot size: %zu\n",
715 opts->auxtrace_snapshot_size);
716 if (psb_period &&
717 opts->auxtrace_snapshot_size <= psb_period +
718 INTEL_PT_PSB_PERIOD_NEAR)
719 ui__warning("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n",
720 opts->auxtrace_snapshot_size, psb_period);
721 }
722
723 /* Set default sizes for sample mode */
724 if (opts->auxtrace_sample_mode) {
725 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
726 size_t min_sz = 0, max_sz = 0;
727
728 intel_pt_min_max_sample_sz(evlist, &min_sz, &max_sz);
729 if (!opts->auxtrace_mmap_pages && !privileged &&
730 opts->mmap_pages == UINT_MAX)
731 opts->mmap_pages = KiB(256) / page_size;
732 if (!opts->auxtrace_mmap_pages) {
733 size_t sz = round_up(max_sz, page_size) / page_size;
734
735 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
736 }
737 if (max_sz > opts->auxtrace_mmap_pages * (size_t)page_size) {
738 pr_err("Sample size %zu must not be greater than AUX area tracing mmap size %zu\n",
739 max_sz,
740 opts->auxtrace_mmap_pages * (size_t)page_size);
741 return -EINVAL;
742 }
743 pr_debug2("Intel PT min. sample size: %zu max. sample size: %zu\n",
744 min_sz, max_sz);
745 if (psb_period &&
746 min_sz <= psb_period + INTEL_PT_PSB_PERIOD_NEAR)
747 ui__warning("Intel PT sample size (%zu) may be too small for PSB period (%zu)\n",
748 min_sz, psb_period);
749 }
750
751 /* Set default sizes for full trace mode */
752 if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) {
753 if (privileged) {
754 opts->auxtrace_mmap_pages = MiB(4) / page_size;
755 } else {
756 opts->auxtrace_mmap_pages = KiB(128) / page_size;
757 if (opts->mmap_pages == UINT_MAX)
758 opts->mmap_pages = KiB(256) / page_size;
759 }
760 }
761
762 /* Validate auxtrace_mmap_pages */
763 if (opts->auxtrace_mmap_pages) {
764 size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size;
765 size_t min_sz;
766
767 if (opts->auxtrace_snapshot_mode || opts->auxtrace_sample_mode)
768 min_sz = KiB(4);
769 else
770 min_sz = KiB(8);
771
772 if (sz < min_sz || !is_power_of_2(sz)) {
773 pr_err("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n",
774 min_sz / 1024);
775 return -EINVAL;
776 }
777 }
778
779 intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
780 "tsc", &tsc_bit);
781
782 if (opts->full_auxtrace && (intel_pt_evsel->core.attr.config & tsc_bit))
783 have_timing_info = true;
784 else
785 have_timing_info = false;
786
787 /*
788 * Per-cpu recording needs sched_switch events to distinguish different
789 * threads.
790 */
791 if (have_timing_info && !perf_cpu_map__empty(cpus) &&
792 !record_opts__no_switch_events(opts)) {
793 if (perf_can_record_switch_events()) {
794 bool cpu_wide = !target__none(&opts->target) &&
795 !target__has_task(&opts->target);
796
797 if (!cpu_wide && perf_can_record_cpu_wide()) {
798 struct evsel *switch_evsel;
799
800 err = parse_events(evlist, "dummy:u", NULL);
801 if (err)
802 return err;
803
804 switch_evsel = evlist__last(evlist);
805
806 switch_evsel->core.attr.freq = 0;
807 switch_evsel->core.attr.sample_period = 1;
808 switch_evsel->core.attr.context_switch = 1;
809
810 switch_evsel->core.system_wide = true;
811 switch_evsel->no_aux_samples = true;
812 switch_evsel->immediate = true;
813
814 evsel__set_sample_bit(switch_evsel, TID);
815 evsel__set_sample_bit(switch_evsel, TIME);
816 evsel__set_sample_bit(switch_evsel, CPU);
817 evsel__reset_sample_bit(switch_evsel, BRANCH_STACK);
818
819 opts->record_switch_events = false;
820 ptr->have_sched_switch = 3;
821 } else {
822 opts->record_switch_events = true;
823 need_immediate = true;
824 if (cpu_wide)
825 ptr->have_sched_switch = 3;
826 else
827 ptr->have_sched_switch = 2;
828 }
829 } else {
830 err = intel_pt_track_switches(evlist);
831 if (err == -EPERM)
832 pr_debug2("Unable to select sched:sched_switch\n");
833 else if (err)
834 return err;
835 else
836 ptr->have_sched_switch = 1;
837 }
838 }
839
840 if (have_timing_info && !intel_pt_evsel->core.attr.exclude_kernel &&
841 perf_can_record_text_poke_events() && perf_can_record_cpu_wide())
842 opts->text_poke = true;
843
844 if (intel_pt_evsel) {
845 /*
846 * To obtain the auxtrace buffer file descriptor, the auxtrace
847 * event must come first.
848 */
849 evlist__to_front(evlist, intel_pt_evsel);
850 /*
851 * In the case of per-cpu mmaps, we need the CPU on the
852 * AUX event.
853 */
854 if (!perf_cpu_map__empty(cpus))
855 evsel__set_sample_bit(intel_pt_evsel, CPU);
856 }
857
858 /* Add dummy event to keep tracking */
859 if (opts->full_auxtrace) {
860 struct evsel *tracking_evsel;
861
862 err = parse_events(evlist, "dummy:u", NULL);
863 if (err)
864 return err;
865
866 tracking_evsel = evlist__last(evlist);
867
868 evlist__set_tracking_event(evlist, tracking_evsel);
869
870 tracking_evsel->core.attr.freq = 0;
871 tracking_evsel->core.attr.sample_period = 1;
872
873 tracking_evsel->no_aux_samples = true;
874 if (need_immediate)
875 tracking_evsel->immediate = true;
876
877 /* In per-cpu case, always need the time of mmap events etc */
878 if (!perf_cpu_map__empty(cpus)) {
879 evsel__set_sample_bit(tracking_evsel, TIME);
880 /* And the CPU for switch events */
881 evsel__set_sample_bit(tracking_evsel, CPU);
882 }
883 evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK);
884 }
885
886 /*
887 * Warn the user when we do not have enough information to decode i.e.
888 * per-cpu with no sched_switch (except workload-only).
889 */
890 if (!ptr->have_sched_switch && !perf_cpu_map__empty(cpus) &&
891 !target__none(&opts->target) &&
892 !intel_pt_evsel->core.attr.exclude_user)
893 ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n");
894
895 return 0;
896 }
897
898 static int intel_pt_snapshot_start(struct auxtrace_record *itr)
899 {
900 struct intel_pt_recording *ptr =
901 container_of(itr, struct intel_pt_recording, itr);
902 struct evsel *evsel;
903
904 evlist__for_each_entry(ptr->evlist, evsel) {
905 if (evsel->core.attr.type == ptr->intel_pt_pmu->type)
906 return evsel__disable(evsel);
907 }
908 return -EINVAL;
909 }
910
911 static int intel_pt_snapshot_finish(struct auxtrace_record *itr)
912 {
913 struct intel_pt_recording *ptr =
914 container_of(itr, struct intel_pt_recording, itr);
915 struct evsel *evsel;
916
917 evlist__for_each_entry(ptr->evlist, evsel) {
918 if (evsel->core.attr.type == ptr->intel_pt_pmu->type)
919 return evsel__enable(evsel);
920 }
921 return -EINVAL;
922 }
923
924 static int intel_pt_alloc_snapshot_refs(struct intel_pt_recording *ptr, int idx)
925 {
926 const size_t sz = sizeof(struct intel_pt_snapshot_ref);
927 int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt * 2;
928 struct intel_pt_snapshot_ref *refs;
929
930 if (!new_cnt)
931 new_cnt = 16;
932
933 while (new_cnt <= idx)
934 new_cnt *= 2;
935
936 refs = calloc(new_cnt, sz);
937 if (!refs)
938 return -ENOMEM;
939
940 memcpy(refs, ptr->snapshot_refs, cnt * sz);
941
942 ptr->snapshot_refs = refs;
943 ptr->snapshot_ref_cnt = new_cnt;
944
945 return 0;
946 }
947
948 static void intel_pt_free_snapshot_refs(struct intel_pt_recording *ptr)
949 {
950 int i;
951
952 for (i = 0; i < ptr->snapshot_ref_cnt; i++)
953 zfree(&ptr->snapshot_refs[i].ref_buf);
954 zfree(&ptr->snapshot_refs);
955 }
956
957 static void intel_pt_recording_free(struct auxtrace_record *itr)
958 {
959 struct intel_pt_recording *ptr =
960 container_of(itr, struct intel_pt_recording, itr);
961
962 intel_pt_free_snapshot_refs(ptr);
963 free(ptr);
964 }
965
966 static int intel_pt_alloc_snapshot_ref(struct intel_pt_recording *ptr, int idx,
967 size_t snapshot_buf_size)
968 {
969 size_t ref_buf_size = ptr->snapshot_ref_buf_size;
970 void *ref_buf;
971
972 ref_buf = zalloc(ref_buf_size);
973 if (!ref_buf)
974 return -ENOMEM;
975
976 ptr->snapshot_refs[idx].ref_buf = ref_buf;
977 ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size;
978
979 return 0;
980 }
981
982 static size_t intel_pt_snapshot_ref_buf_size(struct intel_pt_recording *ptr,
983 size_t snapshot_buf_size)
984 {
985 const size_t max_size = 256 * 1024;
986 size_t buf_size = 0, psb_period;
987
988 if (ptr->snapshot_size <= 64 * 1024)
989 return 0;
990
991 psb_period = intel_pt_psb_period(ptr->intel_pt_pmu, ptr->evlist);
992 if (psb_period)
993 buf_size = psb_period * 2;
994
995 if (!buf_size || buf_size > max_size)
996 buf_size = max_size;
997
998 if (buf_size >= snapshot_buf_size)
999 return 0;
1000
1001 if (buf_size >= ptr->snapshot_size / 2)
1002 return 0;
1003
1004 return buf_size;
1005 }
1006
1007 static int intel_pt_snapshot_init(struct intel_pt_recording *ptr,
1008 size_t snapshot_buf_size)
1009 {
1010 if (ptr->snapshot_init_done)
1011 return 0;
1012
1013 ptr->snapshot_init_done = true;
1014
1015 ptr->snapshot_ref_buf_size = intel_pt_snapshot_ref_buf_size(ptr,
1016 snapshot_buf_size);
1017
1018 return 0;
1019 }
1020
1021 /**
1022 * intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer.
1023 * @buf1: first buffer
1024 * @compare_size: number of bytes to compare
1025 * @buf2: second buffer (a circular buffer)
1026 * @offs2: offset in second buffer
1027 * @buf2_size: size of second buffer
1028 *
1029 * The comparison allows for the possibility that the bytes to compare in the
1030 * circular buffer are not contiguous. It is assumed that @compare_size <=
1031 * @buf2_size. This function returns %false if the bytes are identical, %true
1032 * otherwise.
1033 */
1034 static bool intel_pt_compare_buffers(void *buf1, size_t compare_size,
1035 void *buf2, size_t offs2, size_t buf2_size)
1036 {
1037 size_t end2 = offs2 + compare_size, part_size;
1038
1039 if (end2 <= buf2_size)
1040 return memcmp(buf1, buf2 + offs2, compare_size);
1041
1042 part_size = end2 - buf2_size;
1043 if (memcmp(buf1, buf2 + offs2, part_size))
1044 return true;
1045
1046 compare_size -= part_size;
1047
1048 return memcmp(buf1 + part_size, buf2, compare_size);
1049 }
1050
1051 static bool intel_pt_compare_ref(void *ref_buf, size_t ref_offset,
1052 size_t ref_size, size_t buf_size,
1053 void *data, size_t head)
1054 {
1055 size_t ref_end = ref_offset + ref_size;
1056
1057 if (ref_end > buf_size) {
1058 if (head > ref_offset || head < ref_end - buf_size)
1059 return true;
1060 } else if (head > ref_offset && head < ref_end) {
1061 return true;
1062 }
1063
1064 return intel_pt_compare_buffers(ref_buf, ref_size, data, ref_offset,
1065 buf_size);
1066 }
1067
1068 static void intel_pt_copy_ref(void *ref_buf, size_t ref_size, size_t buf_size,
1069 void *data, size_t head)
1070 {
1071 if (head >= ref_size) {
1072 memcpy(ref_buf, data + head - ref_size, ref_size);
1073 } else {
1074 memcpy(ref_buf, data, head);
1075 ref_size -= head;
1076 memcpy(ref_buf + head, data + buf_size - ref_size, ref_size);
1077 }
1078 }
1079
1080 static bool intel_pt_wrapped(struct intel_pt_recording *ptr, int idx,
1081 struct auxtrace_mmap *mm, unsigned char *data,
1082 u64 head)
1083 {
1084 struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx];
1085 bool wrapped;
1086
1087 wrapped = intel_pt_compare_ref(ref->ref_buf, ref->ref_offset,
1088 ptr->snapshot_ref_buf_size, mm->len,
1089 data, head);
1090
1091 intel_pt_copy_ref(ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len,
1092 data, head);
1093
1094 return wrapped;
1095 }
1096
1097 static bool intel_pt_first_wrap(u64 *data, size_t buf_size)
1098 {
1099 int i, a, b;
1100
1101 b = buf_size >> 3;
1102 a = b - 512;
1103 if (a < 0)
1104 a = 0;
1105
1106 for (i = a; i < b; i++) {
1107 if (data[i])
1108 return true;
1109 }
1110
1111 return false;
1112 }
1113
1114 static int intel_pt_find_snapshot(struct auxtrace_record *itr, int idx,
1115 struct auxtrace_mmap *mm, unsigned char *data,
1116 u64 *head, u64 *old)
1117 {
1118 struct intel_pt_recording *ptr =
1119 container_of(itr, struct intel_pt_recording, itr);
1120 bool wrapped;
1121 int err;
1122
1123 pr_debug3("%s: mmap index %d old head %zu new head %zu\n",
1124 __func__, idx, (size_t)*old, (size_t)*head);
1125
1126 err = intel_pt_snapshot_init(ptr, mm->len);
1127 if (err)
1128 goto out_err;
1129
1130 if (idx >= ptr->snapshot_ref_cnt) {
1131 err = intel_pt_alloc_snapshot_refs(ptr, idx);
1132 if (err)
1133 goto out_err;
1134 }
1135
1136 if (ptr->snapshot_ref_buf_size) {
1137 if (!ptr->snapshot_refs[idx].ref_buf) {
1138 err = intel_pt_alloc_snapshot_ref(ptr, idx, mm->len);
1139 if (err)
1140 goto out_err;
1141 }
1142 wrapped = intel_pt_wrapped(ptr, idx, mm, data, *head);
1143 } else {
1144 wrapped = ptr->snapshot_refs[idx].wrapped;
1145 if (!wrapped && intel_pt_first_wrap((u64 *)data, mm->len)) {
1146 ptr->snapshot_refs[idx].wrapped = true;
1147 wrapped = true;
1148 }
1149 }
1150
1151 /*
1152 * In full trace mode 'head' continually increases. However in snapshot
1153 * mode 'head' is an offset within the buffer. Here 'old' and 'head'
1154 * are adjusted to match the full trace case which expects that 'old' is
1155 * always less than 'head'.
1156 */
1157 if (wrapped) {
1158 *old = *head;
1159 *head += mm->len;
1160 } else {
1161 if (mm->mask)
1162 *old &= mm->mask;
1163 else
1164 *old %= mm->len;
1165 if (*old > *head)
1166 *head += mm->len;
1167 }
1168
1169 pr_debug3("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n",
1170 __func__, wrapped ? "" : "not ", (size_t)*old, (size_t)*head);
1171
1172 return 0;
1173
1174 out_err:
1175 pr_err("%s: failed, error %d\n", __func__, err);
1176 return err;
1177 }
1178
1179 static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused)
1180 {
1181 return rdtsc();
1182 }
1183
1184 struct auxtrace_record *intel_pt_recording_init(int *err)
1185 {
1186 struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME);
1187 struct intel_pt_recording *ptr;
1188
1189 if (!intel_pt_pmu)
1190 return NULL;
1191
1192 if (setenv("JITDUMP_USE_ARCH_TIMESTAMP", "1", 1)) {
1193 *err = -errno;
1194 return NULL;
1195 }
1196
1197 ptr = zalloc(sizeof(struct intel_pt_recording));
1198 if (!ptr) {
1199 *err = -ENOMEM;
1200 return NULL;
1201 }
1202
1203 ptr->intel_pt_pmu = intel_pt_pmu;
1204 ptr->itr.pmu = intel_pt_pmu;
1205 ptr->itr.recording_options = intel_pt_recording_options;
1206 ptr->itr.info_priv_size = intel_pt_info_priv_size;
1207 ptr->itr.info_fill = intel_pt_info_fill;
1208 ptr->itr.free = intel_pt_recording_free;
1209 ptr->itr.snapshot_start = intel_pt_snapshot_start;
1210 ptr->itr.snapshot_finish = intel_pt_snapshot_finish;
1211 ptr->itr.find_snapshot = intel_pt_find_snapshot;
1212 ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options;
1213 ptr->itr.reference = intel_pt_reference;
1214 ptr->itr.read_finish = auxtrace_record__read_finish;
1215 /*
1216 * Decoding starts at a PSB packet. Minimum PSB period is 2K so 4K
1217 * should give at least 1 PSB per sample.
1218 */
1219 ptr->itr.default_aux_sample_size = 4096;
1220 return &ptr->itr;
1221 }
Linux with added FPC-III support