arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c

   1 /*
   2  *
   3  * Copyright (C) 2013 Texas Instruments Incorporated
   4  *
   5  * Interconnects common for AM335x and AM43x
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation version 2.
  10  *
  11  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12  * kind, whether express or implied; without even the implied warranty
  13  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/sizes.h>
  18 #include "omap_hwmod.h"
  19 #include "omap_hwmod_33xx_43xx_common_data.h"
  20
  21 /* mpu -> l3 main */
  22 struct omap_hwmod_ocp_if am33xx_mpu__l3_main = {
  23         .master         = &am33xx_mpu_hwmod,
  24         .slave          = &am33xx_l3_main_hwmod,
  25         .clk            = "dpll_mpu_m2_ck",
  26         .user           = OCP_USER_MPU,
  27 };
  28
  29 /* l3 main -> l3 s */
  30 struct omap_hwmod_ocp_if am33xx_l3_main__l3_s = {
  31         .master         = &am33xx_l3_main_hwmod,
  32         .slave          = &am33xx_l3_s_hwmod,
  33         .clk            = "l3s_gclk",
  34         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  35 };
  36
  37 /* l3 s -> l4 per/ls */
  38 struct omap_hwmod_ocp_if am33xx_l3_s__l4_ls = {
  39         .master         = &am33xx_l3_s_hwmod,
  40         .slave          = &am33xx_l4_ls_hwmod,
  41         .clk            = "l3s_gclk",
  42         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  43 };
  44
  45 /* l3 s -> l4 wkup */
  46 struct omap_hwmod_ocp_if am33xx_l3_s__l4_wkup = {
  47         .master         = &am33xx_l3_s_hwmod,
  48         .slave          = &am33xx_l4_wkup_hwmod,
  49         .clk            = "l3s_gclk",
  50         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  51 };
  52
  53 /* l3 main -> l3 instr */
  54 struct omap_hwmod_ocp_if am33xx_l3_main__l3_instr = {
  55         .master         = &am33xx_l3_main_hwmod,
  56         .slave          = &am33xx_l3_instr_hwmod,
  57         .clk            = "l3s_gclk",
  58         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  59 };
  60
  61 /* mpu -> prcm */
  62 struct omap_hwmod_ocp_if am33xx_mpu__prcm = {
  63         .master         = &am33xx_mpu_hwmod,
  64         .slave          = &am33xx_prcm_hwmod,
  65         .clk            = "dpll_mpu_m2_ck",
  66         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  67 };
  68
  69 /* l3 s -> l3 main*/
  70 struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = {
  71         .master         = &am33xx_l3_s_hwmod,
  72         .slave          = &am33xx_l3_main_hwmod,
  73         .clk            = "l3s_gclk",
  74         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  75 };
  76
  77 /* gfx -> l3 main */
  78 struct omap_hwmod_ocp_if am33xx_gfx__l3_main = {
  79         .master         = &am33xx_gfx_hwmod,
  80         .slave          = &am33xx_l3_main_hwmod,
  81         .clk            = "dpll_core_m4_ck",
  82         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  83 };
  84
  85 /* l3 main -> gfx */
  86 struct omap_hwmod_ocp_if am33xx_l3_main__gfx = {
  87         .master         = &am33xx_l3_main_hwmod,
  88         .slave          = &am33xx_gfx_hwmod,
  89         .clk            = "dpll_core_m4_ck",
  90         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  91 };
  92
  93 /* l4 wkup -> rtc */
  94 struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc = {
  95         .master         = &am33xx_l4_wkup_hwmod,
  96         .slave          = &am33xx_rtc_hwmod,
  97         .clk            = "clkdiv32k_ick",
  98         .user           = OCP_USER_MPU,
  99 };
 100
 101 /* l3s cfg -> gpmc */
 102 struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
 103         .master         = &am33xx_l3_s_hwmod,
 104         .slave          = &am33xx_gpmc_hwmod,
 105         .clk            = "l3s_gclk",
 106         .user           = OCP_USER_MPU,
 107 };
 108
 109 /* l4 per -> timer2 */
 110 struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = {
 111         .master         = &am33xx_l4_ls_hwmod,
 112         .slave          = &am33xx_timer2_hwmod,
 113         .clk            = "l4ls_gclk",
 114         .user           = OCP_USER_MPU,
 115 };
 116
 117 /* l3 main -> ocmc */
 118 struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = {
 119         .master         = &am33xx_l3_main_hwmod,
 120         .slave          = &am33xx_ocmcram_hwmod,
 121         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 122 };