1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/parisc/mm/init.c
5 * Copyright (C) 1995 Linus Torvalds
6 * Copyright 1999 SuSE GmbH
7 * changed by Philipp Rumpf
8 * Copyright 1999 Philipp Rumpf (prumpf@tux.org)
9 * Copyright 2004 Randolph Chung (tausq@debian.org)
10 * Copyright 2006-2007 Helge Deller (deller@gmx.de)
15 #include <linux/module.h>
17 #include <linux/memblock.h>
18 #include <linux/gfp.h>
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/initrd.h>
22 #include <linux/swap.h>
23 #include <linux/unistd.h>
24 #include <linux/nodemask.h> /* for node_online_map */
25 #include <linux/pagemap.h> /* for release_pages */
26 #include <linux/compat.h>
28 #include <asm/pgalloc.h>
29 #include <asm/pgtable.h>
31 #include <asm/pdc_chassis.h>
32 #include <asm/mmzone.h>
33 #include <asm/sections.h>
34 #include <asm/msgbuf.h>
35 #include <asm/sparsemem.h>
37 extern int data_start
;
38 extern void parisc_kernel_start(void); /* Kernel entry point in head.S */
40 #if CONFIG_PGTABLE_LEVELS == 3
41 /* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout
42 * with the first pmd adjacent to the pgd and below it. gcc doesn't actually
43 * guarantee that global objects will be laid out in memory in the same order
44 * as the order of declaration, so put these in different sections and use
45 * the linker script to order them. */
46 pmd_t pmd0
[PTRS_PER_PMD
] __attribute__ ((__section__ (".data..vm0.pmd"), aligned(PAGE_SIZE
)));
49 pgd_t swapper_pg_dir
[PTRS_PER_PGD
] __attribute__ ((__section__ (".data..vm0.pgd"), aligned(PAGE_SIZE
)));
50 pte_t pg0
[PT_INITIAL
* PTRS_PER_PTE
] __attribute__ ((__section__ (".data..vm0.pte"), aligned(PAGE_SIZE
)));
52 static struct resource data_resource
= {
53 .name
= "Kernel data",
54 .flags
= IORESOURCE_BUSY
| IORESOURCE_SYSTEM_RAM
,
57 static struct resource code_resource
= {
58 .name
= "Kernel code",
59 .flags
= IORESOURCE_BUSY
| IORESOURCE_SYSTEM_RAM
,
62 static struct resource pdcdata_resource
= {
63 .name
= "PDC data (Page Zero)",
66 .flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
,
69 static struct resource sysram_resources
[MAX_PHYSMEM_RANGES
] __ro_after_init
;
71 /* The following array is initialized from the firmware specific
72 * information retrieved in kernel/inventory.c.
75 physmem_range_t pmem_ranges
[MAX_PHYSMEM_RANGES
] __initdata
;
76 int npmem_ranges __initdata
;
79 #define MAX_MEM (1UL << MAX_PHYSMEM_BITS)
80 #else /* !CONFIG_64BIT */
81 #define MAX_MEM (3584U*1024U*1024U)
82 #endif /* !CONFIG_64BIT */
84 static unsigned long mem_limit __read_mostly
= MAX_MEM
;
86 static void __init
mem_limit_func(void)
91 /* We need this before __setup() functions are called */
94 for (cp
= boot_command_line
; *cp
; ) {
95 if (memcmp(cp
, "mem=", 4) == 0) {
97 limit
= memparse(cp
, &end
);
102 while (*cp
!= ' ' && *cp
)
109 if (limit
< mem_limit
)
113 #define MAX_GAP (0x40000000UL >> PAGE_SHIFT)
115 static void __init
setup_bootmem(void)
117 unsigned long mem_max
;
118 #ifndef CONFIG_SPARSEMEM
119 physmem_range_t pmem_holes
[MAX_PHYSMEM_RANGES
- 1];
122 int i
, sysram_resource_count
;
124 disable_sr_hashing(); /* Turn off space register hashing */
127 * Sort the ranges. Since the number of ranges is typically
128 * small, and performance is not an issue here, just do
129 * a simple insertion sort.
132 for (i
= 1; i
< npmem_ranges
; i
++) {
135 for (j
= i
; j
> 0; j
--) {
138 if (pmem_ranges
[j
-1].start_pfn
<
139 pmem_ranges
[j
].start_pfn
) {
143 tmp
= pmem_ranges
[j
-1];
144 pmem_ranges
[j
-1] = pmem_ranges
[j
];
145 pmem_ranges
[j
] = tmp
;
149 #ifndef CONFIG_SPARSEMEM
151 * Throw out ranges that are too far apart (controlled by
155 for (i
= 1; i
< npmem_ranges
; i
++) {
156 if (pmem_ranges
[i
].start_pfn
-
157 (pmem_ranges
[i
-1].start_pfn
+
158 pmem_ranges
[i
-1].pages
) > MAX_GAP
) {
160 printk("Large gap in memory detected (%ld pages). "
161 "Consider turning on CONFIG_SPARSEMEM\n",
162 pmem_ranges
[i
].start_pfn
-
163 (pmem_ranges
[i
-1].start_pfn
+
164 pmem_ranges
[i
-1].pages
));
170 /* Print the memory ranges */
171 pr_info("Memory Ranges:\n");
173 for (i
= 0; i
< npmem_ranges
; i
++) {
174 struct resource
*res
= &sysram_resources
[i
];
178 size
= (pmem_ranges
[i
].pages
<< PAGE_SHIFT
);
179 start
= (pmem_ranges
[i
].start_pfn
<< PAGE_SHIFT
);
180 pr_info("%2d) Start 0x%016lx End 0x%016lx Size %6ld MB\n",
181 i
, start
, start
+ (size
- 1), size
>> 20);
183 /* request memory resource */
184 res
->name
= "System RAM";
186 res
->end
= start
+ size
- 1;
187 res
->flags
= IORESOURCE_SYSTEM_RAM
| IORESOURCE_BUSY
;
188 request_resource(&iomem_resource
, res
);
191 sysram_resource_count
= npmem_ranges
;
194 * For 32 bit kernels we limit the amount of memory we can
195 * support, in order to preserve enough kernel address space
196 * for other purposes. For 64 bit kernels we don't normally
197 * limit the memory, but this mechanism can be used to
198 * artificially limit the amount of memory (and it is written
199 * to work with multiple memory ranges).
202 mem_limit_func(); /* check for "mem=" argument */
205 for (i
= 0; i
< npmem_ranges
; i
++) {
208 rsize
= pmem_ranges
[i
].pages
<< PAGE_SHIFT
;
209 if ((mem_max
+ rsize
) > mem_limit
) {
210 printk(KERN_WARNING
"Memory truncated to %ld MB\n", mem_limit
>> 20);
211 if (mem_max
== mem_limit
)
214 pmem_ranges
[i
].pages
= (mem_limit
>> PAGE_SHIFT
)
215 - (mem_max
>> PAGE_SHIFT
);
216 npmem_ranges
= i
+ 1;
224 printk(KERN_INFO
"Total Memory: %ld MB\n",mem_max
>> 20);
226 #ifndef CONFIG_SPARSEMEM
227 /* Merge the ranges, keeping track of the holes */
229 unsigned long end_pfn
;
230 unsigned long hole_pages
;
233 end_pfn
= pmem_ranges
[0].start_pfn
+ pmem_ranges
[0].pages
;
234 for (i
= 1; i
< npmem_ranges
; i
++) {
236 hole_pages
= pmem_ranges
[i
].start_pfn
- end_pfn
;
238 pmem_holes
[npmem_holes
].start_pfn
= end_pfn
;
239 pmem_holes
[npmem_holes
++].pages
= hole_pages
;
240 end_pfn
+= hole_pages
;
242 end_pfn
+= pmem_ranges
[i
].pages
;
245 pmem_ranges
[0].pages
= end_pfn
- pmem_ranges
[0].start_pfn
;
251 * Initialize and free the full range of memory in each range.
255 for (i
= 0; i
< npmem_ranges
; i
++) {
256 unsigned long start_pfn
;
257 unsigned long npages
;
261 start_pfn
= pmem_ranges
[i
].start_pfn
;
262 npages
= pmem_ranges
[i
].pages
;
264 start
= start_pfn
<< PAGE_SHIFT
;
265 size
= npages
<< PAGE_SHIFT
;
267 /* add system RAM memblock */
268 memblock_add(start
, size
);
270 if ((start_pfn
+ npages
) > max_pfn
)
271 max_pfn
= start_pfn
+ npages
;
275 * We can't use memblock top-down allocations because we only
276 * created the initial mapping up to KERNEL_INITIAL_SIZE in
277 * the assembly bootup code.
279 memblock_set_bottom_up(true);
281 /* IOMMU is always used to access "high mem" on those boxes
282 * that can support enough mem that a PCI device couldn't
283 * directly DMA to any physical addresses.
284 * ISA DMA support will need to revisit this.
286 max_low_pfn
= max_pfn
;
288 /* reserve PAGE0 pdc memory, kernel text/data/bss & bootmap */
290 #define PDC_CONSOLE_IO_IODC_SIZE 32768
292 memblock_reserve(0UL, (unsigned long)(PAGE0
->mem_free
+
293 PDC_CONSOLE_IO_IODC_SIZE
));
294 memblock_reserve(__pa(KERNEL_BINARY_TEXT_START
),
295 (unsigned long)(_end
- KERNEL_BINARY_TEXT_START
));
297 #ifndef CONFIG_SPARSEMEM
299 /* reserve the holes */
301 for (i
= 0; i
< npmem_holes
; i
++) {
302 memblock_reserve((pmem_holes
[i
].start_pfn
<< PAGE_SHIFT
),
303 (pmem_holes
[i
].pages
<< PAGE_SHIFT
));
307 #ifdef CONFIG_BLK_DEV_INITRD
309 printk(KERN_INFO
"initrd: %08lx-%08lx\n", initrd_start
, initrd_end
);
310 if (__pa(initrd_start
) < mem_max
) {
311 unsigned long initrd_reserve
;
313 if (__pa(initrd_end
) > mem_max
) {
314 initrd_reserve
= mem_max
- __pa(initrd_start
);
316 initrd_reserve
= initrd_end
- initrd_start
;
318 initrd_below_start_ok
= 1;
319 printk(KERN_INFO
"initrd: reserving %08lx-%08lx (mem_max %08lx)\n", __pa(initrd_start
), __pa(initrd_start
) + initrd_reserve
, mem_max
);
321 memblock_reserve(__pa(initrd_start
), initrd_reserve
);
326 data_resource
.start
= virt_to_phys(&data_start
);
327 data_resource
.end
= virt_to_phys(_end
) - 1;
328 code_resource
.start
= virt_to_phys(_text
);
329 code_resource
.end
= virt_to_phys(&data_start
)-1;
331 /* We don't know which region the kernel will be in, so try
334 for (i
= 0; i
< sysram_resource_count
; i
++) {
335 struct resource
*res
= &sysram_resources
[i
];
336 request_resource(res
, &code_resource
);
337 request_resource(res
, &data_resource
);
339 request_resource(&sysram_resources
[0], &pdcdata_resource
);
341 /* Initialize Page Deallocation Table (PDT) and check for bad memory. */
344 memblock_allow_resize();
348 static bool kernel_set_to_readonly
;
350 static void __init
map_pages(unsigned long start_vaddr
,
351 unsigned long start_paddr
, unsigned long size
,
352 pgprot_t pgprot
, int force
)
356 unsigned long end_paddr
;
357 unsigned long start_pmd
;
358 unsigned long start_pte
;
361 unsigned long address
;
363 unsigned long ro_start
;
364 unsigned long ro_end
;
365 unsigned long kernel_start
, kernel_end
;
367 ro_start
= __pa((unsigned long)_text
);
368 ro_end
= __pa((unsigned long)&data_start
);
369 kernel_start
= __pa((unsigned long)&__init_begin
);
370 kernel_end
= __pa((unsigned long)&_end
);
372 end_paddr
= start_paddr
+ size
;
374 /* for 2-level configuration PTRS_PER_PMD is 0 so start_pmd will be 0 */
375 start_pmd
= ((start_vaddr
>> PMD_SHIFT
) & (PTRS_PER_PMD
- 1));
376 start_pte
= ((start_vaddr
>> PAGE_SHIFT
) & (PTRS_PER_PTE
- 1));
378 address
= start_paddr
;
380 while (address
< end_paddr
) {
381 pgd_t
*pgd
= pgd_offset_k(vaddr
);
382 p4d_t
*p4d
= p4d_offset(pgd
, vaddr
);
383 pud_t
*pud
= pud_offset(p4d
, vaddr
);
385 #if CONFIG_PGTABLE_LEVELS == 3
386 if (pud_none(*pud
)) {
387 pmd
= memblock_alloc(PAGE_SIZE
<< PMD_ORDER
,
388 PAGE_SIZE
<< PMD_ORDER
);
390 panic("pmd allocation failed.\n");
391 pud_populate(NULL
, pud
, pmd
);
395 pmd
= pmd_offset(pud
, vaddr
);
396 for (tmp1
= start_pmd
; tmp1
< PTRS_PER_PMD
; tmp1
++, pmd
++) {
397 if (pmd_none(*pmd
)) {
398 pg_table
= memblock_alloc(PAGE_SIZE
, PAGE_SIZE
);
400 panic("page table allocation failed\n");
401 pmd_populate_kernel(NULL
, pmd
, pg_table
);
404 pg_table
= pte_offset_kernel(pmd
, vaddr
);
405 for (tmp2
= start_pte
; tmp2
< PTRS_PER_PTE
; tmp2
++, pg_table
++) {
412 } else if (address
< kernel_start
|| address
>= kernel_end
) {
413 /* outside kernel memory */
415 } else if (!kernel_set_to_readonly
) {
416 /* still initializing, allow writing to RO memory */
417 prot
= PAGE_KERNEL_RWX
;
419 } else if (address
>= ro_start
) {
420 /* Code (ro) and Data areas */
421 prot
= (address
< ro_end
) ?
422 PAGE_KERNEL_EXEC
: PAGE_KERNEL
;
428 pte
= __mk_pte(address
, prot
);
430 pte
= pte_mkhuge(pte
);
432 if (address
>= end_paddr
)
435 set_pte(pg_table
, pte
);
437 address
+= PAGE_SIZE
;
442 if (address
>= end_paddr
)
449 void __init
set_kernel_text_rw(int enable_read_write
)
451 unsigned long start
= (unsigned long) __init_begin
;
452 unsigned long end
= (unsigned long) &data_start
;
454 map_pages(start
, __pa(start
), end
-start
,
455 PAGE_KERNEL_RWX
, enable_read_write
? 1:0);
457 /* force the kernel to see the new page table entries */
462 void __ref
free_initmem(void)
464 unsigned long init_begin
= (unsigned long)__init_begin
;
465 unsigned long init_end
= (unsigned long)__init_end
;
466 unsigned long kernel_end
= (unsigned long)&_end
;
468 /* Remap kernel text and data, but do not touch init section yet. */
469 kernel_set_to_readonly
= true;
470 map_pages(init_end
, __pa(init_end
), kernel_end
- init_end
,
473 /* The init text pages are marked R-X. We have to
474 * flush the icache and mark them RW-
476 * This is tricky, because map_pages is in the init section.
477 * Do a dummy remap of the data section first (the data
478 * section is already PAGE_KERNEL) to pull in the TLB entries
480 map_pages(init_begin
, __pa(init_begin
), init_end
- init_begin
,
482 /* now remap at PAGE_KERNEL since the TLB is pre-primed to execute
484 map_pages(init_begin
, __pa(init_begin
), init_end
- init_begin
,
487 /* force the kernel to see the new TLB entries */
488 __flush_tlb_range(0, init_begin
, kernel_end
);
490 /* finally dump all the instructions which were cached, since the
491 * pages are no-longer executable */
492 flush_icache_range(init_begin
, init_end
);
494 free_initmem_default(POISON_FREE_INITMEM
);
496 /* set up a new led state on systems shipped LED State panel */
497 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE
);
501 #ifdef CONFIG_STRICT_KERNEL_RWX
502 void mark_rodata_ro(void)
504 /* rodata memory was already mapped with KERNEL_RO access rights by
505 pagetable_init() and map_pages(). No need to do additional stuff here */
506 unsigned long roai_size
= __end_ro_after_init
- __start_ro_after_init
;
508 pr_info("Write protected read-only-after-init data: %luk\n", roai_size
>> 10);
514 * Just an arbitrary offset to serve as a "hole" between mapping areas
515 * (between top of physical memory and a potential pcxl dma mapping
516 * area, and below the vmalloc mapping area).
518 * The current 32K value just means that there will be a 32K "hole"
519 * between mapping areas. That means that any out-of-bounds memory
520 * accesses will hopefully be caught. The vmalloc() routines leaves
521 * a hole of 4kB between each vmalloced area for the same reason.
524 /* Leave room for gateway page expansion */
525 #if KERNEL_MAP_START < GATEWAY_PAGE_SIZE
526 #error KERNEL_MAP_START is in gateway reserved region
528 #define MAP_START (KERNEL_MAP_START)
530 #define VM_MAP_OFFSET (32*1024)
531 #define SET_MAP_OFFSET(x) ((void *)(((unsigned long)(x) + VM_MAP_OFFSET) \
532 & ~(VM_MAP_OFFSET-1)))
534 void *parisc_vmalloc_start __ro_after_init
;
535 EXPORT_SYMBOL(parisc_vmalloc_start
);
538 unsigned long pcxl_dma_start __ro_after_init
;
541 void __init
mem_init(void)
543 /* Do sanity checks on IPC (compat) structures */
544 BUILD_BUG_ON(sizeof(struct ipc64_perm
) != 48);
546 BUILD_BUG_ON(sizeof(struct semid64_ds
) != 80);
547 BUILD_BUG_ON(sizeof(struct msqid64_ds
) != 104);
548 BUILD_BUG_ON(sizeof(struct shmid64_ds
) != 104);
551 BUILD_BUG_ON(sizeof(struct compat_ipc64_perm
) != sizeof(struct ipc64_perm
));
552 BUILD_BUG_ON(sizeof(struct compat_semid64_ds
) != 80);
553 BUILD_BUG_ON(sizeof(struct compat_msqid64_ds
) != 104);
554 BUILD_BUG_ON(sizeof(struct compat_shmid64_ds
) != 104);
557 /* Do sanity checks on page table constants */
558 BUILD_BUG_ON(PTE_ENTRY_SIZE
!= sizeof(pte_t
));
559 BUILD_BUG_ON(PMD_ENTRY_SIZE
!= sizeof(pmd_t
));
560 BUILD_BUG_ON(PGD_ENTRY_SIZE
!= sizeof(pgd_t
));
561 BUILD_BUG_ON(PAGE_SHIFT
+ BITS_PER_PTE
+ BITS_PER_PMD
+ BITS_PER_PGD
564 high_memory
= __va((max_pfn
<< PAGE_SHIFT
));
565 set_max_mapnr(max_low_pfn
);
569 if (boot_cpu_data
.cpu_type
== pcxl2
|| boot_cpu_data
.cpu_type
== pcxl
) {
570 pcxl_dma_start
= (unsigned long)SET_MAP_OFFSET(MAP_START
);
571 parisc_vmalloc_start
= SET_MAP_OFFSET(pcxl_dma_start
572 + PCXL_DMA_MAP_SIZE
);
575 parisc_vmalloc_start
= SET_MAP_OFFSET(MAP_START
);
577 mem_init_print_info(NULL
);
581 * Do not expose the virtual kernel memory layout to userspace.
582 * But keep code for debugging purposes.
584 printk("virtual kernel memory layout:\n"
585 " vmalloc : 0x%px - 0x%px (%4ld MB)\n"
586 " fixmap : 0x%px - 0x%px (%4ld kB)\n"
587 " memory : 0x%px - 0x%px (%4ld MB)\n"
588 " .init : 0x%px - 0x%px (%4ld kB)\n"
589 " .data : 0x%px - 0x%px (%4ld kB)\n"
590 " .text : 0x%px - 0x%px (%4ld kB)\n",
592 (void*)VMALLOC_START
, (void*)VMALLOC_END
,
593 (VMALLOC_END
- VMALLOC_START
) >> 20,
595 (void *)FIXMAP_START
, (void *)(FIXMAP_START
+ FIXMAP_SIZE
),
596 (unsigned long)(FIXMAP_SIZE
/ 1024),
598 __va(0), high_memory
,
599 ((unsigned long)high_memory
- (unsigned long)__va(0)) >> 20,
601 __init_begin
, __init_end
,
602 ((unsigned long)__init_end
- (unsigned long)__init_begin
) >> 10,
605 ((unsigned long)_edata
- (unsigned long)_etext
) >> 10,
608 ((unsigned long)_etext
- (unsigned long)_text
) >> 10);
612 unsigned long *empty_zero_page __ro_after_init
;
613 EXPORT_SYMBOL(empty_zero_page
);
616 * pagetable_init() sets up the page tables
618 * Note that gateway_init() places the Linux gateway page at page 0.
619 * Since gateway pages cannot be dereferenced this has the desirable
620 * side effect of trapping those pesky NULL-reference errors in the
623 static void __init
pagetable_init(void)
627 /* Map each physical memory range to its kernel vaddr */
629 for (range
= 0; range
< npmem_ranges
; range
++) {
630 unsigned long start_paddr
;
631 unsigned long end_paddr
;
634 start_paddr
= pmem_ranges
[range
].start_pfn
<< PAGE_SHIFT
;
635 size
= pmem_ranges
[range
].pages
<< PAGE_SHIFT
;
636 end_paddr
= start_paddr
+ size
;
638 map_pages((unsigned long)__va(start_paddr
), start_paddr
,
639 size
, PAGE_KERNEL
, 0);
642 #ifdef CONFIG_BLK_DEV_INITRD
643 if (initrd_end
&& initrd_end
> mem_limit
) {
644 printk(KERN_INFO
"initrd: mapping %08lx-%08lx\n", initrd_start
, initrd_end
);
645 map_pages(initrd_start
, __pa(initrd_start
),
646 initrd_end
- initrd_start
, PAGE_KERNEL
, 0);
650 empty_zero_page
= memblock_alloc(PAGE_SIZE
, PAGE_SIZE
);
651 if (!empty_zero_page
)
652 panic("zero page allocation failed.\n");
656 static void __init
gateway_init(void)
658 unsigned long linux_gateway_page_addr
;
659 /* FIXME: This is 'const' in order to trick the compiler
660 into not treating it as DP-relative data. */
661 extern void * const linux_gateway_page
;
663 linux_gateway_page_addr
= LINUX_GATEWAY_ADDR
& PAGE_MASK
;
666 * Setup Linux Gateway page.
668 * The Linux gateway page will reside in kernel space (on virtual
669 * page 0), so it doesn't need to be aliased into user space.
672 map_pages(linux_gateway_page_addr
, __pa(&linux_gateway_page
),
673 PAGE_SIZE
, PAGE_GATEWAY
, 1);
676 static void __init
parisc_bootmem_free(void)
678 unsigned long zones_size
[MAX_NR_ZONES
] = { 0, };
679 unsigned long holes_size
[MAX_NR_ZONES
] = { 0, };
680 unsigned long mem_start_pfn
= ~0UL, mem_end_pfn
= 0, mem_size_pfn
= 0;
683 for (i
= 0; i
< npmem_ranges
; i
++) {
684 unsigned long start
= pmem_ranges
[i
].start_pfn
;
685 unsigned long size
= pmem_ranges
[i
].pages
;
686 unsigned long end
= start
+ size
;
688 if (mem_start_pfn
> start
)
689 mem_start_pfn
= start
;
690 if (mem_end_pfn
< end
)
692 mem_size_pfn
+= size
;
695 zones_size
[0] = mem_end_pfn
- mem_start_pfn
;
696 holes_size
[0] = zones_size
[0] - mem_size_pfn
;
698 free_area_init_node(0, zones_size
, mem_start_pfn
, holes_size
);
701 void __init
paging_init(void)
706 flush_cache_all_local(); /* start with known state */
707 flush_tlb_all_local(NULL
);
710 * Mark all memblocks as present for sparsemem using
711 * memory_present() and then initialize sparsemem.
715 parisc_bootmem_free();
721 * Currently, all PA20 chips have 18 bit protection IDs, which is the
722 * limiting factor (space ids are 32 bits).
725 #define NR_SPACE_IDS 262144
730 * Currently we have a one-to-one relationship between space IDs and
731 * protection IDs. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only
732 * support 15 bit protection IDs, so that is the limiting factor.
733 * PCXT' has 18 bit protection IDs, but only 16 bit spaceids, so it's
734 * probably not worth the effort for a special case here.
737 #define NR_SPACE_IDS 32768
739 #endif /* !CONFIG_PA20 */
741 #define RECYCLE_THRESHOLD (NR_SPACE_IDS / 2)
742 #define SID_ARRAY_SIZE (NR_SPACE_IDS / (8 * sizeof(long)))
744 static unsigned long space_id
[SID_ARRAY_SIZE
] = { 1 }; /* disallow space 0 */
745 static unsigned long dirty_space_id
[SID_ARRAY_SIZE
];
746 static unsigned long space_id_index
;
747 static unsigned long free_space_ids
= NR_SPACE_IDS
- 1;
748 static unsigned long dirty_space_ids
= 0;
750 static DEFINE_SPINLOCK(sid_lock
);
752 unsigned long alloc_sid(void)
756 spin_lock(&sid_lock
);
758 if (free_space_ids
== 0) {
759 if (dirty_space_ids
!= 0) {
760 spin_unlock(&sid_lock
);
761 flush_tlb_all(); /* flush_tlb_all() calls recycle_sids() */
762 spin_lock(&sid_lock
);
764 BUG_ON(free_space_ids
== 0);
769 index
= find_next_zero_bit(space_id
, NR_SPACE_IDS
, space_id_index
);
770 space_id
[index
>> SHIFT_PER_LONG
] |= (1L << (index
& (BITS_PER_LONG
- 1)));
771 space_id_index
= index
;
773 spin_unlock(&sid_lock
);
775 return index
<< SPACEID_SHIFT
;
778 void free_sid(unsigned long spaceid
)
780 unsigned long index
= spaceid
>> SPACEID_SHIFT
;
781 unsigned long *dirty_space_offset
;
783 dirty_space_offset
= dirty_space_id
+ (index
>> SHIFT_PER_LONG
);
784 index
&= (BITS_PER_LONG
- 1);
786 spin_lock(&sid_lock
);
788 BUG_ON(*dirty_space_offset
& (1L << index
)); /* attempt to free space id twice */
790 *dirty_space_offset
|= (1L << index
);
793 spin_unlock(&sid_lock
);
798 static void get_dirty_sids(unsigned long *ndirtyptr
,unsigned long *dirty_array
)
802 /* NOTE: sid_lock must be held upon entry */
804 *ndirtyptr
= dirty_space_ids
;
805 if (dirty_space_ids
!= 0) {
806 for (i
= 0; i
< SID_ARRAY_SIZE
; i
++) {
807 dirty_array
[i
] = dirty_space_id
[i
];
808 dirty_space_id
[i
] = 0;
816 static void recycle_sids(unsigned long ndirty
,unsigned long *dirty_array
)
820 /* NOTE: sid_lock must be held upon entry */
823 for (i
= 0; i
< SID_ARRAY_SIZE
; i
++) {
824 space_id
[i
] ^= dirty_array
[i
];
827 free_space_ids
+= ndirty
;
832 #else /* CONFIG_SMP */
834 static void recycle_sids(void)
838 /* NOTE: sid_lock must be held upon entry */
840 if (dirty_space_ids
!= 0) {
841 for (i
= 0; i
< SID_ARRAY_SIZE
; i
++) {
842 space_id
[i
] ^= dirty_space_id
[i
];
843 dirty_space_id
[i
] = 0;
846 free_space_ids
+= dirty_space_ids
;
854 * flush_tlb_all() calls recycle_sids(), since whenever the entire tlb is
855 * purged, we can safely reuse the space ids that were released but
856 * not flushed from the tlb.
861 static unsigned long recycle_ndirty
;
862 static unsigned long recycle_dirty_array
[SID_ARRAY_SIZE
];
863 static unsigned int recycle_inuse
;
865 void flush_tlb_all(void)
869 __inc_irq_stat(irq_tlb_count
);
871 spin_lock(&sid_lock
);
872 if (dirty_space_ids
> RECYCLE_THRESHOLD
) {
873 BUG_ON(recycle_inuse
); /* FIXME: Use a semaphore/wait queue here */
874 get_dirty_sids(&recycle_ndirty
,recycle_dirty_array
);
878 spin_unlock(&sid_lock
);
879 on_each_cpu(flush_tlb_all_local
, NULL
, 1);
881 spin_lock(&sid_lock
);
882 recycle_sids(recycle_ndirty
,recycle_dirty_array
);
884 spin_unlock(&sid_lock
);
888 void flush_tlb_all(void)
890 __inc_irq_stat(irq_tlb_count
);
891 spin_lock(&sid_lock
);
892 flush_tlb_all_local(NULL
);
894 spin_unlock(&sid_lock
);