arch/sparc/include/asm/psr.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * psr.h: This file holds the macros for masking off various parts of
   4  *        the processor status register on the Sparc. This is valid
   5  *        for Version 8. On the V9 this is renamed to the PSTATE
   6  *        register and its members are accessed as fields like
   7  *        PSTATE.PRIV for the current CPU privilege level.
   8  *
   9  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
  10  */
  11 #ifndef __LINUX_SPARC_PSR_H
  12 #define __LINUX_SPARC_PSR_H
  13
  14 #include <uapi/asm/psr.h>
  15
  16
  17 #ifndef __ASSEMBLY__
  18 /* Get the %psr register. */
  19 static inline unsigned int get_psr(void)
  20 {
  21         unsigned int psr;
  22         __asm__ __volatile__(
  23                 "rd     %%psr, %0\n\t"
  24                 "nop\n\t"
  25                 "nop\n\t"
  26                 "nop\n\t"
  27         : "=r" (psr)
  28         : /* no inputs */
  29         : "memory");
  30
  31         return psr;
  32 }
  33
  34 static inline void put_psr(unsigned int new_psr)
  35 {
  36         __asm__ __volatile__(
  37                 "wr     %0, 0x0, %%psr\n\t"
  38                 "nop\n\t"
  39                 "nop\n\t"
  40                 "nop\n\t"
  41         : /* no outputs */
  42         : "r" (new_psr)
  43         : "memory", "cc");
  44 }
  45
  46 /* Get the %fsr register.  Be careful, make sure the floating point
  47  * enable bit is set in the %psr when you execute this or you will
  48  * incur a trap.
  49  */
  50
  51 extern unsigned int fsr_storage;
  52
  53 static inline unsigned int get_fsr(void)
  54 {
  55         unsigned int fsr = 0;
  56
  57         __asm__ __volatile__(
  58                 "st     %%fsr, %1\n\t"
  59                 "ld     %1, %0\n\t"
  60         : "=r" (fsr)
  61         : "m" (fsr_storage));
  62
  63         return fsr;
  64 }
  65
  66 #endif /* !(__ASSEMBLY__) */
  67
  68 #endif /* !(__LINUX_SPARC_PSR_H) */