arch/x86/include/asm/spinlock.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_SPINLOCK_H
   3 #define _ASM_X86_SPINLOCK_H
   4
   5 #include <linux/jump_label.h>
   6 #include <linux/atomic.h>
   7 #include <asm/page.h>
   8 #include <asm/processor.h>
   9 #include <linux/compiler.h>
  10 #include <asm/paravirt.h>
  11 #include <asm/bitops.h>
  12
  13 /*
  14  * Your basic SMP spinlocks, allowing only a single CPU anywhere
  15  *
  16  * Simple spin lock operations.  There are two variants, one clears IRQ's
  17  * on the local processor, one does not.
  18  *
  19  * These are fair FIFO ticket locks, which support up to 2^16 CPUs.
  20  *
  21  * (the type definitions are in asm/spinlock_types.h)
  22  */
  23
  24 /* How long a lock should spin before we consider blocking */
  25 #define SPIN_THRESHOLD  (1 << 15)
  26
  27 #include <asm/qspinlock.h>
  28
  29 /*
  30  * Read-write spinlocks, allowing multiple readers
  31  * but only one writer.
  32  *
  33  * NOTE! it is quite common to have readers in interrupts
  34  * but no interrupt writers. For those circumstances we
  35  * can "mix" irq-safe locks - any writer needs to get a
  36  * irq-safe write-lock, but readers can get non-irqsafe
  37  * read-locks.
  38  *
  39  * On x86, we implement read-write locks using the generic qrwlock with
  40  * x86 specific optimization.
  41  */
  42
  43 #include <asm/qrwlock.h>
  44
  45 #endif /* _ASM_X86_SPINLOCK_H */