2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/swapfile.h>
7 #include <linux/swapops.h>
8 #include <linux/kmemleak.h>
9 #include <linux/sched/task.h>
11 #include <asm/set_memory.h>
12 #include <asm/e820/api.h>
15 #include <asm/page_types.h>
16 #include <asm/sections.h>
17 #include <asm/setup.h>
18 #include <asm/tlbflush.h>
20 #include <asm/proto.h>
21 #include <asm/dma.h> /* for MAX_DMA_PFN */
22 #include <asm/microcode.h>
23 #include <asm/kaslr.h>
24 #include <asm/hypervisor.h>
25 #include <asm/cpufeature.h>
27 #include <asm/text-patching.h>
30 * We need to define the tracepoints somewhere, and tlb.c
31 * is only compied when SMP=y.
33 #define CREATE_TRACE_POINTS
34 #include <trace/events/tlb.h>
36 #include "mm_internal.h"
39 * Tables translating between page_cache_type_t and pte encoding.
41 * The default values are defined statically as minimal supported mode;
42 * WC and WT fall back to UC-. pat_init() updates these values to support
43 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
44 * for the details. Note, __early_ioremap() used during early boot-time
45 * takes pgprot_t (pte encoding) and does not use these tables.
47 * Index into __cachemode2pte_tbl[] is the cachemode.
49 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
50 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
52 uint16_t __cachemode2pte_tbl
[_PAGE_CACHE_MODE_NUM
] = {
53 [_PAGE_CACHE_MODE_WB
] = 0 | 0 ,
54 [_PAGE_CACHE_MODE_WC
] = 0 | _PAGE_PCD
,
55 [_PAGE_CACHE_MODE_UC_MINUS
] = 0 | _PAGE_PCD
,
56 [_PAGE_CACHE_MODE_UC
] = _PAGE_PWT
| _PAGE_PCD
,
57 [_PAGE_CACHE_MODE_WT
] = 0 | _PAGE_PCD
,
58 [_PAGE_CACHE_MODE_WP
] = 0 | _PAGE_PCD
,
60 EXPORT_SYMBOL(__cachemode2pte_tbl
);
62 uint8_t __pte2cachemode_tbl
[8] = {
63 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB
,
64 [__pte2cm_idx(_PAGE_PWT
| 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
65 [__pte2cm_idx( 0 | _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
66 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC
,
67 [__pte2cm_idx( 0 | 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_WB
,
68 [__pte2cm_idx(_PAGE_PWT
| 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
69 [__pte2cm_idx(0 | _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
70 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC
,
72 EXPORT_SYMBOL(__pte2cachemode_tbl
);
74 static unsigned long __initdata pgt_buf_start
;
75 static unsigned long __initdata pgt_buf_end
;
76 static unsigned long __initdata pgt_buf_top
;
78 static unsigned long min_pfn_mapped
;
80 static bool __initdata can_use_brk_pgt
= true;
83 * Pages returned are already directly mapped.
85 * Changing that is likely to break Xen, see commit:
87 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
89 * for detailed information.
91 __ref
void *alloc_low_pages(unsigned int num
)
99 order
= get_order((unsigned long)num
<< PAGE_SHIFT
);
100 return (void *)__get_free_pages(GFP_ATOMIC
| __GFP_ZERO
, order
);
103 if ((pgt_buf_end
+ num
) > pgt_buf_top
|| !can_use_brk_pgt
) {
104 unsigned long ret
= 0;
106 if (min_pfn_mapped
< max_pfn_mapped
) {
107 ret
= memblock_find_in_range(
108 min_pfn_mapped
<< PAGE_SHIFT
,
109 max_pfn_mapped
<< PAGE_SHIFT
,
110 PAGE_SIZE
* num
, PAGE_SIZE
);
113 memblock_reserve(ret
, PAGE_SIZE
* num
);
114 else if (can_use_brk_pgt
)
115 ret
= __pa(extend_brk(PAGE_SIZE
* num
, PAGE_SIZE
));
118 panic("alloc_low_pages: can not alloc memory");
120 pfn
= ret
>> PAGE_SHIFT
;
126 for (i
= 0; i
< num
; i
++) {
129 adr
= __va((pfn
+ i
) << PAGE_SHIFT
);
133 return __va(pfn
<< PAGE_SHIFT
);
137 * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
138 * With KASLR memory randomization, depending on the machine e820 memory
139 * and the PUD alignment. We may need twice more pages when KASLR memory
140 * randomization is enabled.
142 #ifndef CONFIG_RANDOMIZE_MEMORY
143 #define INIT_PGD_PAGE_COUNT 6
145 #define INIT_PGD_PAGE_COUNT 12
147 #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
148 RESERVE_BRK(early_pgt_alloc
, INIT_PGT_BUF_SIZE
);
149 void __init
early_alloc_pgt_buf(void)
151 unsigned long tables
= INIT_PGT_BUF_SIZE
;
154 base
= __pa(extend_brk(tables
, PAGE_SIZE
));
156 pgt_buf_start
= base
>> PAGE_SHIFT
;
157 pgt_buf_end
= pgt_buf_start
;
158 pgt_buf_top
= pgt_buf_start
+ (tables
>> PAGE_SHIFT
);
163 early_param_on_off("gbpages", "nogbpages", direct_gbpages
, CONFIG_X86_DIRECT_GBPAGES
);
168 unsigned page_size_mask
;
171 static int page_size_mask
;
173 static void __init
probe_page_size_mask(void)
176 * For pagealloc debugging, identity mapping will use small pages.
177 * This will simplify cpa(), which otherwise needs to support splitting
178 * large pages into small in interrupt context, etc.
180 if (boot_cpu_has(X86_FEATURE_PSE
) && !debug_pagealloc_enabled())
181 page_size_mask
|= 1 << PG_LEVEL_2M
;
185 /* Enable PSE if available */
186 if (boot_cpu_has(X86_FEATURE_PSE
))
187 cr4_set_bits_and_update_boot(X86_CR4_PSE
);
189 /* Enable PGE if available */
190 __supported_pte_mask
&= ~_PAGE_GLOBAL
;
191 if (boot_cpu_has(X86_FEATURE_PGE
)) {
192 cr4_set_bits_and_update_boot(X86_CR4_PGE
);
193 __supported_pte_mask
|= _PAGE_GLOBAL
;
196 /* By the default is everything supported: */
197 __default_kernel_pte_mask
= __supported_pte_mask
;
198 /* Except when with PTI where the kernel is mostly non-Global: */
199 if (cpu_feature_enabled(X86_FEATURE_PTI
))
200 __default_kernel_pte_mask
&= ~_PAGE_GLOBAL
;
202 /* Enable 1 GB linear kernel mappings if available: */
203 if (direct_gbpages
&& boot_cpu_has(X86_FEATURE_GBPAGES
)) {
204 printk(KERN_INFO
"Using GB pages for direct mapping\n");
205 page_size_mask
|= 1 << PG_LEVEL_1G
;
211 static void setup_pcid(void)
213 if (!IS_ENABLED(CONFIG_X86_64
))
216 if (!boot_cpu_has(X86_FEATURE_PCID
))
219 if (boot_cpu_has(X86_FEATURE_PGE
)) {
221 * This can't be cr4_set_bits_and_update_boot() -- the
222 * trampoline code can't handle CR4.PCIDE and it wouldn't
223 * do any good anyway. Despite the name,
224 * cr4_set_bits_and_update_boot() doesn't actually cause
225 * the bits in question to remain set all the way through
226 * the secondary boot asm.
228 * Instead, we brute-force it and set CR4.PCIDE manually in
231 cr4_set_bits(X86_CR4_PCIDE
);
234 * INVPCID's single-context modes (2/3) only work if we set
235 * X86_CR4_PCIDE, *and* we INVPCID support. It's unusable
236 * on systems that have X86_CR4_PCIDE clear, or that have
237 * no INVPCID support at all.
239 if (boot_cpu_has(X86_FEATURE_INVPCID
))
240 setup_force_cpu_cap(X86_FEATURE_INVPCID_SINGLE
);
243 * flush_tlb_all(), as currently implemented, won't work if
244 * PCID is on but PGE is not. Since that combination
245 * doesn't exist on real hardware, there's no reason to try
246 * to fully support it, but it's polite to avoid corrupting
247 * data if we're on an improperly configured VM.
249 setup_clear_cpu_cap(X86_FEATURE_PCID
);
254 #define NR_RANGE_MR 3
255 #else /* CONFIG_X86_64 */
256 #define NR_RANGE_MR 5
259 static int __meminit
save_mr(struct map_range
*mr
, int nr_range
,
260 unsigned long start_pfn
, unsigned long end_pfn
,
261 unsigned long page_size_mask
)
263 if (start_pfn
< end_pfn
) {
264 if (nr_range
>= NR_RANGE_MR
)
265 panic("run out of range for init_memory_mapping\n");
266 mr
[nr_range
].start
= start_pfn
<<PAGE_SHIFT
;
267 mr
[nr_range
].end
= end_pfn
<<PAGE_SHIFT
;
268 mr
[nr_range
].page_size_mask
= page_size_mask
;
276 * adjust the page_size_mask for small range to go with
277 * big page size instead small one if nearby are ram too.
279 static void __ref
adjust_range_page_size_mask(struct map_range
*mr
,
284 for (i
= 0; i
< nr_range
; i
++) {
285 if ((page_size_mask
& (1<<PG_LEVEL_2M
)) &&
286 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_2M
))) {
287 unsigned long start
= round_down(mr
[i
].start
, PMD_SIZE
);
288 unsigned long end
= round_up(mr
[i
].end
, PMD_SIZE
);
291 if ((end
>> PAGE_SHIFT
) > max_low_pfn
)
295 if (memblock_is_region_memory(start
, end
- start
))
296 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_2M
;
298 if ((page_size_mask
& (1<<PG_LEVEL_1G
)) &&
299 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_1G
))) {
300 unsigned long start
= round_down(mr
[i
].start
, PUD_SIZE
);
301 unsigned long end
= round_up(mr
[i
].end
, PUD_SIZE
);
303 if (memblock_is_region_memory(start
, end
- start
))
304 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_1G
;
309 static const char *page_size_string(struct map_range
*mr
)
311 static const char str_1g
[] = "1G";
312 static const char str_2m
[] = "2M";
313 static const char str_4m
[] = "4M";
314 static const char str_4k
[] = "4k";
316 if (mr
->page_size_mask
& (1<<PG_LEVEL_1G
))
319 * 32-bit without PAE has a 4M large page size.
320 * PG_LEVEL_2M is misnamed, but we can at least
321 * print out the right size in the string.
323 if (IS_ENABLED(CONFIG_X86_32
) &&
324 !IS_ENABLED(CONFIG_X86_PAE
) &&
325 mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
328 if (mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
334 static int __meminit
split_mem_range(struct map_range
*mr
, int nr_range
,
338 unsigned long start_pfn
, end_pfn
, limit_pfn
;
342 limit_pfn
= PFN_DOWN(end
);
344 /* head if not big page alignment ? */
345 pfn
= start_pfn
= PFN_DOWN(start
);
348 * Don't use a large page for the first 2/4MB of memory
349 * because there are often fixed size MTRRs in there
350 * and overlapping MTRRs into large pages can cause
354 end_pfn
= PFN_DOWN(PMD_SIZE
);
356 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
357 #else /* CONFIG_X86_64 */
358 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
360 if (end_pfn
> limit_pfn
)
362 if (start_pfn
< end_pfn
) {
363 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
367 /* big page (2M) range */
368 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
370 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
371 #else /* CONFIG_X86_64 */
372 end_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
373 if (end_pfn
> round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
)))
374 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
377 if (start_pfn
< end_pfn
) {
378 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
379 page_size_mask
& (1<<PG_LEVEL_2M
));
384 /* big page (1G) range */
385 start_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
386 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PUD_SIZE
));
387 if (start_pfn
< end_pfn
) {
388 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
390 ((1<<PG_LEVEL_2M
)|(1<<PG_LEVEL_1G
)));
394 /* tail is not big page (1G) alignment */
395 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
396 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
397 if (start_pfn
< end_pfn
) {
398 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
399 page_size_mask
& (1<<PG_LEVEL_2M
));
404 /* tail is not big page (2M) alignment */
407 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
410 adjust_range_page_size_mask(mr
, nr_range
);
412 /* try to merge same page size and continuous */
413 for (i
= 0; nr_range
> 1 && i
< nr_range
- 1; i
++) {
414 unsigned long old_start
;
415 if (mr
[i
].end
!= mr
[i
+1].start
||
416 mr
[i
].page_size_mask
!= mr
[i
+1].page_size_mask
)
419 old_start
= mr
[i
].start
;
420 memmove(&mr
[i
], &mr
[i
+1],
421 (nr_range
- 1 - i
) * sizeof(struct map_range
));
422 mr
[i
--].start
= old_start
;
426 for (i
= 0; i
< nr_range
; i
++)
427 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
428 mr
[i
].start
, mr
[i
].end
- 1,
429 page_size_string(&mr
[i
]));
434 struct range pfn_mapped
[E820_MAX_ENTRIES
];
437 static void add_pfn_range_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
439 nr_pfn_mapped
= add_range_with_merge(pfn_mapped
, E820_MAX_ENTRIES
,
440 nr_pfn_mapped
, start_pfn
, end_pfn
);
441 nr_pfn_mapped
= clean_sort_range(pfn_mapped
, E820_MAX_ENTRIES
);
443 max_pfn_mapped
= max(max_pfn_mapped
, end_pfn
);
445 if (start_pfn
< (1UL<<(32-PAGE_SHIFT
)))
446 max_low_pfn_mapped
= max(max_low_pfn_mapped
,
447 min(end_pfn
, 1UL<<(32-PAGE_SHIFT
)));
450 bool pfn_range_is_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
454 for (i
= 0; i
< nr_pfn_mapped
; i
++)
455 if ((start_pfn
>= pfn_mapped
[i
].start
) &&
456 (end_pfn
<= pfn_mapped
[i
].end
))
463 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
464 * This runs before bootmem is initialized and gets pages directly from
465 * the physical memory. To access them they are temporarily mapped.
467 unsigned long __ref
init_memory_mapping(unsigned long start
,
468 unsigned long end
, pgprot_t prot
)
470 struct map_range mr
[NR_RANGE_MR
];
471 unsigned long ret
= 0;
474 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
477 memset(mr
, 0, sizeof(mr
));
478 nr_range
= split_mem_range(mr
, 0, start
, end
);
480 for (i
= 0; i
< nr_range
; i
++)
481 ret
= kernel_physical_mapping_init(mr
[i
].start
, mr
[i
].end
,
482 mr
[i
].page_size_mask
,
485 add_pfn_range_mapped(start
>> PAGE_SHIFT
, ret
>> PAGE_SHIFT
);
487 return ret
>> PAGE_SHIFT
;
491 * We need to iterate through the E820 memory map and create direct mappings
492 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
493 * create direct mappings for all pfns from [0 to max_low_pfn) and
494 * [4GB to max_pfn) because of possible memory holes in high addresses
495 * that cannot be marked as UC by fixed/variable range MTRRs.
496 * Depending on the alignment of E820 ranges, this may possibly result
497 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
499 * init_mem_mapping() calls init_range_memory_mapping() with big range.
500 * That range would have hole in the middle or ends, and only ram parts
501 * will be mapped in init_range_memory_mapping().
503 static unsigned long __init
init_range_memory_mapping(
504 unsigned long r_start
,
507 unsigned long start_pfn
, end_pfn
;
508 unsigned long mapped_ram_size
= 0;
511 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
512 u64 start
= clamp_val(PFN_PHYS(start_pfn
), r_start
, r_end
);
513 u64 end
= clamp_val(PFN_PHYS(end_pfn
), r_start
, r_end
);
518 * if it is overlapping with brk pgt, we need to
519 * alloc pgt buf from memblock instead.
521 can_use_brk_pgt
= max(start
, (u64
)pgt_buf_end
<<PAGE_SHIFT
) >=
522 min(end
, (u64
)pgt_buf_top
<<PAGE_SHIFT
);
523 init_memory_mapping(start
, end
, PAGE_KERNEL
);
524 mapped_ram_size
+= end
- start
;
525 can_use_brk_pgt
= true;
528 return mapped_ram_size
;
531 static unsigned long __init
get_new_step_size(unsigned long step_size
)
534 * Initial mapped size is PMD_SIZE (2M).
535 * We can not set step_size to be PUD_SIZE (1G) yet.
536 * In worse case, when we cross the 1G boundary, and
537 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
538 * to map 1G range with PTE. Hence we use one less than the
539 * difference of page table level shifts.
541 * Don't need to worry about overflow in the top-down case, on 32bit,
542 * when step_size is 0, round_down() returns 0 for start, and that
543 * turns it into 0x100000000ULL.
544 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
545 * needs to be taken into consideration by the code below.
547 return step_size
<< (PMD_SHIFT
- PAGE_SHIFT
- 1);
551 * memory_map_top_down - Map [map_start, map_end) top down
552 * @map_start: start address of the target memory range
553 * @map_end: end address of the target memory range
555 * This function will setup direct mapping for memory range
556 * [map_start, map_end) in top-down. That said, the page tables
557 * will be allocated at the end of the memory, and we map the
558 * memory in top-down.
560 static void __init
memory_map_top_down(unsigned long map_start
,
561 unsigned long map_end
)
563 unsigned long real_end
, start
, last_start
;
564 unsigned long step_size
;
566 unsigned long mapped_ram_size
= 0;
568 /* xen has big range in reserved near end of ram, skip it at first.*/
569 addr
= memblock_find_in_range(map_start
, map_end
, PMD_SIZE
, PMD_SIZE
);
570 real_end
= addr
+ PMD_SIZE
;
572 /* step_size need to be small so pgt_buf from BRK could cover it */
573 step_size
= PMD_SIZE
;
574 max_pfn_mapped
= 0; /* will get exact value next */
575 min_pfn_mapped
= real_end
>> PAGE_SHIFT
;
576 last_start
= start
= real_end
;
579 * We start from the top (end of memory) and go to the bottom.
580 * The memblock_find_in_range() gets us a block of RAM from the
581 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
584 while (last_start
> map_start
) {
585 if (last_start
> step_size
) {
586 start
= round_down(last_start
- 1, step_size
);
587 if (start
< map_start
)
591 mapped_ram_size
+= init_range_memory_mapping(start
,
594 min_pfn_mapped
= last_start
>> PAGE_SHIFT
;
595 if (mapped_ram_size
>= step_size
)
596 step_size
= get_new_step_size(step_size
);
599 if (real_end
< map_end
)
600 init_range_memory_mapping(real_end
, map_end
);
604 * memory_map_bottom_up - Map [map_start, map_end) bottom up
605 * @map_start: start address of the target memory range
606 * @map_end: end address of the target memory range
608 * This function will setup direct mapping for memory range
609 * [map_start, map_end) in bottom-up. Since we have limited the
610 * bottom-up allocation above the kernel, the page tables will
611 * be allocated just above the kernel and we map the memory
612 * in [map_start, map_end) in bottom-up.
614 static void __init
memory_map_bottom_up(unsigned long map_start
,
615 unsigned long map_end
)
617 unsigned long next
, start
;
618 unsigned long mapped_ram_size
= 0;
619 /* step_size need to be small so pgt_buf from BRK could cover it */
620 unsigned long step_size
= PMD_SIZE
;
623 min_pfn_mapped
= start
>> PAGE_SHIFT
;
626 * We start from the bottom (@map_start) and go to the top (@map_end).
627 * The memblock_find_in_range() gets us a block of RAM from the
628 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
631 while (start
< map_end
) {
632 if (step_size
&& map_end
- start
> step_size
) {
633 next
= round_up(start
+ 1, step_size
);
640 mapped_ram_size
+= init_range_memory_mapping(start
, next
);
643 if (mapped_ram_size
>= step_size
)
644 step_size
= get_new_step_size(step_size
);
648 void __init
init_mem_mapping(void)
652 pti_check_boottime_disable();
653 probe_page_size_mask();
657 end
= max_pfn
<< PAGE_SHIFT
;
659 end
= max_low_pfn
<< PAGE_SHIFT
;
662 /* the ISA range is always mapped regardless of memory holes */
663 init_memory_mapping(0, ISA_END_ADDRESS
, PAGE_KERNEL
);
665 /* Init the trampoline, possibly with KASLR memory offset */
669 * If the allocation is in bottom-up direction, we setup direct mapping
670 * in bottom-up, otherwise we setup direct mapping in top-down.
672 if (memblock_bottom_up()) {
673 unsigned long kernel_end
= __pa_symbol(_end
);
676 * we need two separate calls here. This is because we want to
677 * allocate page tables above the kernel. So we first map
678 * [kernel_end, end) to make memory above the kernel be mapped
679 * as soon as possible. And then use page tables allocated above
680 * the kernel to map [ISA_END_ADDRESS, kernel_end).
682 memory_map_bottom_up(kernel_end
, end
);
683 memory_map_bottom_up(ISA_END_ADDRESS
, kernel_end
);
685 memory_map_top_down(ISA_END_ADDRESS
, end
);
689 if (max_pfn
> max_low_pfn
) {
690 /* can we preseve max_low_pfn ?*/
691 max_low_pfn
= max_pfn
;
694 early_ioremap_page_table_range_init();
697 load_cr3(swapper_pg_dir
);
700 x86_init
.hyper
.init_mem_mapping();
702 early_memtest(0, max_pfn_mapped
<< PAGE_SHIFT
);
706 * Initialize an mm_struct to be used during poking and a pointer to be used
709 void __init
poking_init(void)
714 poking_mm
= copy_init_mm();
718 * Randomize the poking address, but make sure that the following page
719 * will be mapped at the same PMD. We need 2 pages, so find space for 3,
720 * and adjust the address if the PMD ends after the first one.
722 poking_addr
= TASK_UNMAPPED_BASE
;
723 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE
))
724 poking_addr
+= (kaslr_get_random_long("Poking") & PAGE_MASK
) %
725 (TASK_SIZE
- TASK_UNMAPPED_BASE
- 3 * PAGE_SIZE
);
727 if (((poking_addr
+ PAGE_SIZE
) & ~PMD_MASK
) == 0)
728 poking_addr
+= PAGE_SIZE
;
731 * We need to trigger the allocation of the page-tables that will be
732 * needed for poking now. Later, poking may be performed in an atomic
733 * section, which might cause allocation to fail.
735 ptep
= get_locked_pte(poking_mm
, poking_addr
, &ptl
);
737 pte_unmap_unlock(ptep
, ptl
);
741 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
742 * is valid. The argument is a physical page number.
744 * On x86, access has to be given to the first megabyte of RAM because that
745 * area traditionally contains BIOS code and data regions used by X, dosemu,
746 * and similar apps. Since they map the entire memory range, the whole range
747 * must be allowed (for mapping), but any areas that would otherwise be
748 * disallowed are flagged as being "zero filled" instead of rejected.
749 * Access has to be given to non-kernel-ram areas as well, these contain the
750 * PCI mmio resources as well as potential bios/acpi data regions.
752 int devmem_is_allowed(unsigned long pagenr
)
754 if (region_intersects(PFN_PHYS(pagenr
), PAGE_SIZE
,
755 IORESOURCE_SYSTEM_RAM
, IORES_DESC_NONE
)
756 != REGION_DISJOINT
) {
758 * For disallowed memory regions in the low 1MB range,
759 * request that the page be shown as all zeros.
768 * This must follow RAM test, since System RAM is considered a
769 * restricted resource under CONFIG_STRICT_IOMEM.
771 if (iomem_is_exclusive(pagenr
<< PAGE_SHIFT
)) {
772 /* Low 1MB bypasses iomem restrictions. */
782 void free_init_pages(const char *what
, unsigned long begin
, unsigned long end
)
784 unsigned long begin_aligned
, end_aligned
;
786 /* Make sure boundaries are page aligned */
787 begin_aligned
= PAGE_ALIGN(begin
);
788 end_aligned
= end
& PAGE_MASK
;
790 if (WARN_ON(begin_aligned
!= begin
|| end_aligned
!= end
)) {
791 begin
= begin_aligned
;
799 * If debugging page accesses then do not free this memory but
800 * mark them not present - any buggy init-section access will
801 * create a kernel page fault:
803 if (debug_pagealloc_enabled()) {
804 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
807 * Inform kmemleak about the hole in the memory since the
808 * corresponding pages will be unmapped.
810 kmemleak_free_part((void *)begin
, end
- begin
);
811 set_memory_np(begin
, (end
- begin
) >> PAGE_SHIFT
);
814 * We just marked the kernel text read only above, now that
815 * we are going to free part of that, we need to make that
816 * writeable and non-executable first.
818 set_memory_nx(begin
, (end
- begin
) >> PAGE_SHIFT
);
819 set_memory_rw(begin
, (end
- begin
) >> PAGE_SHIFT
);
821 free_reserved_area((void *)begin
, (void *)end
,
822 POISON_FREE_INITMEM
, what
);
827 * begin/end can be in the direct map or the "high kernel mapping"
828 * used for the kernel image only. free_init_pages() will do the
829 * right thing for either kind of address.
831 void free_kernel_image_pages(const char *what
, void *begin
, void *end
)
833 unsigned long begin_ul
= (unsigned long)begin
;
834 unsigned long end_ul
= (unsigned long)end
;
835 unsigned long len_pages
= (end_ul
- begin_ul
) >> PAGE_SHIFT
;
837 free_init_pages(what
, begin_ul
, end_ul
);
840 * PTI maps some of the kernel into userspace. For performance,
841 * this includes some kernel areas that do not contain secrets.
842 * Those areas might be adjacent to the parts of the kernel image
843 * being freed, which may contain secrets. Remove the "high kernel
844 * image mapping" for these freed areas, ensuring they are not even
845 * potentially vulnerable to Meltdown regardless of the specific
846 * optimizations PTI is currently using.
848 * The "noalias" prevents unmapping the direct map alias which is
849 * needed to access the freed pages.
851 * This is only valid for 64bit kernels. 32bit has only one mapping
852 * which can't be treated in this way for obvious reasons.
854 if (IS_ENABLED(CONFIG_X86_64
) && cpu_feature_enabled(X86_FEATURE_PTI
))
855 set_memory_np_noalias(begin_ul
, len_pages
);
858 void __weak
mem_encrypt_free_decrypted_mem(void) { }
860 void __ref
free_initmem(void)
862 e820__reallocate_tables();
864 mem_encrypt_free_decrypted_mem();
866 free_kernel_image_pages("unused kernel image (initmem)",
867 &__init_begin
, &__init_end
);
870 #ifdef CONFIG_BLK_DEV_INITRD
871 void __init
free_initrd_mem(unsigned long start
, unsigned long end
)
874 * end could be not aligned, and We can not align that,
875 * decompresser could be confused by aligned initrd_end
876 * We already reserve the end partial page before in
877 * - i386_start_kernel()
878 * - x86_64_start_kernel()
879 * - relocate_initrd()
880 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
882 free_init_pages("initrd", start
, PAGE_ALIGN(end
));
887 * Calculate the precise size of the DMA zone (first 16 MB of RAM),
888 * and pass it to the MM layer - to help it set zone watermarks more
891 * Done on 64-bit systems only for the time being, although 32-bit systems
892 * might benefit from this as well.
894 void __init
memblock_find_dma_reserve(void)
897 u64 nr_pages
= 0, nr_free_pages
= 0;
898 unsigned long start_pfn
, end_pfn
;
899 phys_addr_t start_addr
, end_addr
;
904 * Iterate over all memory ranges (free and reserved ones alike),
905 * to calculate the total number of pages in the first 16 MB of RAM:
908 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
909 start_pfn
= min(start_pfn
, MAX_DMA_PFN
);
910 end_pfn
= min(end_pfn
, MAX_DMA_PFN
);
912 nr_pages
+= end_pfn
- start_pfn
;
916 * Iterate over free memory ranges to calculate the number of free
917 * pages in the DMA zone, while not counting potential partial
918 * pages at the beginning or the end of the range:
921 for_each_free_mem_range(u
, NUMA_NO_NODE
, MEMBLOCK_NONE
, &start_addr
, &end_addr
, NULL
) {
922 start_pfn
= min_t(unsigned long, PFN_UP(start_addr
), MAX_DMA_PFN
);
923 end_pfn
= min_t(unsigned long, PFN_DOWN(end_addr
), MAX_DMA_PFN
);
925 if (start_pfn
< end_pfn
)
926 nr_free_pages
+= end_pfn
- start_pfn
;
929 set_dma_reserve(nr_pages
- nr_free_pages
);
933 void __init
zone_sizes_init(void)
935 unsigned long max_zone_pfns
[MAX_NR_ZONES
];
937 memset(max_zone_pfns
, 0, sizeof(max_zone_pfns
));
939 #ifdef CONFIG_ZONE_DMA
940 max_zone_pfns
[ZONE_DMA
] = min(MAX_DMA_PFN
, max_low_pfn
);
942 #ifdef CONFIG_ZONE_DMA32
943 max_zone_pfns
[ZONE_DMA32
] = min(MAX_DMA32_PFN
, max_low_pfn
);
945 max_zone_pfns
[ZONE_NORMAL
] = max_low_pfn
;
946 #ifdef CONFIG_HIGHMEM
947 max_zone_pfns
[ZONE_HIGHMEM
] = max_pfn
;
950 free_area_init_nodes(max_zone_pfns
);
953 __visible
DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state
, cpu_tlbstate
) = {
954 .loaded_mm
= &init_mm
,
956 .cr4
= ~0UL, /* fail hard if we screw up cr4 shadow initialization */
958 EXPORT_PER_CPU_SYMBOL(cpu_tlbstate
);
960 void update_cache_mode_entry(unsigned entry
, enum page_cache_mode cache
)
962 /* entry 0 MUST be WB (hardwired to speed up translations) */
963 BUG_ON(!entry
&& cache
!= _PAGE_CACHE_MODE_WB
);
965 __cachemode2pte_tbl
[cache
] = __cm_idx2pte(entry
);
966 __pte2cachemode_tbl
[entry
] = cache
;
970 unsigned long max_swapfile_size(void)
974 pages
= generic_max_swapfile_size();
976 if (boot_cpu_has_bug(X86_BUG_L1TF
) && l1tf_mitigation
!= L1TF_MITIGATION_OFF
) {
977 /* Limit the swap file size to MAX_PA/2 for L1TF workaround */
978 unsigned long long l1tf_limit
= l1tf_pfn_limit();
980 * We encode swap offsets also with 3 bits below those for pfn
981 * which makes the usable limit higher.
983 #if CONFIG_PGTABLE_LEVELS > 2
984 l1tf_limit
<<= PAGE_SHIFT
- SWP_OFFSET_FIRST_BIT
;
986 pages
= min_t(unsigned long long, l1tf_limit
, pages
);