mmc: core: Reset HPI enabled state during re-init and in case of errors
[linux/fpc-iii.git] / drivers / net / ethernet / intel / e1000e / ptp.c
blob37c76945ad9baaf8c433669e9ef4310148255caa
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 /* PTP 1588 Hardware Clock (PHC)
5 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
6 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
7 */
9 #include "e1000.h"
11 #ifdef CONFIG_E1000E_HWTS
12 #include <linux/clocksource.h>
13 #include <linux/ktime.h>
14 #include <asm/tsc.h>
15 #endif
17 /**
18 * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
19 * @ptp: ptp clock structure
20 * @delta: Desired frequency change in parts per billion
22 * Adjust the frequency of the PHC cycle counter by the indicated delta from
23 * the base frequency.
24 **/
25 static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
27 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
28 ptp_clock_info);
29 struct e1000_hw *hw = &adapter->hw;
30 bool neg_adj = false;
31 unsigned long flags;
32 u64 adjustment;
33 u32 timinca, incvalue;
34 s32 ret_val;
36 if ((delta > ptp->max_adj) || (delta <= -1000000000))
37 return -EINVAL;
39 if (delta < 0) {
40 neg_adj = true;
41 delta = -delta;
44 /* Get the System Time Register SYSTIM base frequency */
45 ret_val = e1000e_get_base_timinca(adapter, &timinca);
46 if (ret_val)
47 return ret_val;
49 spin_lock_irqsave(&adapter->systim_lock, flags);
51 incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
53 adjustment = incvalue;
54 adjustment *= delta;
55 adjustment = div_u64(adjustment, 1000000000);
57 incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
59 timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
60 timinca |= incvalue;
62 ew32(TIMINCA, timinca);
64 adapter->ptp_delta = delta;
66 spin_unlock_irqrestore(&adapter->systim_lock, flags);
68 return 0;
71 /**
72 * e1000e_phc_adjtime - Shift the time of the hardware clock
73 * @ptp: ptp clock structure
74 * @delta: Desired change in nanoseconds
76 * Adjust the timer by resetting the timecounter structure.
77 **/
78 static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
80 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
81 ptp_clock_info);
82 unsigned long flags;
84 spin_lock_irqsave(&adapter->systim_lock, flags);
85 timecounter_adjtime(&adapter->tc, delta);
86 spin_unlock_irqrestore(&adapter->systim_lock, flags);
88 return 0;
91 #ifdef CONFIG_E1000E_HWTS
92 #define MAX_HW_WAIT_COUNT (3)
94 /**
95 * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
96 * @device: current device time
97 * @system: system counter value read synchronously with device time
98 * @ctx: context provided by timekeeping code
100 * Read device and system (ART) clock simultaneously and return the corrected
101 * clock values in ns.
103 static int e1000e_phc_get_syncdevicetime(ktime_t *device,
104 struct system_counterval_t *system,
105 void *ctx)
107 struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
108 struct e1000_hw *hw = &adapter->hw;
109 unsigned long flags;
110 int i;
111 u32 tsync_ctrl;
112 u64 dev_cycles;
113 u64 sys_cycles;
115 tsync_ctrl = er32(TSYNCTXCTL);
116 tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
117 E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
118 ew32(TSYNCTXCTL, tsync_ctrl);
119 for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
120 udelay(1);
121 tsync_ctrl = er32(TSYNCTXCTL);
122 if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
123 break;
126 if (i == MAX_HW_WAIT_COUNT)
127 return -ETIMEDOUT;
129 dev_cycles = er32(SYSSTMPH);
130 dev_cycles <<= 32;
131 dev_cycles |= er32(SYSSTMPL);
132 spin_lock_irqsave(&adapter->systim_lock, flags);
133 *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
134 spin_unlock_irqrestore(&adapter->systim_lock, flags);
136 sys_cycles = er32(PLTSTMPH);
137 sys_cycles <<= 32;
138 sys_cycles |= er32(PLTSTMPL);
139 *system = convert_art_to_tsc(sys_cycles);
141 return 0;
145 * e1000e_phc_getsynctime - Reads the current system/device cross timestamp
146 * @ptp: ptp clock structure
147 * @cts: structure containing timestamp
149 * Read device and system (ART) clock simultaneously and return the scaled
150 * clock values in ns.
152 static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
153 struct system_device_crosststamp *xtstamp)
155 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
156 ptp_clock_info);
158 return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
159 adapter, NULL, xtstamp);
161 #endif/*CONFIG_E1000E_HWTS*/
164 * e1000e_phc_gettime - Reads the current time from the hardware clock
165 * @ptp: ptp clock structure
166 * @ts: timespec structure to hold the current time value
168 * Read the timecounter and return the correct value in ns after converting
169 * it into a struct timespec.
171 static int e1000e_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
173 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
174 ptp_clock_info);
175 unsigned long flags;
176 u64 ns;
178 spin_lock_irqsave(&adapter->systim_lock, flags);
179 ns = timecounter_read(&adapter->tc);
180 spin_unlock_irqrestore(&adapter->systim_lock, flags);
182 *ts = ns_to_timespec64(ns);
184 return 0;
188 * e1000e_phc_settime - Set the current time on the hardware clock
189 * @ptp: ptp clock structure
190 * @ts: timespec containing the new time for the cycle counter
192 * Reset the timecounter to use a new base value instead of the kernel
193 * wall timer value.
195 static int e1000e_phc_settime(struct ptp_clock_info *ptp,
196 const struct timespec64 *ts)
198 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
199 ptp_clock_info);
200 unsigned long flags;
201 u64 ns;
203 ns = timespec64_to_ns(ts);
205 /* reset the timecounter */
206 spin_lock_irqsave(&adapter->systim_lock, flags);
207 timecounter_init(&adapter->tc, &adapter->cc, ns);
208 spin_unlock_irqrestore(&adapter->systim_lock, flags);
210 return 0;
214 * e1000e_phc_enable - enable or disable an ancillary feature
215 * @ptp: ptp clock structure
216 * @request: Desired resource to enable or disable
217 * @on: Caller passes one to enable or zero to disable
219 * Enable (or disable) ancillary features of the PHC subsystem.
220 * Currently, no ancillary features are supported.
222 static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
223 struct ptp_clock_request __always_unused *request,
224 int __always_unused on)
226 return -EOPNOTSUPP;
229 static void e1000e_systim_overflow_work(struct work_struct *work)
231 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
232 systim_overflow_work.work);
233 struct e1000_hw *hw = &adapter->hw;
234 struct timespec64 ts;
236 adapter->ptp_clock_info.gettime64(&adapter->ptp_clock_info, &ts);
238 e_dbg("SYSTIM overflow check at %lld.%09lu\n",
239 (long long) ts.tv_sec, ts.tv_nsec);
241 schedule_delayed_work(&adapter->systim_overflow_work,
242 E1000_SYSTIM_OVERFLOW_PERIOD);
245 static const struct ptp_clock_info e1000e_ptp_clock_info = {
246 .owner = THIS_MODULE,
247 .n_alarm = 0,
248 .n_ext_ts = 0,
249 .n_per_out = 0,
250 .n_pins = 0,
251 .pps = 0,
252 .adjfreq = e1000e_phc_adjfreq,
253 .adjtime = e1000e_phc_adjtime,
254 .gettime64 = e1000e_phc_gettime,
255 .settime64 = e1000e_phc_settime,
256 .enable = e1000e_phc_enable,
260 * e1000e_ptp_init - initialize PTP for devices which support it
261 * @adapter: board private structure
263 * This function performs the required steps for enabling PTP support.
264 * If PTP support has already been loaded it simply calls the cyclecounter
265 * init routine and exits.
267 void e1000e_ptp_init(struct e1000_adapter *adapter)
269 struct e1000_hw *hw = &adapter->hw;
271 adapter->ptp_clock = NULL;
273 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
274 return;
276 adapter->ptp_clock_info = e1000e_ptp_clock_info;
278 snprintf(adapter->ptp_clock_info.name,
279 sizeof(adapter->ptp_clock_info.name), "%pm",
280 adapter->netdev->perm_addr);
282 switch (hw->mac.type) {
283 case e1000_pch2lan:
284 case e1000_pch_lpt:
285 case e1000_pch_spt:
286 case e1000_pch_cnp:
287 if ((hw->mac.type < e1000_pch_lpt) ||
288 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
289 adapter->ptp_clock_info.max_adj = 24000000 - 1;
290 break;
292 /* fall-through */
293 case e1000_82574:
294 case e1000_82583:
295 adapter->ptp_clock_info.max_adj = 600000000 - 1;
296 break;
297 default:
298 break;
301 #ifdef CONFIG_E1000E_HWTS
302 /* CPU must have ART and GBe must be from Sunrise Point or greater */
303 if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
304 adapter->ptp_clock_info.getcrosststamp =
305 e1000e_phc_getcrosststamp;
306 #endif/*CONFIG_E1000E_HWTS*/
308 INIT_DELAYED_WORK(&adapter->systim_overflow_work,
309 e1000e_systim_overflow_work);
311 schedule_delayed_work(&adapter->systim_overflow_work,
312 E1000_SYSTIM_OVERFLOW_PERIOD);
314 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
315 &adapter->pdev->dev);
316 if (IS_ERR(adapter->ptp_clock)) {
317 adapter->ptp_clock = NULL;
318 e_err("ptp_clock_register failed\n");
319 } else if (adapter->ptp_clock) {
320 e_info("registered PHC clock\n");
325 * e1000e_ptp_remove - disable PTP device and stop the overflow check
326 * @adapter: board private structure
328 * Stop the PTP support, and cancel the delayed work.
330 void e1000e_ptp_remove(struct e1000_adapter *adapter)
332 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
333 return;
335 cancel_delayed_work_sync(&adapter->systim_overflow_work);
337 if (adapter->ptp_clock) {
338 ptp_clock_unregister(adapter->ptp_clock);
339 adapter->ptp_clock = NULL;
340 e_info("removed PHC\n");