mmc: core: Reset HPI enabled state during re-init and in case of errors
[linux/fpc-iii.git] / drivers / net / ethernet / renesas / ravb_ptp.c
blobdce2a40a31e336d6a45b8e393a384787743859f9
1 // SPDX-License-Identifier: GPL-2.0+
2 /* PTP 1588 clock using the Renesas Ethernet AVB
4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
5 * Copyright (C) 2015 Renesas Solutions Corp.
6 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
7 */
9 #include "ravb.h"
11 static int ravb_ptp_tcr_request(struct ravb_private *priv, u32 request)
13 struct net_device *ndev = priv->ndev;
14 int error;
16 error = ravb_wait(ndev, GCCR, GCCR_TCR, GCCR_TCR_NOREQ);
17 if (error)
18 return error;
20 ravb_modify(ndev, GCCR, request, request);
21 return ravb_wait(ndev, GCCR, GCCR_TCR, GCCR_TCR_NOREQ);
24 /* Caller must hold the lock */
25 static int ravb_ptp_time_read(struct ravb_private *priv, struct timespec64 *ts)
27 struct net_device *ndev = priv->ndev;
28 int error;
30 error = ravb_ptp_tcr_request(priv, GCCR_TCR_CAPTURE);
31 if (error)
32 return error;
34 ts->tv_nsec = ravb_read(ndev, GCT0);
35 ts->tv_sec = ravb_read(ndev, GCT1) |
36 ((s64)ravb_read(ndev, GCT2) << 32);
38 return 0;
41 /* Caller must hold the lock */
42 static int ravb_ptp_time_write(struct ravb_private *priv,
43 const struct timespec64 *ts)
45 struct net_device *ndev = priv->ndev;
46 int error;
47 u32 gccr;
49 error = ravb_ptp_tcr_request(priv, GCCR_TCR_RESET);
50 if (error)
51 return error;
53 gccr = ravb_read(ndev, GCCR);
54 if (gccr & GCCR_LTO)
55 return -EBUSY;
56 ravb_write(ndev, ts->tv_nsec, GTO0);
57 ravb_write(ndev, ts->tv_sec, GTO1);
58 ravb_write(ndev, (ts->tv_sec >> 32) & 0xffff, GTO2);
59 ravb_write(ndev, gccr | GCCR_LTO, GCCR);
61 return 0;
64 /* Caller must hold the lock */
65 static int ravb_ptp_update_compare(struct ravb_private *priv, u32 ns)
67 struct net_device *ndev = priv->ndev;
68 /* When the comparison value (GPTC.PTCV) is in range of
69 * [x-1 to x+1] (x is the configured increment value in
70 * GTI.TIV), it may happen that a comparison match is
71 * not detected when the timer wraps around.
73 u32 gti_ns_plus_1 = (priv->ptp.current_addend >> 20) + 1;
74 u32 gccr;
76 if (ns < gti_ns_plus_1)
77 ns = gti_ns_plus_1;
78 else if (ns > 0 - gti_ns_plus_1)
79 ns = 0 - gti_ns_plus_1;
81 gccr = ravb_read(ndev, GCCR);
82 if (gccr & GCCR_LPTC)
83 return -EBUSY;
84 ravb_write(ndev, ns, GPTC);
85 ravb_write(ndev, gccr | GCCR_LPTC, GCCR);
87 return 0;
90 /* PTP clock operations */
91 static int ravb_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
93 struct ravb_private *priv = container_of(ptp, struct ravb_private,
94 ptp.info);
95 struct net_device *ndev = priv->ndev;
96 unsigned long flags;
97 u32 diff, addend;
98 bool neg_adj = false;
99 u32 gccr;
101 if (ppb < 0) {
102 neg_adj = true;
103 ppb = -ppb;
105 addend = priv->ptp.default_addend;
106 diff = div_u64((u64)addend * ppb, NSEC_PER_SEC);
108 addend = neg_adj ? addend - diff : addend + diff;
110 spin_lock_irqsave(&priv->lock, flags);
112 priv->ptp.current_addend = addend;
114 gccr = ravb_read(ndev, GCCR);
115 if (gccr & GCCR_LTI) {
116 spin_unlock_irqrestore(&priv->lock, flags);
117 return -EBUSY;
119 ravb_write(ndev, addend & GTI_TIV, GTI);
120 ravb_write(ndev, gccr | GCCR_LTI, GCCR);
122 spin_unlock_irqrestore(&priv->lock, flags);
124 return 0;
127 static int ravb_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
129 struct ravb_private *priv = container_of(ptp, struct ravb_private,
130 ptp.info);
131 struct timespec64 ts;
132 unsigned long flags;
133 int error;
135 spin_lock_irqsave(&priv->lock, flags);
136 error = ravb_ptp_time_read(priv, &ts);
137 if (!error) {
138 u64 now = ktime_to_ns(timespec64_to_ktime(ts));
140 ts = ns_to_timespec64(now + delta);
141 error = ravb_ptp_time_write(priv, &ts);
143 spin_unlock_irqrestore(&priv->lock, flags);
145 return error;
148 static int ravb_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts)
150 struct ravb_private *priv = container_of(ptp, struct ravb_private,
151 ptp.info);
152 unsigned long flags;
153 int error;
155 spin_lock_irqsave(&priv->lock, flags);
156 error = ravb_ptp_time_read(priv, ts);
157 spin_unlock_irqrestore(&priv->lock, flags);
159 return error;
162 static int ravb_ptp_settime64(struct ptp_clock_info *ptp,
163 const struct timespec64 *ts)
165 struct ravb_private *priv = container_of(ptp, struct ravb_private,
166 ptp.info);
167 unsigned long flags;
168 int error;
170 spin_lock_irqsave(&priv->lock, flags);
171 error = ravb_ptp_time_write(priv, ts);
172 spin_unlock_irqrestore(&priv->lock, flags);
174 return error;
177 static int ravb_ptp_extts(struct ptp_clock_info *ptp,
178 struct ptp_extts_request *req, int on)
180 struct ravb_private *priv = container_of(ptp, struct ravb_private,
181 ptp.info);
182 struct net_device *ndev = priv->ndev;
183 unsigned long flags;
185 if (req->index)
186 return -EINVAL;
188 if (priv->ptp.extts[req->index] == on)
189 return 0;
190 priv->ptp.extts[req->index] = on;
192 spin_lock_irqsave(&priv->lock, flags);
193 if (priv->chip_id == RCAR_GEN2)
194 ravb_modify(ndev, GIC, GIC_PTCE, on ? GIC_PTCE : 0);
195 else if (on)
196 ravb_write(ndev, GIE_PTCS, GIE);
197 else
198 ravb_write(ndev, GID_PTCD, GID);
199 mmiowb();
200 spin_unlock_irqrestore(&priv->lock, flags);
202 return 0;
205 static int ravb_ptp_perout(struct ptp_clock_info *ptp,
206 struct ptp_perout_request *req, int on)
208 struct ravb_private *priv = container_of(ptp, struct ravb_private,
209 ptp.info);
210 struct net_device *ndev = priv->ndev;
211 struct ravb_ptp_perout *perout;
212 unsigned long flags;
213 int error = 0;
215 if (req->index)
216 return -EINVAL;
218 if (on) {
219 u64 start_ns;
220 u64 period_ns;
222 start_ns = req->start.sec * NSEC_PER_SEC + req->start.nsec;
223 period_ns = req->period.sec * NSEC_PER_SEC + req->period.nsec;
225 if (start_ns > U32_MAX) {
226 netdev_warn(ndev,
227 "ptp: start value (nsec) is over limit. Maximum size of start is only 32 bits\n");
228 return -ERANGE;
231 if (period_ns > U32_MAX) {
232 netdev_warn(ndev,
233 "ptp: period value (nsec) is over limit. Maximum size of period is only 32 bits\n");
234 return -ERANGE;
237 spin_lock_irqsave(&priv->lock, flags);
239 perout = &priv->ptp.perout[req->index];
240 perout->target = (u32)start_ns;
241 perout->period = (u32)period_ns;
242 error = ravb_ptp_update_compare(priv, (u32)start_ns);
243 if (!error) {
244 /* Unmask interrupt */
245 if (priv->chip_id == RCAR_GEN2)
246 ravb_modify(ndev, GIC, GIC_PTME, GIC_PTME);
247 else
248 ravb_write(ndev, GIE_PTMS0, GIE);
250 } else {
251 spin_lock_irqsave(&priv->lock, flags);
253 perout = &priv->ptp.perout[req->index];
254 perout->period = 0;
256 /* Mask interrupt */
257 if (priv->chip_id == RCAR_GEN2)
258 ravb_modify(ndev, GIC, GIC_PTME, 0);
259 else
260 ravb_write(ndev, GID_PTMD0, GID);
262 mmiowb();
263 spin_unlock_irqrestore(&priv->lock, flags);
265 return error;
268 static int ravb_ptp_enable(struct ptp_clock_info *ptp,
269 struct ptp_clock_request *req, int on)
271 switch (req->type) {
272 case PTP_CLK_REQ_EXTTS:
273 return ravb_ptp_extts(ptp, &req->extts, on);
274 case PTP_CLK_REQ_PEROUT:
275 return ravb_ptp_perout(ptp, &req->perout, on);
276 default:
277 return -EOPNOTSUPP;
281 static const struct ptp_clock_info ravb_ptp_info = {
282 .owner = THIS_MODULE,
283 .name = "ravb clock",
284 .max_adj = 50000000,
285 .n_ext_ts = N_EXT_TS,
286 .n_per_out = N_PER_OUT,
287 .adjfreq = ravb_ptp_adjfreq,
288 .adjtime = ravb_ptp_adjtime,
289 .gettime64 = ravb_ptp_gettime64,
290 .settime64 = ravb_ptp_settime64,
291 .enable = ravb_ptp_enable,
294 /* Caller must hold the lock */
295 void ravb_ptp_interrupt(struct net_device *ndev)
297 struct ravb_private *priv = netdev_priv(ndev);
298 u32 gis = ravb_read(ndev, GIS);
300 gis &= ravb_read(ndev, GIC);
301 if (gis & GIS_PTCF) {
302 struct ptp_clock_event event;
304 event.type = PTP_CLOCK_EXTTS;
305 event.index = 0;
306 event.timestamp = ravb_read(ndev, GCPT);
307 ptp_clock_event(priv->ptp.clock, &event);
309 if (gis & GIS_PTMF) {
310 struct ravb_ptp_perout *perout = priv->ptp.perout;
312 if (perout->period) {
313 perout->target += perout->period;
314 ravb_ptp_update_compare(priv, perout->target);
318 ravb_write(ndev, ~(gis | GIS_RESERVED), GIS);
321 void ravb_ptp_init(struct net_device *ndev, struct platform_device *pdev)
323 struct ravb_private *priv = netdev_priv(ndev);
324 unsigned long flags;
326 priv->ptp.info = ravb_ptp_info;
328 priv->ptp.default_addend = ravb_read(ndev, GTI);
329 priv->ptp.current_addend = priv->ptp.default_addend;
331 spin_lock_irqsave(&priv->lock, flags);
332 ravb_wait(ndev, GCCR, GCCR_TCR, GCCR_TCR_NOREQ);
333 ravb_modify(ndev, GCCR, GCCR_TCSS, GCCR_TCSS_ADJGPTP);
334 mmiowb();
335 spin_unlock_irqrestore(&priv->lock, flags);
337 priv->ptp.clock = ptp_clock_register(&priv->ptp.info, &pdev->dev);
340 void ravb_ptp_stop(struct net_device *ndev)
342 struct ravb_private *priv = netdev_priv(ndev);
344 ravb_write(ndev, 0, GIC);
345 ravb_write(ndev, 0, GIS);
347 ptp_clock_unregister(priv->ptp.clock);