2 * Copyright (C) 2014 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/kernel.h>
15 #include <linux/err.h>
16 #include <linux/clk-provider.h>
19 #include <linux/clkdev.h>
20 #include <linux/of_address.h>
21 #include <linux/delay.h>
23 #include "clk-iproc.h"
27 struct iproc_asiu_clk
{
30 struct iproc_asiu
*asiu
;
32 struct iproc_asiu_div div
;
33 struct iproc_asiu_gate gate
;
37 void __iomem
*div_base
;
38 void __iomem
*gate_base
;
40 struct clk_hw_onecell_data
*clk_data
;
41 struct iproc_asiu_clk
*clks
;
44 #define to_asiu_clk(hw) container_of(hw, struct iproc_asiu_clk, hw)
46 static int iproc_asiu_clk_enable(struct clk_hw
*hw
)
48 struct iproc_asiu_clk
*clk
= to_asiu_clk(hw
);
49 struct iproc_asiu
*asiu
= clk
->asiu
;
52 /* some clocks at the ASIU level are always enabled */
53 if (clk
->gate
.offset
== IPROC_CLK_INVALID_OFFSET
)
56 val
= readl(asiu
->gate_base
+ clk
->gate
.offset
);
57 val
|= (1 << clk
->gate
.en_shift
);
58 writel(val
, asiu
->gate_base
+ clk
->gate
.offset
);
63 static void iproc_asiu_clk_disable(struct clk_hw
*hw
)
65 struct iproc_asiu_clk
*clk
= to_asiu_clk(hw
);
66 struct iproc_asiu
*asiu
= clk
->asiu
;
69 /* some clocks at the ASIU level are always enabled */
70 if (clk
->gate
.offset
== IPROC_CLK_INVALID_OFFSET
)
73 val
= readl(asiu
->gate_base
+ clk
->gate
.offset
);
74 val
&= ~(1 << clk
->gate
.en_shift
);
75 writel(val
, asiu
->gate_base
+ clk
->gate
.offset
);
78 static unsigned long iproc_asiu_clk_recalc_rate(struct clk_hw
*hw
,
79 unsigned long parent_rate
)
81 struct iproc_asiu_clk
*clk
= to_asiu_clk(hw
);
82 struct iproc_asiu
*asiu
= clk
->asiu
;
84 unsigned int div_h
, div_l
;
86 if (parent_rate
== 0) {
91 /* if clock divisor is not enabled, simply return parent rate */
92 val
= readl(asiu
->div_base
+ clk
->div
.offset
);
93 if ((val
& (1 << clk
->div
.en_shift
)) == 0) {
94 clk
->rate
= parent_rate
;
98 /* clock rate = parent rate / (high_div + 1) + (low_div + 1) */
99 div_h
= (val
>> clk
->div
.high_shift
) & bit_mask(clk
->div
.high_width
);
101 div_l
= (val
>> clk
->div
.low_shift
) & bit_mask(clk
->div
.low_width
);
104 clk
->rate
= parent_rate
/ (div_h
+ div_l
);
105 pr_debug("%s: rate: %lu. parent rate: %lu div_h: %u div_l: %u\n",
106 __func__
, clk
->rate
, parent_rate
, div_h
, div_l
);
111 static long iproc_asiu_clk_round_rate(struct clk_hw
*hw
, unsigned long rate
,
112 unsigned long *parent_rate
)
116 if (rate
== 0 || *parent_rate
== 0)
119 if (rate
== *parent_rate
)
122 div
= DIV_ROUND_CLOSEST(*parent_rate
, rate
);
126 return *parent_rate
/ div
;
129 static int iproc_asiu_clk_set_rate(struct clk_hw
*hw
, unsigned long rate
,
130 unsigned long parent_rate
)
132 struct iproc_asiu_clk
*clk
= to_asiu_clk(hw
);
133 struct iproc_asiu
*asiu
= clk
->asiu
;
134 unsigned int div
, div_h
, div_l
;
137 if (rate
== 0 || parent_rate
== 0)
140 /* simply disable the divisor if one wants the same rate as parent */
141 if (rate
== parent_rate
) {
142 val
= readl(asiu
->div_base
+ clk
->div
.offset
);
143 val
&= ~(1 << clk
->div
.en_shift
);
144 writel(val
, asiu
->div_base
+ clk
->div
.offset
);
148 div
= DIV_ROUND_CLOSEST(parent_rate
, rate
);
152 div_h
= div_l
= div
>> 1;
156 val
= readl(asiu
->div_base
+ clk
->div
.offset
);
157 val
|= 1 << clk
->div
.en_shift
;
159 val
&= ~(bit_mask(clk
->div
.high_width
)
160 << clk
->div
.high_shift
);
161 val
|= div_h
<< clk
->div
.high_shift
;
163 val
&= ~(bit_mask(clk
->div
.high_width
)
164 << clk
->div
.high_shift
);
167 val
&= ~(bit_mask(clk
->div
.low_width
) << clk
->div
.low_shift
);
168 val
|= div_l
<< clk
->div
.low_shift
;
170 val
&= ~(bit_mask(clk
->div
.low_width
) << clk
->div
.low_shift
);
172 writel(val
, asiu
->div_base
+ clk
->div
.offset
);
177 static const struct clk_ops iproc_asiu_ops
= {
178 .enable
= iproc_asiu_clk_enable
,
179 .disable
= iproc_asiu_clk_disable
,
180 .recalc_rate
= iproc_asiu_clk_recalc_rate
,
181 .round_rate
= iproc_asiu_clk_round_rate
,
182 .set_rate
= iproc_asiu_clk_set_rate
,
185 void __init
iproc_asiu_setup(struct device_node
*node
,
186 const struct iproc_asiu_div
*div
,
187 const struct iproc_asiu_gate
*gate
,
188 unsigned int num_clks
)
191 struct iproc_asiu
*asiu
;
193 if (WARN_ON(!gate
|| !div
))
196 asiu
= kzalloc(sizeof(*asiu
), GFP_KERNEL
);
200 asiu
->clk_data
= kzalloc(struct_size(asiu
->clk_data
, hws
, num_clks
),
202 if (WARN_ON(!asiu
->clk_data
))
204 asiu
->clk_data
->num
= num_clks
;
206 asiu
->clks
= kcalloc(num_clks
, sizeof(*asiu
->clks
), GFP_KERNEL
);
207 if (WARN_ON(!asiu
->clks
))
210 asiu
->div_base
= of_iomap(node
, 0);
211 if (WARN_ON(!asiu
->div_base
))
214 asiu
->gate_base
= of_iomap(node
, 1);
215 if (WARN_ON(!asiu
->gate_base
))
218 for (i
= 0; i
< num_clks
; i
++) {
219 struct clk_init_data init
;
220 const char *parent_name
;
221 struct iproc_asiu_clk
*asiu_clk
;
222 const char *clk_name
;
224 ret
= of_property_read_string_index(node
, "clock-output-names",
227 goto err_clk_register
;
229 asiu_clk
= &asiu
->clks
[i
];
230 asiu_clk
->name
= clk_name
;
231 asiu_clk
->asiu
= asiu
;
232 asiu_clk
->div
= div
[i
];
233 asiu_clk
->gate
= gate
[i
];
234 init
.name
= clk_name
;
235 init
.ops
= &iproc_asiu_ops
;
237 parent_name
= of_clk_get_parent_name(node
, 0);
238 init
.parent_names
= (parent_name
? &parent_name
: NULL
);
239 init
.num_parents
= (parent_name
? 1 : 0);
240 asiu_clk
->hw
.init
= &init
;
242 ret
= clk_hw_register(NULL
, &asiu_clk
->hw
);
244 goto err_clk_register
;
245 asiu
->clk_data
->hws
[i
] = &asiu_clk
->hw
;
248 ret
= of_clk_add_hw_provider(node
, of_clk_hw_onecell_get
,
251 goto err_clk_register
;
257 clk_hw_unregister(asiu
->clk_data
->hws
[i
]);
258 iounmap(asiu
->gate_base
);
261 iounmap(asiu
->div_base
);
267 kfree(asiu
->clk_data
);