1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Silicon Labs Si570/Si571 Programmable XO/VCXO
5 * Copyright (C) 2010, 2011 Ericsson AB.
6 * Copyright (C) 2011 Guenter Roeck.
7 * Copyright (C) 2011 - 2013 Xilinx Inc.
9 * Author: Guenter Roeck <guenter.roeck@ericsson.com>
10 * Sören Brinkmann <soren.brinkmann@xilinx.com>
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/i2c.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
22 #define SI570_REG_HS_N1 7
23 #define SI570_REG_N1_RFREQ0 8
24 #define SI570_REG_RFREQ1 9
25 #define SI570_REG_RFREQ2 10
26 #define SI570_REG_RFREQ3 11
27 #define SI570_REG_RFREQ4 12
28 #define SI570_REG_CONTROL 135
29 #define SI570_REG_FREEZE_DCO 137
30 #define SI570_DIV_OFFSET_7PPM 6
32 #define HS_DIV_SHIFT 5
33 #define HS_DIV_MASK 0xe0
34 #define HS_DIV_OFFSET 4
35 #define N1_6_2_MASK 0x1f
36 #define N1_1_0_MASK 0xc0
37 #define RFREQ_37_32_MASK 0x3f
39 #define SI570_MIN_FREQ 10000000L
40 #define SI570_MAX_FREQ 1417500000L
41 #define SI598_MAX_FREQ 525000000L
43 #define FDCO_MIN 4850000000LL
44 #define FDCO_MAX 5670000000LL
46 #define SI570_CNTRL_RECALL (1 << 0)
47 #define SI570_CNTRL_FREEZE_M (1 << 5)
48 #define SI570_CNTRL_NEWFREQ (1 << 6)
50 #define SI570_FREEZE_DCO (1 << 4)
54 * @hw: Clock hw struct
55 * @regmap: Device's regmap
56 * @div_offset: Rgister offset for dividers
57 * @max_freq: Maximum frequency for this device
58 * @fxtal: Factory xtal frequency
59 * @n1: Clock divider N1
60 * @hs_div: Clock divider HSDIV
61 * @rfreq: Clock multiplier RFREQ
62 * @frequency: Current output frequency
63 * @i2c_client: I2C client pointer
67 struct regmap
*regmap
;
68 unsigned int div_offset
;
75 struct i2c_client
*i2c_client
;
77 #define to_clk_si570(_hw) container_of(_hw, struct clk_si570, hw)
79 enum clk_si570_variant
{
85 * si570_get_divs() - Read clock dividers from HW
86 * @data: Pointer to struct clk_si570
87 * @rfreq: Fractional multiplier (output)
88 * @n1: Divider N1 (output)
89 * @hs_div: Divider HSDIV (output)
90 * Returns 0 on success, negative errno otherwise.
92 * Retrieve clock dividers and multipliers from the HW.
94 static int si570_get_divs(struct clk_si570
*data
, u64
*rfreq
,
95 unsigned int *n1
, unsigned int *hs_div
)
101 err
= regmap_bulk_read(data
->regmap
, SI570_REG_HS_N1
+ data
->div_offset
,
102 reg
, ARRAY_SIZE(reg
));
106 *hs_div
= ((reg
[0] & HS_DIV_MASK
) >> HS_DIV_SHIFT
) + HS_DIV_OFFSET
;
107 *n1
= ((reg
[0] & N1_6_2_MASK
) << 2) + ((reg
[1] & N1_1_0_MASK
) >> 6) + 1;
108 /* Handle invalid cases */
112 tmp
= reg
[1] & RFREQ_37_32_MASK
;
113 tmp
= (tmp
<< 8) + reg
[2];
114 tmp
= (tmp
<< 8) + reg
[3];
115 tmp
= (tmp
<< 8) + reg
[4];
116 tmp
= (tmp
<< 8) + reg
[5];
123 * si570_get_defaults() - Get default values
124 * @data: Driver data structure
125 * @fout: Factory frequency output
126 * Returns 0 on success, negative errno otherwise.
128 static int si570_get_defaults(struct clk_si570
*data
, u64 fout
)
133 regmap_write(data
->regmap
, SI570_REG_CONTROL
, SI570_CNTRL_RECALL
);
135 err
= si570_get_divs(data
, &data
->rfreq
, &data
->n1
, &data
->hs_div
);
140 * Accept optional precision loss to avoid arithmetic overflows.
141 * Acceptable per Silicon Labs Application Note AN334.
143 fdco
= fout
* data
->n1
* data
->hs_div
;
144 if (fdco
>= (1LL << 36))
145 data
->fxtal
= div64_u64(fdco
<< 24, data
->rfreq
>> 4);
147 data
->fxtal
= div64_u64(fdco
<< 28, data
->rfreq
);
149 data
->frequency
= fout
;
155 * si570_update_rfreq() - Update clock multiplier
156 * @data: Driver data structure
157 * Passes on regmap_bulk_write() return value.
159 static int si570_update_rfreq(struct clk_si570
*data
)
163 reg
[0] = ((data
->n1
- 1) << 6) |
164 ((data
->rfreq
>> 32) & RFREQ_37_32_MASK
);
165 reg
[1] = (data
->rfreq
>> 24) & 0xff;
166 reg
[2] = (data
->rfreq
>> 16) & 0xff;
167 reg
[3] = (data
->rfreq
>> 8) & 0xff;
168 reg
[4] = data
->rfreq
& 0xff;
170 return regmap_bulk_write(data
->regmap
, SI570_REG_N1_RFREQ0
+
171 data
->div_offset
, reg
, ARRAY_SIZE(reg
));
175 * si570_calc_divs() - Caluclate clock dividers
176 * @frequency: Target frequency
177 * @data: Driver data structure
178 * @out_rfreq: RFREG fractional multiplier (output)
179 * @out_n1: Clock divider N1 (output)
180 * @out_hs_div: Clock divider HSDIV (output)
181 * Returns 0 on success, negative errno otherwise.
183 * Calculate the clock dividers (@out_hs_div, @out_n1) and clock multiplier
184 * (@out_rfreq) for a given target @frequency.
186 static int si570_calc_divs(unsigned long frequency
, struct clk_si570
*data
,
187 u64
*out_rfreq
, unsigned int *out_n1
, unsigned int *out_hs_div
)
190 unsigned int n1
, hs_div
;
191 u64 fdco
, best_fdco
= ULLONG_MAX
;
192 static const uint8_t si570_hs_div_values
[] = { 11, 9, 7, 6, 5, 4 };
194 for (i
= 0; i
< ARRAY_SIZE(si570_hs_div_values
); i
++) {
195 hs_div
= si570_hs_div_values
[i
];
196 /* Calculate lowest possible value for n1 */
197 n1
= div_u64(div_u64(FDCO_MIN
, hs_div
), frequency
);
201 fdco
= (u64
)frequency
* (u64
)hs_div
* (u64
)n1
;
204 if (fdco
>= FDCO_MIN
&& fdco
< best_fdco
) {
206 *out_hs_div
= hs_div
;
207 *out_rfreq
= div64_u64(fdco
<< 28, data
->fxtal
);
210 n1
+= (n1
== 1 ? 1 : 2);
214 if (best_fdco
== ULLONG_MAX
)
220 static unsigned long si570_recalc_rate(struct clk_hw
*hw
,
221 unsigned long parent_rate
)
225 unsigned int n1
, hs_div
;
226 struct clk_si570
*data
= to_clk_si570(hw
);
228 err
= si570_get_divs(data
, &rfreq
, &n1
, &hs_div
);
230 dev_err(&data
->i2c_client
->dev
, "unable to recalc rate\n");
231 return data
->frequency
;
234 rfreq
= div_u64(rfreq
, hs_div
* n1
);
235 rate
= (data
->fxtal
* rfreq
) >> 28;
240 static long si570_round_rate(struct clk_hw
*hw
, unsigned long rate
,
241 unsigned long *parent_rate
)
245 unsigned int n1
, hs_div
;
246 struct clk_si570
*data
= to_clk_si570(hw
);
251 if (div64_u64(abs(rate
- data
->frequency
) * 10000LL,
252 data
->frequency
) < 35) {
253 rfreq
= div64_u64((data
->rfreq
* rate
) +
254 div64_u64(data
->frequency
, 2), data
->frequency
);
256 hs_div
= data
->hs_div
;
259 err
= si570_calc_divs(rate
, data
, &rfreq
, &n1
, &hs_div
);
261 dev_err(&data
->i2c_client
->dev
,
262 "unable to round rate\n");
271 * si570_set_frequency() - Adjust output frequency
272 * @data: Driver data structure
273 * @frequency: Target frequency
274 * Returns 0 on success.
276 * Update output frequency for big frequency changes (> 3,500 ppm).
278 static int si570_set_frequency(struct clk_si570
*data
, unsigned long frequency
)
282 err
= si570_calc_divs(frequency
, data
, &data
->rfreq
, &data
->n1
,
288 * The DCO reg should be accessed with a read-modify-write operation
291 regmap_write(data
->regmap
, SI570_REG_FREEZE_DCO
, SI570_FREEZE_DCO
);
292 regmap_write(data
->regmap
, SI570_REG_HS_N1
+ data
->div_offset
,
293 ((data
->hs_div
- HS_DIV_OFFSET
) << HS_DIV_SHIFT
) |
294 (((data
->n1
- 1) >> 2) & N1_6_2_MASK
));
295 si570_update_rfreq(data
);
296 regmap_write(data
->regmap
, SI570_REG_FREEZE_DCO
, 0);
297 regmap_write(data
->regmap
, SI570_REG_CONTROL
, SI570_CNTRL_NEWFREQ
);
299 /* Applying a new frequency can take up to 10ms */
300 usleep_range(10000, 12000);
306 * si570_set_frequency_small() - Adjust output frequency
307 * @data: Driver data structure
308 * @frequency: Target frequency
309 * Returns 0 on success.
311 * Update output frequency for small frequency changes (< 3,500 ppm).
313 static int si570_set_frequency_small(struct clk_si570
*data
,
314 unsigned long frequency
)
317 * This is a re-implementation of DIV_ROUND_CLOSEST
318 * using the div64_u64 function lieu of letting the compiler
321 data
->rfreq
= div64_u64((data
->rfreq
* frequency
) +
322 div_u64(data
->frequency
, 2), data
->frequency
);
323 regmap_write(data
->regmap
, SI570_REG_CONTROL
, SI570_CNTRL_FREEZE_M
);
324 si570_update_rfreq(data
);
325 regmap_write(data
->regmap
, SI570_REG_CONTROL
, 0);
327 /* Applying a new frequency (small change) can take up to 100us */
328 usleep_range(100, 200);
333 static int si570_set_rate(struct clk_hw
*hw
, unsigned long rate
,
334 unsigned long parent_rate
)
336 struct clk_si570
*data
= to_clk_si570(hw
);
337 struct i2c_client
*client
= data
->i2c_client
;
340 if (rate
< SI570_MIN_FREQ
|| rate
> data
->max_freq
) {
341 dev_err(&client
->dev
,
342 "requested frequency %lu Hz is out of range\n", rate
);
346 if (div64_u64(abs(rate
- data
->frequency
) * 10000LL,
347 data
->frequency
) < 35)
348 err
= si570_set_frequency_small(data
, rate
);
350 err
= si570_set_frequency(data
, rate
);
355 data
->frequency
= rate
;
360 static const struct clk_ops si570_clk_ops
= {
361 .recalc_rate
= si570_recalc_rate
,
362 .round_rate
= si570_round_rate
,
363 .set_rate
= si570_set_rate
,
366 static bool si570_regmap_is_volatile(struct device
*dev
, unsigned int reg
)
369 case SI570_REG_CONTROL
:
376 static bool si570_regmap_is_writeable(struct device
*dev
, unsigned int reg
)
379 case SI570_REG_HS_N1
... (SI570_REG_RFREQ4
+ SI570_DIV_OFFSET_7PPM
):
380 case SI570_REG_CONTROL
:
381 case SI570_REG_FREEZE_DCO
:
388 static const struct regmap_config si570_regmap_config
= {
391 .cache_type
= REGCACHE_RBTREE
,
393 .writeable_reg
= si570_regmap_is_writeable
,
394 .volatile_reg
= si570_regmap_is_volatile
,
397 static int si570_probe(struct i2c_client
*client
,
398 const struct i2c_device_id
*id
)
400 struct clk_si570
*data
;
401 struct clk_init_data init
;
402 u32 initial_fout
, factory_fout
, stability
;
404 enum clk_si570_variant variant
= id
->driver_data
;
406 data
= devm_kzalloc(&client
->dev
, sizeof(*data
), GFP_KERNEL
);
410 init
.ops
= &si570_clk_ops
;
412 init
.num_parents
= 0;
413 data
->hw
.init
= &init
;
414 data
->i2c_client
= client
;
416 if (variant
== si57x
) {
417 err
= of_property_read_u32(client
->dev
.of_node
,
418 "temperature-stability", &stability
);
420 dev_err(&client
->dev
,
421 "'temperature-stability' property missing\n");
424 /* adjust register offsets for 7ppm devices */
426 data
->div_offset
= SI570_DIV_OFFSET_7PPM
;
428 data
->max_freq
= SI570_MAX_FREQ
;
430 data
->max_freq
= SI598_MAX_FREQ
;
433 if (of_property_read_string(client
->dev
.of_node
, "clock-output-names",
435 init
.name
= client
->dev
.of_node
->name
;
437 err
= of_property_read_u32(client
->dev
.of_node
, "factory-fout",
440 dev_err(&client
->dev
, "'factory-fout' property missing\n");
444 data
->regmap
= devm_regmap_init_i2c(client
, &si570_regmap_config
);
445 if (IS_ERR(data
->regmap
)) {
446 dev_err(&client
->dev
, "failed to allocate register map\n");
447 return PTR_ERR(data
->regmap
);
450 i2c_set_clientdata(client
, data
);
451 err
= si570_get_defaults(data
, factory_fout
);
455 err
= devm_clk_hw_register(&client
->dev
, &data
->hw
);
457 dev_err(&client
->dev
, "clock registration failed\n");
460 err
= of_clk_add_hw_provider(client
->dev
.of_node
, of_clk_hw_simple_get
,
463 dev_err(&client
->dev
, "unable to add clk provider\n");
467 /* Read the requested initial output frequency from device tree */
468 if (!of_property_read_u32(client
->dev
.of_node
, "clock-frequency",
470 err
= clk_set_rate(data
->hw
.clk
, initial_fout
);
472 of_clk_del_provider(client
->dev
.of_node
);
477 /* Display a message indicating that we've successfully registered */
478 dev_info(&client
->dev
, "registered, current frequency %llu Hz\n",
484 static int si570_remove(struct i2c_client
*client
)
486 of_clk_del_provider(client
->dev
.of_node
);
490 static const struct i2c_device_id si570_id
[] = {
497 MODULE_DEVICE_TABLE(i2c
, si570_id
);
499 static const struct of_device_id clk_si570_of_match
[] = {
500 { .compatible
= "silabs,si570" },
501 { .compatible
= "silabs,si571" },
502 { .compatible
= "silabs,si598" },
503 { .compatible
= "silabs,si599" },
506 MODULE_DEVICE_TABLE(of
, clk_si570_of_match
);
508 static struct i2c_driver si570_driver
= {
511 .of_match_table
= clk_si570_of_match
,
513 .probe
= si570_probe
,
514 .remove
= si570_remove
,
515 .id_table
= si570_id
,
517 module_i2c_driver(si570_driver
);
519 MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
520 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
521 MODULE_DESCRIPTION("Si570 driver");
522 MODULE_LICENSE("GPL");