1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
64 Enable support for Altera / Intel mSGDMA controller.
67 bool "ARM PrimeCell PL080 or PL081 support"
70 select DMA_VIRTUAL_CHANNELS
72 Say yes if your platform has a PL08x DMAC device which can
73 provide DMA engine support. This includes the original ARM
74 PL080 and PL081, Samsungs PL080 derivative and Faraday
75 Technology's FTDMAC020 PL080 derivative.
77 config AMCC_PPC440SPE_ADMA
78 tristate "AMCC PPC440SPe ADMA support"
79 depends on 440SPe || 440SP
81 select DMA_ENGINE_RAID
82 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
83 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
85 Enable support for the AMCC PPC440SPe RAID engines.
88 tristate "Atmel AHB DMA support"
92 Support the Atmel AHB DMA controller.
95 tristate "Atmel XDMA support"
99 Support the Atmel XDMA controller.
102 tristate "Analog Devices AXI-DMAC DMA support"
103 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST
105 select DMA_VIRTUAL_CHANNELS
108 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
109 controller is often used in Analog Devices' reference designs for FPGA
113 tristate "Broadcom SBA RAID engine support"
114 depends on ARM64 || COMPILE_TEST
115 depends on MAILBOX && RAID6_PQ
117 select DMA_ENGINE_RAID
118 select ASYNC_TX_DISABLE_XOR_VAL_DMA
119 select ASYNC_TX_DISABLE_PQ_VAL_DMA
120 default m if ARCH_BCM_IPROC
122 Enable support for Broadcom SBA RAID Engine. The SBA RAID
123 engine is available on most of the Broadcom iProc SoCs. It
124 has the capability to offload memcpy, xor and pq computation
128 bool "ST-Ericsson COH901318 DMA support"
130 depends on ARCH_U300 || COMPILE_TEST
132 Enable support for ST-Ericsson COH 901 318 DMA.
135 tristate "BCM2835 DMA engine support"
136 depends on ARCH_BCM2835
138 select DMA_VIRTUAL_CHANNELS
141 tristate "JZ4780 DMA support"
142 depends on MIPS || COMPILE_TEST
144 select DMA_VIRTUAL_CHANNELS
146 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
147 If you have a board based on such a SoC and wish to use DMA for
148 devices which can use the DMA controller, say Y or M here.
151 tristate "SA-11x0 DMA support"
152 depends on ARCH_SA1100 || COMPILE_TEST
154 select DMA_VIRTUAL_CHANNELS
156 Support the DMA engine found on Intel StrongARM SA-1100 and
157 SA-1110 SoCs. This DMA engine can only be used with on-chip
161 tristate "Allwinner A10 DMA SoCs support"
162 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
163 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
165 select DMA_VIRTUAL_CHANNELS
167 Enable support for the DMA controller present in the sun4i,
168 sun5i and sun7i Allwinner ARM SoCs.
171 tristate "Allwinner A31 SoCs DMA support"
172 depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
173 depends on RESET_CONTROLLER
175 select DMA_VIRTUAL_CHANNELS
177 Support for the DMA engine first found in Allwinner A31 SoCs.
180 tristate "Synopsys DesignWare AXI DMA support"
181 depends on OF || COMPILE_TEST
183 select DMA_VIRTUAL_CHANNELS
185 Enable support for Synopsys DesignWare AXI DMA controller.
186 NOTE: This driver wasn't tested on 64 bit platform because
187 of lack 64 bit platform with Synopsys DW AXI DMAC.
190 bool "Cirrus Logic EP93xx DMA support"
191 depends on ARCH_EP93XX || COMPILE_TEST
194 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
197 tristate "Freescale Elo series DMA support"
200 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
202 Enable support for the Freescale Elo series DMA controllers.
203 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
204 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
205 some Txxx and Bxxx parts.
208 tristate "Freescale eDMA engine support"
211 select DMA_VIRTUAL_CHANNELS
213 Support the Freescale eDMA engine with programmable channel
214 multiplexing capability for DMA request sources(slot).
215 This module can be found on Freescale Vybrid and LS-1 SoCs.
218 tristate "NXP Layerscape qDMA engine support"
219 depends on ARM || ARM64
221 select DMA_VIRTUAL_CHANNELS
222 select DMA_ENGINE_RAID
223 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
225 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
226 Channel virtualization is supported through enqueuing of DMA jobs to,
227 or dequeuing DMA jobs from, different work queues.
228 This module can be found on NXP Layerscape SoCs.
229 The qdma driver only work on SoCs with a DPAA hardware block.
232 tristate "Freescale RAID engine Support"
233 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
235 select DMA_ENGINE_RAID
237 Enable support for Freescale RAID Engine. RAID Engine is
238 available on some QorIQ SoCs (like P5020/P5040). It has
239 the capability to offload memcpy, xor and pq computation
243 tristate "HiSilicon DMA Engine support"
244 depends on ARM64 || COMPILE_TEST
247 select DMA_VIRTUAL_CHANNELS
249 Support HiSilicon Kunpeng DMA engine.
252 tristate "IMG MDC support"
253 depends on MIPS || COMPILE_TEST
254 depends on MFD_SYSCON
256 select DMA_VIRTUAL_CHANNELS
258 Enable support for the IMG multi-threaded DMA controller (MDC).
261 tristate "i.MX DMA support"
265 Support the i.MX DMA engine. This engine is integrated into
266 Freescale i.MX1/21/27 chips.
269 tristate "i.MX SDMA support"
272 select DMA_VIRTUAL_CHANNELS
274 Support the i.MX SDMA engine. This engine is integrated into
275 Freescale i.MX25/31/35/51/53/6 chips.
278 tristate "Intel integrated DMA 64-bit support"
280 select DMA_VIRTUAL_CHANNELS
282 Enable DMA support for Intel Low Power Subsystem such as found on
286 tristate "Intel Data Accelerators support"
287 depends on PCI && X86_64
292 Enable support for the Intel(R) data accelerators present
295 Say Y if you have such a platform.
299 # Config symbol that collects all the dependencies that's necessary to
300 # support shared virtual memory for the devices supported by idxd.
301 config INTEL_IDXD_SVM
302 bool "Accelerator Shared Virtual Memory Support"
303 depends on INTEL_IDXD
304 depends on INTEL_IOMMU_SVM
310 tristate "Intel I/OAT DMA support"
311 depends on PCI && X86_64
313 select DMA_ENGINE_RAID
316 Enable support for the Intel(R) I/OAT DMA engine present
317 in recent Intel Xeon chipsets.
319 Say Y here if you have such a chipset.
323 config INTEL_IOP_ADMA
324 tristate "Intel IOP32x ADMA support"
325 depends on ARCH_IOP32X || COMPILE_TEST
327 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
329 Enable support for the Intel(R) IOP Series RAID engines.
332 tristate "Hisilicon K3 DMA support"
333 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
335 select DMA_VIRTUAL_CHANNELS
337 Support the DMA engine for Hisilicon K3 platform
340 config LPC18XX_DMAMUX
341 bool "NXP LPC18xx/43xx DMA MUX for PL080"
342 depends on ARCH_LPC18XX || COMPILE_TEST
343 depends on OF && AMBA_PL08X
346 Enable support for DMA on NXP LPC18xx/43xx platforms
347 with PL080 and multiplexed DMA request lines.
350 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
351 depends on M5441x || COMPILE_TEST
353 select DMA_VIRTUAL_CHANNELS
355 Support the Freescale ColdFire eDMA engine, 64-channel
356 implementation that performs complex data transfers with
357 minimal intervention from a host processor.
358 This module can be found on Freescale ColdFire mcf5441x SoCs.
360 config MILBEAUT_HDMAC
361 tristate "Milbeaut AHB DMA support"
362 depends on ARCH_MILBEAUT || COMPILE_TEST
365 select DMA_VIRTUAL_CHANNELS
367 Say yes here to support the Socionext Milbeaut
370 config MILBEAUT_XDMAC
371 tristate "Milbeaut AXI DMA support"
372 depends on ARCH_MILBEAUT || COMPILE_TEST
375 select DMA_VIRTUAL_CHANNELS
377 Say yes here to support the Socionext Milbeaut
381 bool "MMP PDMA support"
382 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
385 Support the MMP PDMA engine for PXA and MMP platform.
388 bool "MMP Two-Channel DMA support"
389 depends on ARCH_MMP || COMPILE_TEST
391 select GENERIC_ALLOCATOR
393 Support the MMP Two-Channel DMA engine.
394 This engine used for MMP Audio DMA and pxa910 SQU.
397 tristate "MOXART DMA support"
398 depends on ARCH_MOXART
400 select DMA_VIRTUAL_CHANNELS
402 Enable support for the MOXA ART SoC DMA controller.
404 Say Y here if you enabled MMP ADMA, otherwise say N.
407 tristate "Freescale MPC512x built-in DMA engine support"
408 depends on PPC_MPC512x || PPC_MPC831x
411 Enable support for the Freescale MPC512x built-in DMA engine.
414 bool "Marvell XOR engine support"
415 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
417 select DMA_ENGINE_RAID
418 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
420 Enable support for the Marvell XOR engine.
423 bool "Marvell XOR engine version 2 support "
426 select DMA_ENGINE_RAID
427 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
428 select GENERIC_MSI_IRQ_DOMAIN
430 Enable support for the Marvell version 2 XOR engine.
432 This engine provides acceleration for copy, XOR and RAID6
433 operations, and is available on Marvell Armada 7K and 8K
437 bool "MXS DMA support"
438 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
442 Support the MXS DMA engine. This engine including APBH-DMA
443 and APBX-DMA is integrated into some Freescale chips.
446 bool "MX3x Image Processing Unit support"
451 If you plan to use the Image Processing unit in the i.MX3x, say
452 Y here. If unsure, select Y.
455 int "Number of dynamically mapped interrupts for IPU"
460 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
461 To avoid bloating the irq_desc[] array we allocate a sufficient
462 number of IRQ slots and map them dynamically to specific sources.
465 tristate "Renesas Type-AXI NBPF DMA support"
467 depends on ARM || COMPILE_TEST
469 Support for "Type-AXI" NBPF DMA IPs from Renesas
472 tristate "Actions Semi Owl SoCs DMA support"
473 depends on ARCH_ACTIONS
475 select DMA_VIRTUAL_CHANNELS
477 Enable support for the Actions Semi Owl SoCs DMA controller.
480 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
481 depends on PCI && (X86_32 || COMPILE_TEST)
484 Enable support for Intel EG20T PCH DMA engine.
486 This driver also can be used for LAPIS Semiconductor IOH(Input/
487 Output Hub), ML7213, ML7223 and ML7831.
488 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
489 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
490 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
491 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
494 tristate "DMA API Driver for PL330"
498 Select if your platform has one or more PL330 DMACs.
499 You need to provide platform specific settings via
500 platform_data for a dma-pl330 device.
503 bool "PXA DMA support"
504 depends on (ARCH_MMP || ARCH_PXA)
506 select DMA_VIRTUAL_CHANNELS
508 Support the DMA engine for PXA. It is also compatible with MMP PDMA
509 platform. The internal DMA IP of all PXA variants is supported, with
510 16 to 32 channels for peripheral to memory or memory to memory
514 tristate "PLX ExpressLane PEX Switch DMA Engine Support"
518 Some PLX ExpressLane PCI Switches support additional DMA engines.
519 These are exposed via extra functions on the switch's
520 upstream port. Each function exposes one DMA channel.
523 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
527 Enable support for the CSR SiRFprimaII DMA engine.
530 bool "ST-Ericsson DMA40 support"
531 depends on ARCH_U8500
534 Support for ST-Ericsson DMA40 controller
537 tristate "ST FDMA dmaengine support"
539 depends on REMOTEPROC
540 select ST_SLIM_REMOTEPROC
542 select DMA_VIRTUAL_CHANNELS
544 Enable support for ST FDMA controller.
545 It supports 16 independent DMA channels, accepts up to 32 DMA requests
547 Say Y here if you have such a chipset.
551 bool "STMicroelectronics STM32 DMA support"
552 depends on ARCH_STM32 || COMPILE_TEST
554 select DMA_VIRTUAL_CHANNELS
556 Enable support for the on-chip DMA controller on STMicroelectronics
558 If you have a board based on such a MCU and wish to use DMA say Y
562 bool "STMicroelectronics STM32 dma multiplexer support"
563 depends on STM32_DMA || COMPILE_TEST
565 Enable support for the on-chip DMA multiplexer on STMicroelectronics
567 If you have a board based on such a MCU and wish to use DMAMUX say Y
571 bool "STMicroelectronics STM32 master dma support"
572 depends on ARCH_STM32 || COMPILE_TEST
575 select DMA_VIRTUAL_CHANNELS
577 Enable support for the on-chip MDMA controller on STMicroelectronics
579 If you have a board based on STM32 SoC and wish to use the master DMA
583 tristate "Spreadtrum DMA support"
584 depends on ARCH_SPRD || COMPILE_TEST
586 select DMA_VIRTUAL_CHANNELS
588 Enable support for the on-chip DMA controller on Spreadtrum platform.
591 bool "Samsung S3C24XX DMA support"
592 depends on ARCH_S3C24XX || COMPILE_TEST
594 select DMA_VIRTUAL_CHANNELS
596 Support for the Samsung S3C24XX DMA controller driver. The
597 DMA controller is having multiple DMA channels which can be
598 configured for different peripherals like audio, UART, SPI.
599 The DMA controller can transfer data from memory to peripheral,
600 periphal to memory, periphal to periphal and memory to memory.
603 tristate "Toshiba TXx9 SoC DMA support"
604 depends on MACH_TX49XX || MACH_TX39XX
607 Support the TXx9 SoC internal DMA controller. This can be
608 integrated in chips such as the Toshiba TX4927/38/39.
610 config TEGRA20_APB_DMA
611 tristate "NVIDIA Tegra20 APB DMA support"
612 depends on ARCH_TEGRA || COMPILE_TEST
615 Support for the NVIDIA Tegra20 APB DMA controller driver. The
616 DMA controller is having multiple DMA channel which can be
617 configured for different peripherals like audio, UART, SPI,
618 I2C etc which is in APB bus.
619 This DMA controller transfers data from memory to peripheral fifo
620 or vice versa. It does not support memory to memory data transfer.
623 tristate "NVIDIA Tegra210 ADMA support"
624 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
626 select DMA_VIRTUAL_CHANNELS
628 Support for the NVIDIA Tegra210 ADMA controller driver. The
629 DMA controller has multiple DMA channels and is used to service
630 various audio clients in the Tegra210 audio processing engine
631 (APE). This DMA controller transfers data from memory to
632 peripheral and vice versa. It does not support memory to
633 memory data transfer.
636 tristate "Timberdale FPGA DMA support"
637 depends on MFD_TIMBERDALE || COMPILE_TEST
640 Enable support for the Timberdale FPGA DMA engine.
642 config UNIPHIER_MDMAC
643 tristate "UniPhier MIO DMAC"
644 depends on ARCH_UNIPHIER || COMPILE_TEST
647 select DMA_VIRTUAL_CHANNELS
649 Enable support for the MIO DMAC (Media I/O DMA controller) on the
650 UniPhier platform. This DMA controller is used as the external
651 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
653 config UNIPHIER_XDMAC
654 tristate "UniPhier XDMAC support"
655 depends on ARCH_UNIPHIER || COMPILE_TEST
658 select DMA_VIRTUAL_CHANNELS
660 Enable support for the XDMAC (external DMA controller) on the
661 UniPhier platform. This DMA controller can transfer data from
662 memory to memory, memory to peripheral and peripheral to memory.
665 tristate "APM X-Gene DMA support"
666 depends on ARCH_XGENE || COMPILE_TEST
668 select DMA_ENGINE_RAID
669 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
671 Enable support for the APM X-Gene SoC DMA engine.
674 tristate "Xilinx AXI DMAS Engine"
675 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
678 Enable support for Xilinx AXI VDMA Soft IP.
680 AXI VDMA engine provides high-bandwidth direct memory access
681 between memory and AXI4-Stream video type target
682 peripherals including peripherals which support AXI4-
683 Stream Video Protocol. It has two stream interfaces/
684 channels, Memory Mapped to Stream (MM2S) and Stream to
685 Memory Mapped (S2MM) for the data transfers.
686 AXI CDMA engine provides high-bandwidth direct memory access
687 between a memory-mapped source address and a memory-mapped
689 AXI DMA engine provides high-bandwidth one dimensional direct
690 memory access between memory and AXI4-Stream target peripherals.
691 AXI MCDMA engine provides high-bandwidth direct memory access
692 between memory and AXI4-Stream target peripherals. It provides
693 the scatter gather interface with multiple channels independent
694 configuration support.
696 config XILINX_ZYNQMP_DMA
697 tristate "Xilinx ZynqMP DMA Engine"
698 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
701 Enable support for Xilinx ZynqMP DMA controller.
703 config XILINX_ZYNQMP_DPDMA
704 tristate "Xilinx DPDMA Engine"
706 select DMA_VIRTUAL_CHANNELS
708 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
709 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
710 driver provides the dmaengine required by the DisplayPort subsystem
714 tristate "ZTE ZX DMA support"
715 depends on ARCH_ZX || COMPILE_TEST
717 select DMA_VIRTUAL_CHANNELS
719 Support the DMA engine for ZTE ZX family platform devices.
723 source "drivers/dma/bestcomm/Kconfig"
725 source "drivers/dma/mediatek/Kconfig"
727 source "drivers/dma/qcom/Kconfig"
729 source "drivers/dma/dw/Kconfig"
731 source "drivers/dma/dw-edma/Kconfig"
733 source "drivers/dma/hsu/Kconfig"
735 source "drivers/dma/sf-pdma/Kconfig"
737 source "drivers/dma/sh/Kconfig"
739 source "drivers/dma/ti/Kconfig"
741 source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
744 comment "DMA Clients"
745 depends on DMA_ENGINE
748 bool "Async_tx: Offload support for the async_tx api"
749 depends on DMA_ENGINE
751 This allows the async_tx api to take advantage of offload engines for
752 memcpy, memset, xor, and raid6 p+q operations. If your platform has
753 a dma engine that can perform raid operations and you have enabled
759 tristate "DMA Test client"
760 depends on DMA_ENGINE
761 select DMA_ENGINE_RAID
763 Simple DMA test client. Say N unless you're debugging a
766 config DMA_ENGINE_RAID