1 // SPDX-License-Identifier: GPL-2.0
3 * FPGA Freeze Bridge Controller
5 * Copyright (C) 2016 Altera Corporation. All rights reserved.
7 #include <linux/delay.h>
9 #include <linux/kernel.h>
10 #include <linux/of_device.h>
11 #include <linux/module.h>
12 #include <linux/fpga/fpga-bridge.h>
14 #define FREEZE_CSR_STATUS_OFFSET 0
15 #define FREEZE_CSR_CTRL_OFFSET 4
16 #define FREEZE_CSR_ILLEGAL_REQ_OFFSET 8
17 #define FREEZE_CSR_REG_VERSION 12
19 #define FREEZE_CSR_SUPPORTED_VERSION 2
20 #define FREEZE_CSR_OFFICIAL_VERSION 0xad000003
22 #define FREEZE_CSR_STATUS_FREEZE_REQ_DONE BIT(0)
23 #define FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE BIT(1)
25 #define FREEZE_CSR_CTRL_FREEZE_REQ BIT(0)
26 #define FREEZE_CSR_CTRL_RESET_REQ BIT(1)
27 #define FREEZE_CSR_CTRL_UNFREEZE_REQ BIT(2)
29 #define FREEZE_BRIDGE_NAME "freeze"
31 struct altera_freeze_br_data
{
33 void __iomem
*base_addr
;
38 * Poll status until status bit is set or we have a timeout.
40 static int altera_freeze_br_req_ack(struct altera_freeze_br_data
*priv
,
41 u32 timeout
, u32 req_ack
)
43 struct device
*dev
= priv
->dev
;
44 void __iomem
*csr_illegal_req_addr
= priv
->base_addr
+
45 FREEZE_CSR_ILLEGAL_REQ_OFFSET
;
46 u32 status
, illegal
, ctrl
;
50 illegal
= readl(csr_illegal_req_addr
);
52 dev_err(dev
, "illegal request detected 0x%x", illegal
);
54 writel(1, csr_illegal_req_addr
);
56 illegal
= readl(csr_illegal_req_addr
);
58 dev_err(dev
, "illegal request not cleared 0x%x",
65 status
= readl(priv
->base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
66 dev_dbg(dev
, "%s %x %x\n", __func__
, status
, req_ack
);
69 ctrl
= readl(priv
->base_addr
+ FREEZE_CSR_CTRL_OFFSET
);
70 dev_dbg(dev
, "%s request %x acknowledged %x %x\n",
71 __func__
, req_ack
, status
, ctrl
);
79 if (ret
== -ETIMEDOUT
)
80 dev_err(dev
, "%s timeout waiting for 0x%x\n",
86 static int altera_freeze_br_do_freeze(struct altera_freeze_br_data
*priv
,
89 struct device
*dev
= priv
->dev
;
90 void __iomem
*csr_ctrl_addr
= priv
->base_addr
+
91 FREEZE_CSR_CTRL_OFFSET
;
95 status
= readl(priv
->base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
97 dev_dbg(dev
, "%s %d %d\n", __func__
, status
, readl(csr_ctrl_addr
));
99 if (status
& FREEZE_CSR_STATUS_FREEZE_REQ_DONE
) {
100 dev_dbg(dev
, "%s bridge already disabled %d\n",
103 } else if (!(status
& FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE
)) {
104 dev_err(dev
, "%s bridge not enabled %d\n", __func__
, status
);
108 writel(FREEZE_CSR_CTRL_FREEZE_REQ
, csr_ctrl_addr
);
110 ret
= altera_freeze_br_req_ack(priv
, timeout
,
111 FREEZE_CSR_STATUS_FREEZE_REQ_DONE
);
114 writel(0, csr_ctrl_addr
);
116 writel(FREEZE_CSR_CTRL_RESET_REQ
, csr_ctrl_addr
);
121 static int altera_freeze_br_do_unfreeze(struct altera_freeze_br_data
*priv
,
124 struct device
*dev
= priv
->dev
;
125 void __iomem
*csr_ctrl_addr
= priv
->base_addr
+
126 FREEZE_CSR_CTRL_OFFSET
;
130 writel(0, csr_ctrl_addr
);
132 status
= readl(priv
->base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
134 dev_dbg(dev
, "%s %d %d\n", __func__
, status
, readl(csr_ctrl_addr
));
136 if (status
& FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE
) {
137 dev_dbg(dev
, "%s bridge already enabled %d\n",
140 } else if (!(status
& FREEZE_CSR_STATUS_FREEZE_REQ_DONE
)) {
141 dev_err(dev
, "%s bridge not frozen %d\n", __func__
, status
);
145 writel(FREEZE_CSR_CTRL_UNFREEZE_REQ
, csr_ctrl_addr
);
147 ret
= altera_freeze_br_req_ack(priv
, timeout
,
148 FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE
);
150 status
= readl(priv
->base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
152 dev_dbg(dev
, "%s %d %d\n", __func__
, status
, readl(csr_ctrl_addr
));
154 writel(0, csr_ctrl_addr
);
160 * enable = 1 : allow traffic through the bridge
161 * enable = 0 : disable traffic through the bridge
163 static int altera_freeze_br_enable_set(struct fpga_bridge
*bridge
,
166 struct altera_freeze_br_data
*priv
= bridge
->priv
;
167 struct fpga_image_info
*info
= bridge
->info
;
173 timeout
= info
->enable_timeout_us
;
175 ret
= altera_freeze_br_do_unfreeze(bridge
->priv
, timeout
);
178 timeout
= info
->disable_timeout_us
;
180 ret
= altera_freeze_br_do_freeze(bridge
->priv
, timeout
);
184 priv
->enable
= enable
;
189 static int altera_freeze_br_enable_show(struct fpga_bridge
*bridge
)
191 struct altera_freeze_br_data
*priv
= bridge
->priv
;
196 static const struct fpga_bridge_ops altera_freeze_br_br_ops
= {
197 .enable_set
= altera_freeze_br_enable_set
,
198 .enable_show
= altera_freeze_br_enable_show
,
201 static const struct of_device_id altera_freeze_br_of_match
[] = {
202 { .compatible
= "altr,freeze-bridge-controller", },
205 MODULE_DEVICE_TABLE(of
, altera_freeze_br_of_match
);
207 static int altera_freeze_br_probe(struct platform_device
*pdev
)
209 struct device
*dev
= &pdev
->dev
;
210 struct device_node
*np
= pdev
->dev
.of_node
;
211 void __iomem
*base_addr
;
212 struct altera_freeze_br_data
*priv
;
213 struct fpga_bridge
*br
;
214 struct resource
*res
;
215 u32 status
, revision
;
220 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
221 base_addr
= devm_ioremap_resource(dev
, res
);
222 if (IS_ERR(base_addr
))
223 return PTR_ERR(base_addr
);
225 revision
= readl(base_addr
+ FREEZE_CSR_REG_VERSION
);
226 if ((revision
!= FREEZE_CSR_SUPPORTED_VERSION
) &&
227 (revision
!= FREEZE_CSR_OFFICIAL_VERSION
)) {
229 "%s unexpected revision 0x%x != 0x%x != 0x%x\n",
230 __func__
, revision
, FREEZE_CSR_SUPPORTED_VERSION
,
231 FREEZE_CSR_OFFICIAL_VERSION
);
235 priv
= devm_kzalloc(dev
, sizeof(*priv
), GFP_KERNEL
);
241 status
= readl(base_addr
+ FREEZE_CSR_STATUS_OFFSET
);
242 if (status
& FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE
)
245 priv
->base_addr
= base_addr
;
247 br
= devm_fpga_bridge_create(dev
, FREEZE_BRIDGE_NAME
,
248 &altera_freeze_br_br_ops
, priv
);
252 platform_set_drvdata(pdev
, br
);
254 return fpga_bridge_register(br
);
257 static int altera_freeze_br_remove(struct platform_device
*pdev
)
259 struct fpga_bridge
*br
= platform_get_drvdata(pdev
);
261 fpga_bridge_unregister(br
);
266 static struct platform_driver altera_freeze_br_driver
= {
267 .probe
= altera_freeze_br_probe
,
268 .remove
= altera_freeze_br_remove
,
270 .name
= "altera_freeze_br",
271 .of_match_table
= of_match_ptr(altera_freeze_br_of_match
),
275 module_platform_driver(altera_freeze_br_driver
);
277 MODULE_DESCRIPTION("Altera Freeze Bridge");
278 MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
279 MODULE_LICENSE("GPL v2");