1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale MXS On-Chip OTP driver
5 * Copyright (C) 2015 Stefan Wahren <stefan.wahren@i2se.com>
7 * Based on the driver from Huang Shijie and Christoph G. Baumann
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/err.h>
14 #include <linux/module.h>
15 #include <linux/nvmem-provider.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/stmp_device.h>
21 /* OCOTP registers and bits */
23 #define BM_OCOTP_CTRL_RD_BANK_OPEN BIT(12)
24 #define BM_OCOTP_CTRL_ERROR BIT(9)
25 #define BM_OCOTP_CTRL_BUSY BIT(8)
27 #define OCOTP_TIMEOUT 10000
28 #define OCOTP_DATA_OFFSET 0x20
33 struct nvmem_device
*nvmem
;
36 static int mxs_ocotp_wait(struct mxs_ocotp
*otp
)
38 int timeout
= OCOTP_TIMEOUT
;
39 unsigned int status
= 0;
42 status
= readl(otp
->base
);
44 if (!(status
& (BM_OCOTP_CTRL_BUSY
| BM_OCOTP_CTRL_ERROR
)))
50 if (status
& BM_OCOTP_CTRL_BUSY
)
52 else if (status
& BM_OCOTP_CTRL_ERROR
)
58 static int mxs_ocotp_read(void *context
, unsigned int offset
,
59 void *val
, size_t bytes
)
61 struct mxs_ocotp
*otp
= context
;
65 ret
= clk_enable(otp
->clk
);
69 writel(BM_OCOTP_CTRL_ERROR
, otp
->base
+ STMP_OFFSET_REG_CLR
);
71 ret
= mxs_ocotp_wait(otp
);
75 /* open OCOTP banks for read */
76 writel(BM_OCOTP_CTRL_RD_BANK_OPEN
, otp
->base
+ STMP_OFFSET_REG_SET
);
78 /* approximately wait 33 hclk cycles */
81 ret
= mxs_ocotp_wait(otp
);
86 if ((offset
< OCOTP_DATA_OFFSET
) || (offset
% 16)) {
87 /* fill up non-data register */
90 *buf
++ = readl(otp
->base
+ offset
);
98 /* close banks for power saving */
99 writel(BM_OCOTP_CTRL_RD_BANK_OPEN
, otp
->base
+ STMP_OFFSET_REG_CLR
);
102 clk_disable(otp
->clk
);
107 static struct nvmem_config ocotp_config
= {
111 .reg_read
= mxs_ocotp_read
,
118 static const struct mxs_data imx23_data
= {
122 static const struct mxs_data imx28_data
= {
126 static const struct of_device_id mxs_ocotp_match
[] = {
127 { .compatible
= "fsl,imx23-ocotp", .data
= &imx23_data
},
128 { .compatible
= "fsl,imx28-ocotp", .data
= &imx28_data
},
131 MODULE_DEVICE_TABLE(of
, mxs_ocotp_match
);
133 static void mxs_ocotp_action(void *data
)
138 static int mxs_ocotp_probe(struct platform_device
*pdev
)
140 struct device
*dev
= &pdev
->dev
;
141 const struct mxs_data
*data
;
142 struct mxs_ocotp
*otp
;
143 const struct of_device_id
*match
;
146 match
= of_match_device(dev
->driver
->of_match_table
, dev
);
147 if (!match
|| !match
->data
)
150 otp
= devm_kzalloc(dev
, sizeof(*otp
), GFP_KERNEL
);
154 otp
->base
= devm_platform_ioremap_resource(pdev
, 0);
155 if (IS_ERR(otp
->base
))
156 return PTR_ERR(otp
->base
);
158 otp
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
159 if (IS_ERR(otp
->clk
))
160 return PTR_ERR(otp
->clk
);
162 ret
= clk_prepare(otp
->clk
);
164 dev_err(dev
, "failed to prepare clk: %d\n", ret
);
168 ret
= devm_add_action_or_reset(&pdev
->dev
, mxs_ocotp_action
, otp
->clk
);
174 ocotp_config
.size
= data
->size
;
175 ocotp_config
.priv
= otp
;
176 ocotp_config
.dev
= dev
;
177 otp
->nvmem
= devm_nvmem_register(dev
, &ocotp_config
);
178 if (IS_ERR(otp
->nvmem
))
179 return PTR_ERR(otp
->nvmem
);
181 platform_set_drvdata(pdev
, otp
);
186 static struct platform_driver mxs_ocotp_driver
= {
187 .probe
= mxs_ocotp_probe
,
190 .of_match_table
= mxs_ocotp_match
,
194 module_platform_driver(mxs_ocotp_driver
);
195 MODULE_AUTHOR("Stefan Wahren <wahrenst@gmx.net");
196 MODULE_DESCRIPTION("driver for OCOTP in i.MX23/i.MX28");
197 MODULE_LICENSE("GPL v2");