Merge tag 'trace-v5.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt...
[linux/fpc-iii.git] / drivers / perf / arm_pmu_platform.c
blob933bd8410fc2afa94eb186c6be3c58148ea41837
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * platform_device probing code for ARM performance counters.
5 * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
6 * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
7 */
8 #define pr_fmt(fmt) "hw perfevents: " fmt
10 #include <linux/bug.h>
11 #include <linux/cpumask.h>
12 #include <linux/device.h>
13 #include <linux/errno.h>
14 #include <linux/irq.h>
15 #include <linux/irqdesc.h>
16 #include <linux/kconfig.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/percpu.h>
20 #include <linux/perf/arm_pmu.h>
21 #include <linux/platform_device.h>
22 #include <linux/printk.h>
23 #include <linux/smp.h>
25 static int probe_current_pmu(struct arm_pmu *pmu,
26 const struct pmu_probe_info *info)
28 int cpu = get_cpu();
29 unsigned int cpuid = read_cpuid_id();
30 int ret = -ENODEV;
32 pr_info("probing PMU on CPU %d\n", cpu);
34 for (; info->init != NULL; info++) {
35 if ((cpuid & info->mask) != info->cpuid)
36 continue;
37 ret = info->init(pmu);
38 break;
41 put_cpu();
42 return ret;
45 static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
47 int cpu, ret;
48 struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
50 ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
51 if (ret)
52 return ret;
54 for_each_cpu(cpu, &pmu->supported_cpus)
55 per_cpu(hw_events->irq, cpu) = irq;
57 return 0;
60 static bool pmu_has_irq_affinity(struct device_node *node)
62 return !!of_find_property(node, "interrupt-affinity", NULL);
65 static int pmu_parse_irq_affinity(struct device_node *node, int i)
67 struct device_node *dn;
68 int cpu;
71 * If we don't have an interrupt-affinity property, we guess irq
72 * affinity matches our logical CPU order, as we used to assume.
73 * This is fragile, so we'll warn in pmu_parse_irqs().
75 if (!pmu_has_irq_affinity(node))
76 return i;
78 dn = of_parse_phandle(node, "interrupt-affinity", i);
79 if (!dn) {
80 pr_warn("failed to parse interrupt-affinity[%d] for %pOFn\n",
81 i, node);
82 return -EINVAL;
85 cpu = of_cpu_node_to_id(dn);
86 if (cpu < 0) {
87 pr_warn("failed to find logical CPU for %pOFn\n", dn);
88 cpu = nr_cpu_ids;
91 of_node_put(dn);
93 return cpu;
96 static int pmu_parse_irqs(struct arm_pmu *pmu)
98 int i = 0, num_irqs;
99 struct platform_device *pdev = pmu->plat_device;
100 struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
102 num_irqs = platform_irq_count(pdev);
103 if (num_irqs < 0) {
104 pr_err("unable to count PMU IRQs\n");
105 return num_irqs;
109 * In this case we have no idea which CPUs are covered by the PMU.
110 * To match our prior behaviour, we assume all CPUs in this case.
112 if (num_irqs == 0) {
113 pr_warn("no irqs for PMU, sampling events not supported\n");
114 pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
115 cpumask_setall(&pmu->supported_cpus);
116 return 0;
119 if (num_irqs == 1) {
120 int irq = platform_get_irq(pdev, 0);
121 if (irq && irq_is_percpu_devid(irq))
122 return pmu_parse_percpu_irq(pmu, irq);
125 if (nr_cpu_ids != 1 && !pmu_has_irq_affinity(pdev->dev.of_node)) {
126 pr_warn("no interrupt-affinity property for %pOF, guessing.\n",
127 pdev->dev.of_node);
130 for (i = 0; i < num_irqs; i++) {
131 int cpu, irq;
133 irq = platform_get_irq(pdev, i);
134 if (WARN_ON(irq <= 0))
135 continue;
137 if (irq_is_percpu_devid(irq)) {
138 pr_warn("multiple PPIs or mismatched SPI/PPI detected\n");
139 return -EINVAL;
142 cpu = pmu_parse_irq_affinity(pdev->dev.of_node, i);
143 if (cpu < 0)
144 return cpu;
145 if (cpu >= nr_cpu_ids)
146 continue;
148 if (per_cpu(hw_events->irq, cpu)) {
149 pr_warn("multiple PMU IRQs for the same CPU detected\n");
150 return -EINVAL;
153 per_cpu(hw_events->irq, cpu) = irq;
154 cpumask_set_cpu(cpu, &pmu->supported_cpus);
157 return 0;
160 static int armpmu_request_irqs(struct arm_pmu *armpmu)
162 struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
163 int cpu, err = 0;
165 for_each_cpu(cpu, &armpmu->supported_cpus) {
166 int irq = per_cpu(hw_events->irq, cpu);
167 if (!irq)
168 continue;
170 err = armpmu_request_irq(irq, cpu);
171 if (err)
172 break;
175 return err;
178 static void armpmu_free_irqs(struct arm_pmu *armpmu)
180 int cpu;
181 struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
183 for_each_cpu(cpu, &armpmu->supported_cpus) {
184 int irq = per_cpu(hw_events->irq, cpu);
186 armpmu_free_irq(irq, cpu);
190 int arm_pmu_device_probe(struct platform_device *pdev,
191 const struct of_device_id *of_table,
192 const struct pmu_probe_info *probe_table)
194 const struct of_device_id *of_id;
195 armpmu_init_fn init_fn;
196 struct device_node *node = pdev->dev.of_node;
197 struct arm_pmu *pmu;
198 int ret = -ENODEV;
200 pmu = armpmu_alloc();
201 if (!pmu)
202 return -ENOMEM;
204 pmu->plat_device = pdev;
206 ret = pmu_parse_irqs(pmu);
207 if (ret)
208 goto out_free;
210 if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
211 init_fn = of_id->data;
213 pmu->secure_access = of_property_read_bool(pdev->dev.of_node,
214 "secure-reg-access");
216 /* arm64 systems boot only as non-secure */
217 if (IS_ENABLED(CONFIG_ARM64) && pmu->secure_access) {
218 pr_warn("ignoring \"secure-reg-access\" property for arm64\n");
219 pmu->secure_access = false;
222 ret = init_fn(pmu);
223 } else if (probe_table) {
224 cpumask_setall(&pmu->supported_cpus);
225 ret = probe_current_pmu(pmu, probe_table);
228 if (ret) {
229 pr_info("%pOF: failed to probe PMU!\n", node);
230 goto out_free;
233 ret = armpmu_request_irqs(pmu);
234 if (ret)
235 goto out_free_irqs;
237 ret = armpmu_register(pmu);
238 if (ret)
239 goto out_free;
241 return 0;
243 out_free_irqs:
244 armpmu_free_irqs(pmu);
245 out_free:
246 pr_info("%pOF: failed to register PMU devices!\n", node);
247 armpmu_free(pmu);
248 return ret;