1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PWM device driver for ST SoCs
5 * Copyright (C) 2013-2016 STMicroelectronics (R&D) Limited
7 * Author: Ajit Pal Singh <ajitpal.singh@st.com>
8 * Lee Jones <lee.jones@linaro.org>
11 #include <linux/clk.h>
12 #include <linux/interrupt.h>
13 #include <linux/math64.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/pwm.h>
19 #include <linux/regmap.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <linux/time.h>
23 #include <linux/wait.h>
25 #define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */
26 #define PWM_CPT_VAL(x) (0x10 + (4 * (x))) /* Capture value */
27 #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */
29 #define STI_PWM_CTRL 0x50 /* Control/Config register */
30 #define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */
31 #define STI_INT_STA 0x58 /* Interrupt Status register */
32 #define PWM_INT_ACK 0x5c
33 #define PWM_PRESCALE_LOW_MASK 0x0f
34 #define PWM_PRESCALE_HIGH_MASK 0xf0
35 #define PWM_CPT_EDGE_MASK 0x03
36 #define PWM_INT_ACK_MASK 0x1ff
38 #define STI_MAX_CPT_DEVS 4
39 #define CPT_DC_MAX 0xff
59 * Each capture input can be programmed to detect rising-edge, falling-edge,
60 * either edge or neither egde.
69 struct sti_cpt_ddata
{
73 wait_queue_head_t wait
;
76 struct sti_pwm_compat_data
{
77 const struct reg_field
*reg_fields
;
78 unsigned int pwm_num_devs
;
79 unsigned int cpt_num_devs
;
80 unsigned int max_pwm_cnt
;
81 unsigned int max_prescale
;
88 struct regmap
*regmap
;
89 struct sti_pwm_compat_data
*cdata
;
90 struct regmap_field
*prescale_low
;
91 struct regmap_field
*prescale_high
;
92 struct regmap_field
*pwm_out_en
;
93 struct regmap_field
*pwm_cpt_en
;
94 struct regmap_field
*pwm_cpt_int_en
;
95 struct regmap_field
*pwm_cpt_int_stat
;
97 struct pwm_device
*cur
;
98 unsigned long configured
;
99 unsigned int en_count
;
100 struct mutex sti_pwm_lock
; /* To sync between enable/disable calls */
104 static const struct reg_field sti_pwm_regfields
[MAX_REGFIELDS
] = {
105 [PWMCLK_PRESCALE_LOW
] = REG_FIELD(STI_PWM_CTRL
, 0, 3),
106 [PWMCLK_PRESCALE_HIGH
] = REG_FIELD(STI_PWM_CTRL
, 11, 14),
107 [CPTCLK_PRESCALE
] = REG_FIELD(STI_PWM_CTRL
, 4, 8),
108 [PWM_OUT_EN
] = REG_FIELD(STI_PWM_CTRL
, 9, 9),
109 [PWM_CPT_EN
] = REG_FIELD(STI_PWM_CTRL
, 10, 10),
110 [PWM_CPT_INT_EN
] = REG_FIELD(STI_INT_EN
, 1, 4),
111 [PWM_CPT_INT_STAT
] = REG_FIELD(STI_INT_STA
, 1, 4),
114 static inline struct sti_pwm_chip
*to_sti_pwmchip(struct pwm_chip
*chip
)
116 return container_of(chip
, struct sti_pwm_chip
, chip
);
120 * Calculate the prescaler value corresponding to the period.
122 static int sti_pwm_get_prescale(struct sti_pwm_chip
*pc
, unsigned long period
,
123 unsigned int *prescale
)
125 struct sti_pwm_compat_data
*cdata
= pc
->cdata
;
126 unsigned long clk_rate
;
130 clk_rate
= clk_get_rate(pc
->pwm_clk
);
132 dev_err(pc
->dev
, "failed to get clock rate\n");
137 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_cnt + 1)) - 1
139 value
= NSEC_PER_SEC
/ clk_rate
;
140 value
*= cdata
->max_pwm_cnt
+ 1;
145 ps
= period
/ value
- 1;
146 if (ps
> cdata
->max_prescale
)
155 * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. The
156 * only way to change the period (apart from changing the PWM input clock) is
157 * to change the PWM clock prescaler.
159 * The prescaler is of 8 bits, so 256 prescaler values and hence 256 possible
160 * period values are supported (for a particular clock rate). The requested
161 * period will be applied only if it matches one of these 256 values.
163 static int sti_pwm_config(struct pwm_chip
*chip
, struct pwm_device
*pwm
,
164 int duty_ns
, int period_ns
)
166 struct sti_pwm_chip
*pc
= to_sti_pwmchip(chip
);
167 struct sti_pwm_compat_data
*cdata
= pc
->cdata
;
168 unsigned int ncfg
, value
, prescale
= 0;
169 struct pwm_device
*cur
= pc
->cur
;
170 struct device
*dev
= pc
->dev
;
171 bool period_same
= false;
174 ncfg
= hweight_long(pc
->configured
);
176 period_same
= (period_ns
== pwm_get_period(cur
));
179 * Allow configuration changes if one of the following conditions
181 * 1. No devices have been configured.
182 * 2. Only one device has been configured and the new request is for
184 * 3. Only one device has been configured and the new request is for
185 * a new device and period of the new device is same as the current
187 * 4. More than one devices are configured and period of the new
188 * requestis the same as the current period.
191 ((ncfg
== 1) && (pwm
->hwpwm
== cur
->hwpwm
)) ||
192 ((ncfg
== 1) && (pwm
->hwpwm
!= cur
->hwpwm
) && period_same
) ||
193 ((ncfg
> 1) && period_same
)) {
194 /* Enable clock before writing to PWM registers. */
195 ret
= clk_enable(pc
->pwm_clk
);
199 ret
= clk_enable(pc
->cpt_clk
);
204 ret
= sti_pwm_get_prescale(pc
, period_ns
, &prescale
);
208 value
= prescale
& PWM_PRESCALE_LOW_MASK
;
210 ret
= regmap_field_write(pc
->prescale_low
, value
);
214 value
= (prescale
& PWM_PRESCALE_HIGH_MASK
) >> 4;
216 ret
= regmap_field_write(pc
->prescale_high
, value
);
222 * When PWMVal == 0, PWM pulse = 1 local clock cycle.
223 * When PWMVal == max_pwm_count,
224 * PWM pulse = (max_pwm_count + 1) local cycles,
225 * that is continuous pulse: signal never goes low.
227 value
= cdata
->max_pwm_cnt
* duty_ns
/ period_ns
;
229 ret
= regmap_write(pc
->regmap
, PWM_OUT_VAL(pwm
->hwpwm
), value
);
233 ret
= regmap_field_write(pc
->pwm_cpt_int_en
, 0);
235 set_bit(pwm
->hwpwm
, &pc
->configured
);
238 dev_dbg(dev
, "prescale:%u, period:%i, duty:%i, value:%u\n",
239 prescale
, period_ns
, duty_ns
, value
);
245 clk_disable(pc
->pwm_clk
);
246 clk_disable(pc
->cpt_clk
);
250 static int sti_pwm_enable(struct pwm_chip
*chip
, struct pwm_device
*pwm
)
252 struct sti_pwm_chip
*pc
= to_sti_pwmchip(chip
);
253 struct device
*dev
= pc
->dev
;
257 * Since we have a common enable for all PWM devices, do not enable if
260 mutex_lock(&pc
->sti_pwm_lock
);
263 ret
= clk_enable(pc
->pwm_clk
);
267 ret
= clk_enable(pc
->cpt_clk
);
271 ret
= regmap_field_write(pc
->pwm_out_en
, 1);
273 dev_err(dev
, "failed to enable PWM device %u: %d\n",
282 mutex_unlock(&pc
->sti_pwm_lock
);
286 static void sti_pwm_disable(struct pwm_chip
*chip
, struct pwm_device
*pwm
)
288 struct sti_pwm_chip
*pc
= to_sti_pwmchip(chip
);
290 mutex_lock(&pc
->sti_pwm_lock
);
292 if (--pc
->en_count
) {
293 mutex_unlock(&pc
->sti_pwm_lock
);
297 regmap_field_write(pc
->pwm_out_en
, 0);
299 clk_disable(pc
->pwm_clk
);
300 clk_disable(pc
->cpt_clk
);
302 mutex_unlock(&pc
->sti_pwm_lock
);
305 static void sti_pwm_free(struct pwm_chip
*chip
, struct pwm_device
*pwm
)
307 struct sti_pwm_chip
*pc
= to_sti_pwmchip(chip
);
309 clear_bit(pwm
->hwpwm
, &pc
->configured
);
312 static int sti_pwm_capture(struct pwm_chip
*chip
, struct pwm_device
*pwm
,
313 struct pwm_capture
*result
, unsigned long timeout
)
315 struct sti_pwm_chip
*pc
= to_sti_pwmchip(chip
);
316 struct sti_pwm_compat_data
*cdata
= pc
->cdata
;
317 struct sti_cpt_ddata
*ddata
= pwm_get_chip_data(pwm
);
318 struct device
*dev
= pc
->dev
;
319 unsigned int effective_ticks
;
320 unsigned long long high
, low
;
323 if (pwm
->hwpwm
>= cdata
->cpt_num_devs
) {
324 dev_err(dev
, "device %u is not valid\n", pwm
->hwpwm
);
328 mutex_lock(&ddata
->lock
);
331 /* Prepare capture measurement */
332 regmap_write(pc
->regmap
, PWM_CPT_EDGE(pwm
->hwpwm
), CPT_EDGE_RISING
);
333 regmap_field_write(pc
->pwm_cpt_int_en
, BIT(pwm
->hwpwm
));
336 ret
= regmap_field_write(pc
->pwm_cpt_en
, 1);
338 dev_err(dev
, "failed to enable PWM capture %u: %d\n",
343 ret
= wait_event_interruptible_timeout(ddata
->wait
, ddata
->index
> 1,
344 msecs_to_jiffies(timeout
));
346 regmap_write(pc
->regmap
, PWM_CPT_EDGE(pwm
->hwpwm
), CPT_EDGE_DISABLED
);
348 if (ret
== -ERESTARTSYS
)
351 switch (ddata
->index
) {
355 * Getting here could mean:
356 * - input signal is constant of less than 1 Hz
357 * - there is no input signal at all
359 * In such case the frequency is rounded down to 0
362 result
->duty_cycle
= 0;
367 /* We have everying we need */
368 high
= ddata
->snapshot
[1] - ddata
->snapshot
[0];
369 low
= ddata
->snapshot
[2] - ddata
->snapshot
[1];
371 effective_ticks
= clk_get_rate(pc
->cpt_clk
);
373 result
->period
= (high
+ low
) * NSEC_PER_SEC
;
374 result
->period
/= effective_ticks
;
376 result
->duty_cycle
= high
* NSEC_PER_SEC
;
377 result
->duty_cycle
/= effective_ticks
;
382 dev_err(dev
, "internal error\n");
387 /* Disable capture */
388 regmap_field_write(pc
->pwm_cpt_en
, 0);
390 mutex_unlock(&ddata
->lock
);
394 static const struct pwm_ops sti_pwm_ops
= {
395 .capture
= sti_pwm_capture
,
396 .config
= sti_pwm_config
,
397 .enable
= sti_pwm_enable
,
398 .disable
= sti_pwm_disable
,
399 .free
= sti_pwm_free
,
400 .owner
= THIS_MODULE
,
403 static irqreturn_t
sti_pwm_interrupt(int irq
, void *data
)
405 struct sti_pwm_chip
*pc
= data
;
406 struct device
*dev
= pc
->dev
;
407 struct sti_cpt_ddata
*ddata
;
409 unsigned int cpt_int_stat
;
413 ret
= regmap_field_read(pc
->pwm_cpt_int_stat
, &cpt_int_stat
);
417 while (cpt_int_stat
) {
418 devicenum
= ffs(cpt_int_stat
) - 1;
420 ddata
= pwm_get_chip_data(&pc
->chip
.pwms
[devicenum
]);
426 * __| |_________________| |________
429 * Capture start by the first available rising edge. When a
430 * capture event occurs, capture value (CPT_VALx) is stored,
431 * index incremented, capture edge changed.
433 * After the capture, if the index > 1, we have collected the
434 * necessary data so we signal the thread waiting for it and
435 * disable the capture by setting capture edge to none
438 regmap_read(pc
->regmap
,
439 PWM_CPT_VAL(devicenum
),
440 &ddata
->snapshot
[ddata
->index
]);
442 switch (ddata
->index
) {
445 regmap_read(pc
->regmap
, PWM_CPT_EDGE(devicenum
), ®
);
446 reg
^= PWM_CPT_EDGE_MASK
;
447 regmap_write(pc
->regmap
, PWM_CPT_EDGE(devicenum
), reg
);
453 regmap_write(pc
->regmap
,
454 PWM_CPT_EDGE(devicenum
),
456 wake_up(&ddata
->wait
);
460 dev_err(dev
, "Internal error\n");
463 cpt_int_stat
&= ~BIT_MASK(devicenum
);
468 /* Just ACK everything */
469 regmap_write(pc
->regmap
, PWM_INT_ACK
, PWM_INT_ACK_MASK
);
474 static int sti_pwm_probe_dt(struct sti_pwm_chip
*pc
)
476 struct device
*dev
= pc
->dev
;
477 const struct reg_field
*reg_fields
;
478 struct device_node
*np
= dev
->of_node
;
479 struct sti_pwm_compat_data
*cdata
= pc
->cdata
;
483 ret
= of_property_read_u32(np
, "st,pwm-num-chan", &num_devs
);
485 cdata
->pwm_num_devs
= num_devs
;
487 ret
= of_property_read_u32(np
, "st,capture-num-chan", &num_devs
);
489 cdata
->cpt_num_devs
= num_devs
;
491 if (!cdata
->pwm_num_devs
&& !cdata
->cpt_num_devs
) {
492 dev_err(dev
, "No channels configured\n");
496 reg_fields
= cdata
->reg_fields
;
498 pc
->prescale_low
= devm_regmap_field_alloc(dev
, pc
->regmap
,
499 reg_fields
[PWMCLK_PRESCALE_LOW
]);
500 if (IS_ERR(pc
->prescale_low
))
501 return PTR_ERR(pc
->prescale_low
);
503 pc
->prescale_high
= devm_regmap_field_alloc(dev
, pc
->regmap
,
504 reg_fields
[PWMCLK_PRESCALE_HIGH
]);
505 if (IS_ERR(pc
->prescale_high
))
506 return PTR_ERR(pc
->prescale_high
);
508 pc
->pwm_out_en
= devm_regmap_field_alloc(dev
, pc
->regmap
,
509 reg_fields
[PWM_OUT_EN
]);
510 if (IS_ERR(pc
->pwm_out_en
))
511 return PTR_ERR(pc
->pwm_out_en
);
513 pc
->pwm_cpt_en
= devm_regmap_field_alloc(dev
, pc
->regmap
,
514 reg_fields
[PWM_CPT_EN
]);
515 if (IS_ERR(pc
->pwm_cpt_en
))
516 return PTR_ERR(pc
->pwm_cpt_en
);
518 pc
->pwm_cpt_int_en
= devm_regmap_field_alloc(dev
, pc
->regmap
,
519 reg_fields
[PWM_CPT_INT_EN
]);
520 if (IS_ERR(pc
->pwm_cpt_int_en
))
521 return PTR_ERR(pc
->pwm_cpt_int_en
);
523 pc
->pwm_cpt_int_stat
= devm_regmap_field_alloc(dev
, pc
->regmap
,
524 reg_fields
[PWM_CPT_INT_STAT
]);
525 if (PTR_ERR_OR_ZERO(pc
->pwm_cpt_int_stat
))
526 return PTR_ERR(pc
->pwm_cpt_int_stat
);
531 static const struct regmap_config sti_pwm_regmap_config
= {
537 static int sti_pwm_probe(struct platform_device
*pdev
)
539 struct device
*dev
= &pdev
->dev
;
540 struct sti_pwm_compat_data
*cdata
;
541 struct sti_pwm_chip
*pc
;
545 pc
= devm_kzalloc(dev
, sizeof(*pc
), GFP_KERNEL
);
549 cdata
= devm_kzalloc(dev
, sizeof(*cdata
), GFP_KERNEL
);
553 pc
->mmio
= devm_platform_ioremap_resource(pdev
, 0);
554 if (IS_ERR(pc
->mmio
))
555 return PTR_ERR(pc
->mmio
);
557 pc
->regmap
= devm_regmap_init_mmio(dev
, pc
->mmio
,
558 &sti_pwm_regmap_config
);
559 if (IS_ERR(pc
->regmap
))
560 return PTR_ERR(pc
->regmap
);
562 irq
= platform_get_irq(pdev
, 0);
566 ret
= devm_request_irq(&pdev
->dev
, irq
, sti_pwm_interrupt
, 0,
569 dev_err(&pdev
->dev
, "Failed to request IRQ\n");
574 * Setup PWM data with default values: some values could be replaced
575 * with specific ones provided from Device Tree.
577 cdata
->reg_fields
= sti_pwm_regfields
;
578 cdata
->max_prescale
= 0xff;
579 cdata
->max_pwm_cnt
= 255;
580 cdata
->pwm_num_devs
= 0;
581 cdata
->cpt_num_devs
= 0;
586 mutex_init(&pc
->sti_pwm_lock
);
588 ret
= sti_pwm_probe_dt(pc
);
592 if (cdata
->pwm_num_devs
) {
593 pc
->pwm_clk
= of_clk_get_by_name(dev
->of_node
, "pwm");
594 if (IS_ERR(pc
->pwm_clk
)) {
595 dev_err(dev
, "failed to get PWM clock\n");
596 return PTR_ERR(pc
->pwm_clk
);
599 ret
= clk_prepare(pc
->pwm_clk
);
601 dev_err(dev
, "failed to prepare clock\n");
606 if (cdata
->cpt_num_devs
) {
607 pc
->cpt_clk
= of_clk_get_by_name(dev
->of_node
, "capture");
608 if (IS_ERR(pc
->cpt_clk
)) {
609 dev_err(dev
, "failed to get PWM capture clock\n");
610 return PTR_ERR(pc
->cpt_clk
);
613 ret
= clk_prepare(pc
->cpt_clk
);
615 dev_err(dev
, "failed to prepare clock\n");
621 pc
->chip
.ops
= &sti_pwm_ops
;
623 pc
->chip
.npwm
= pc
->cdata
->pwm_num_devs
;
625 ret
= pwmchip_add(&pc
->chip
);
627 clk_unprepare(pc
->pwm_clk
);
628 clk_unprepare(pc
->cpt_clk
);
632 for (i
= 0; i
< cdata
->cpt_num_devs
; i
++) {
633 struct sti_cpt_ddata
*ddata
;
635 ddata
= devm_kzalloc(dev
, sizeof(*ddata
), GFP_KERNEL
);
639 init_waitqueue_head(&ddata
->wait
);
640 mutex_init(&ddata
->lock
);
642 pwm_set_chip_data(&pc
->chip
.pwms
[i
], ddata
);
645 platform_set_drvdata(pdev
, pc
);
650 static int sti_pwm_remove(struct platform_device
*pdev
)
652 struct sti_pwm_chip
*pc
= platform_get_drvdata(pdev
);
655 for (i
= 0; i
< pc
->cdata
->pwm_num_devs
; i
++)
656 pwm_disable(&pc
->chip
.pwms
[i
]);
658 clk_unprepare(pc
->pwm_clk
);
659 clk_unprepare(pc
->cpt_clk
);
661 return pwmchip_remove(&pc
->chip
);
664 static const struct of_device_id sti_pwm_of_match
[] = {
665 { .compatible
= "st,sti-pwm", },
668 MODULE_DEVICE_TABLE(of
, sti_pwm_of_match
);
670 static struct platform_driver sti_pwm_driver
= {
673 .of_match_table
= sti_pwm_of_match
,
675 .probe
= sti_pwm_probe
,
676 .remove
= sti_pwm_remove
,
678 module_platform_driver(sti_pwm_driver
);
680 MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
681 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
682 MODULE_LICENSE("GPL");