1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2010
5 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
6 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
7 * Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
9 * AB8500 peripheral regulators
11 * AB8500 supports the following regulators:
12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
14 * AB8505 supports the following regulators:
15 * VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/err.h>
21 #include <linux/platform_device.h>
22 #include <linux/mfd/abx500.h>
23 #include <linux/mfd/abx500/ab8500.h>
25 #include <linux/regulator/of_regulator.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/machine.h>
28 #include <linux/regulator/ab8500.h>
29 #include <linux/slab.h>
32 * struct ab8500_shared_mode - is used when mode is shared between
34 * @shared_regulator: pointer to the other sharing regulator
35 * @lp_mode_req: low power mode requested by this regulator
37 struct ab8500_shared_mode
{
38 struct ab8500_regulator_info
*shared_regulator
;
43 * struct ab8500_regulator_info - ab8500 regulator information
44 * @dev: device pointer
45 * @desc: regulator description
46 * @shared_mode: used when mode is shared between two regulators
47 * @load_lp_uA: maximum load in idle (low power) mode
48 * @update_bank: bank to control on/off
49 * @update_reg: register to control on/off
50 * @update_mask: mask to enable/disable and set mode of regulator
51 * @update_val: bits holding the regulator current mode
52 * @update_val_idle: bits to enable the regulator in idle (low power) mode
53 * @update_val_normal: bits to enable the regulator in normal (high power) mode
54 * @mode_bank: bank with location of mode register
55 * @mode_reg: mode register
56 * @mode_mask: mask for setting mode
57 * @mode_val_idle: mode setting for low power
58 * @mode_val_normal: mode setting for normal power
59 * @voltage_bank: bank to control regulator voltage
60 * @voltage_reg: register to control regulator voltage
61 * @voltage_mask: mask to control regulator voltage
64 struct ab8500_regulator_info
{
66 struct regulator_desc desc
;
67 struct ab8500_shared_mode
*shared_mode
;
85 /* voltage tables for the vauxn/vintcore supplies */
86 static const unsigned int ldo_vauxn_voltages
[] = {
105 static const unsigned int ldo_vaux3_voltages
[] = {
116 static const unsigned int ldo_vaux56_voltages
[] = {
127 static const unsigned int ldo_vintcore_voltages
[] = {
137 static const unsigned int fixed_1200000_voltage
[] = {
141 static const unsigned int fixed_1800000_voltage
[] = {
145 static const unsigned int fixed_2000000_voltage
[] = {
149 static const unsigned int fixed_2050000_voltage
[] = {
153 static const unsigned int ldo_vana_voltages
[] = {
164 static const unsigned int ldo_vaudio_voltages
[] = {
172 2600000, /* Duplicated in Vaudio and IsoUicc Control register. */
175 static DEFINE_MUTEX(shared_mode_mutex
);
176 static struct ab8500_shared_mode ldo_anamic1_shared
;
177 static struct ab8500_shared_mode ldo_anamic2_shared
;
179 static int ab8500_regulator_enable(struct regulator_dev
*rdev
)
182 struct ab8500_regulator_info
*info
= rdev_get_drvdata(rdev
);
185 dev_err(rdev_get_dev(rdev
), "regulator info null pointer\n");
189 ret
= abx500_mask_and_set_register_interruptible(info
->dev
,
190 info
->update_bank
, info
->update_reg
,
191 info
->update_mask
, info
->update_val
);
193 dev_err(rdev_get_dev(rdev
),
194 "couldn't set enable bits for regulator\n");
198 dev_vdbg(rdev_get_dev(rdev
),
199 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
200 info
->desc
.name
, info
->update_bank
, info
->update_reg
,
201 info
->update_mask
, info
->update_val
);
206 static int ab8500_regulator_disable(struct regulator_dev
*rdev
)
209 struct ab8500_regulator_info
*info
= rdev_get_drvdata(rdev
);
212 dev_err(rdev_get_dev(rdev
), "regulator info null pointer\n");
216 ret
= abx500_mask_and_set_register_interruptible(info
->dev
,
217 info
->update_bank
, info
->update_reg
,
218 info
->update_mask
, 0x0);
220 dev_err(rdev_get_dev(rdev
),
221 "couldn't set disable bits for regulator\n");
225 dev_vdbg(rdev_get_dev(rdev
),
226 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
227 info
->desc
.name
, info
->update_bank
, info
->update_reg
,
228 info
->update_mask
, 0x0);
233 static int ab8500_regulator_is_enabled(struct regulator_dev
*rdev
)
236 struct ab8500_regulator_info
*info
= rdev_get_drvdata(rdev
);
240 dev_err(rdev_get_dev(rdev
), "regulator info null pointer\n");
244 ret
= abx500_get_register_interruptible(info
->dev
,
245 info
->update_bank
, info
->update_reg
, ®val
);
247 dev_err(rdev_get_dev(rdev
),
248 "couldn't read 0x%x register\n", info
->update_reg
);
252 dev_vdbg(rdev_get_dev(rdev
),
253 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
255 info
->desc
.name
, info
->update_bank
, info
->update_reg
,
256 info
->update_mask
, regval
);
258 if (regval
& info
->update_mask
)
264 static unsigned int ab8500_regulator_get_optimum_mode(
265 struct regulator_dev
*rdev
, int input_uV
,
266 int output_uV
, int load_uA
)
270 struct ab8500_regulator_info
*info
= rdev_get_drvdata(rdev
);
273 dev_err(rdev_get_dev(rdev
), "regulator info null pointer\n");
277 if (load_uA
<= info
->load_lp_uA
)
278 mode
= REGULATOR_MODE_IDLE
;
280 mode
= REGULATOR_MODE_NORMAL
;
285 static int ab8500_regulator_set_mode(struct regulator_dev
*rdev
,
289 u8 bank
, reg
, mask
, val
;
290 bool lp_mode_req
= false;
291 struct ab8500_regulator_info
*info
= rdev_get_drvdata(rdev
);
294 dev_err(rdev_get_dev(rdev
), "regulator info null pointer\n");
298 if (info
->mode_mask
) {
299 bank
= info
->mode_bank
;
300 reg
= info
->mode_reg
;
301 mask
= info
->mode_mask
;
303 bank
= info
->update_bank
;
304 reg
= info
->update_reg
;
305 mask
= info
->update_mask
;
308 if (info
->shared_mode
)
309 mutex_lock(&shared_mode_mutex
);
312 case REGULATOR_MODE_NORMAL
:
313 if (info
->shared_mode
)
317 val
= info
->mode_val_normal
;
319 val
= info
->update_val_normal
;
321 case REGULATOR_MODE_IDLE
:
322 if (info
->shared_mode
) {
323 struct ab8500_regulator_info
*shared_regulator
;
325 shared_regulator
= info
->shared_mode
->shared_regulator
;
326 if (!shared_regulator
->shared_mode
->lp_mode_req
) {
327 /* Other regulator prevent LP mode */
328 info
->shared_mode
->lp_mode_req
= true;
336 val
= info
->mode_val_idle
;
338 val
= info
->update_val_idle
;
345 if (info
->mode_mask
|| ab8500_regulator_is_enabled(rdev
)) {
346 ret
= abx500_mask_and_set_register_interruptible(info
->dev
,
347 bank
, reg
, mask
, val
);
349 dev_err(rdev_get_dev(rdev
),
350 "couldn't set regulator mode\n");
354 dev_vdbg(rdev_get_dev(rdev
),
355 "%s-set_mode (bank, reg, mask, value): "
356 "0x%x, 0x%x, 0x%x, 0x%x\n",
357 info
->desc
.name
, bank
, reg
,
361 if (!info
->mode_mask
)
362 info
->update_val
= val
;
364 if (info
->shared_mode
)
365 info
->shared_mode
->lp_mode_req
= lp_mode_req
;
368 if (info
->shared_mode
)
369 mutex_unlock(&shared_mode_mutex
);
374 static unsigned int ab8500_regulator_get_mode(struct regulator_dev
*rdev
)
376 struct ab8500_regulator_info
*info
= rdev_get_drvdata(rdev
);
383 dev_err(rdev_get_dev(rdev
), "regulator info null pointer\n");
387 /* Need special handling for shared mode */
388 if (info
->shared_mode
) {
389 if (info
->shared_mode
->lp_mode_req
)
390 return REGULATOR_MODE_IDLE
;
392 return REGULATOR_MODE_NORMAL
;
395 if (info
->mode_mask
) {
396 /* Dedicated register for handling mode */
397 ret
= abx500_get_register_interruptible(info
->dev
,
398 info
->mode_bank
, info
->mode_reg
, &val
);
399 val
= val
& info
->mode_mask
;
401 val_normal
= info
->mode_val_normal
;
402 val_idle
= info
->mode_val_idle
;
404 /* Mode register same as enable register */
405 val
= info
->update_val
;
406 val_normal
= info
->update_val_normal
;
407 val_idle
= info
->update_val_idle
;
410 if (val
== val_normal
)
411 ret
= REGULATOR_MODE_NORMAL
;
412 else if (val
== val_idle
)
413 ret
= REGULATOR_MODE_IDLE
;
420 static int ab8500_regulator_get_voltage_sel(struct regulator_dev
*rdev
)
422 int ret
, voltage_shift
;
423 struct ab8500_regulator_info
*info
= rdev_get_drvdata(rdev
);
427 dev_err(rdev_get_dev(rdev
), "regulator info null pointer\n");
431 voltage_shift
= ffs(info
->voltage_mask
) - 1;
433 ret
= abx500_get_register_interruptible(info
->dev
,
434 info
->voltage_bank
, info
->voltage_reg
, ®val
);
436 dev_err(rdev_get_dev(rdev
),
437 "couldn't read voltage reg for regulator\n");
441 dev_vdbg(rdev_get_dev(rdev
),
442 "%s-get_voltage (bank, reg, mask, shift, value): "
443 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
444 info
->desc
.name
, info
->voltage_bank
,
445 info
->voltage_reg
, info
->voltage_mask
,
446 voltage_shift
, regval
);
448 return (regval
& info
->voltage_mask
) >> voltage_shift
;
451 static int ab8500_regulator_set_voltage_sel(struct regulator_dev
*rdev
,
454 int ret
, voltage_shift
;
455 struct ab8500_regulator_info
*info
= rdev_get_drvdata(rdev
);
459 dev_err(rdev_get_dev(rdev
), "regulator info null pointer\n");
463 voltage_shift
= ffs(info
->voltage_mask
) - 1;
465 /* set the registers for the request */
466 regval
= (u8
)selector
<< voltage_shift
;
467 ret
= abx500_mask_and_set_register_interruptible(info
->dev
,
468 info
->voltage_bank
, info
->voltage_reg
,
469 info
->voltage_mask
, regval
);
471 dev_err(rdev_get_dev(rdev
),
472 "couldn't set voltage reg for regulator\n");
474 dev_vdbg(rdev_get_dev(rdev
),
475 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
477 info
->desc
.name
, info
->voltage_bank
, info
->voltage_reg
,
478 info
->voltage_mask
, regval
);
483 static const struct regulator_ops ab8500_regulator_volt_mode_ops
= {
484 .enable
= ab8500_regulator_enable
,
485 .disable
= ab8500_regulator_disable
,
486 .is_enabled
= ab8500_regulator_is_enabled
,
487 .get_optimum_mode
= ab8500_regulator_get_optimum_mode
,
488 .set_mode
= ab8500_regulator_set_mode
,
489 .get_mode
= ab8500_regulator_get_mode
,
490 .get_voltage_sel
= ab8500_regulator_get_voltage_sel
,
491 .set_voltage_sel
= ab8500_regulator_set_voltage_sel
,
492 .list_voltage
= regulator_list_voltage_table
,
495 static const struct regulator_ops ab8500_regulator_volt_ops
= {
496 .enable
= ab8500_regulator_enable
,
497 .disable
= ab8500_regulator_disable
,
498 .is_enabled
= ab8500_regulator_is_enabled
,
499 .get_voltage_sel
= ab8500_regulator_get_voltage_sel
,
500 .set_voltage_sel
= ab8500_regulator_set_voltage_sel
,
501 .list_voltage
= regulator_list_voltage_table
,
504 static const struct regulator_ops ab8500_regulator_mode_ops
= {
505 .enable
= ab8500_regulator_enable
,
506 .disable
= ab8500_regulator_disable
,
507 .is_enabled
= ab8500_regulator_is_enabled
,
508 .get_optimum_mode
= ab8500_regulator_get_optimum_mode
,
509 .set_mode
= ab8500_regulator_set_mode
,
510 .get_mode
= ab8500_regulator_get_mode
,
511 .list_voltage
= regulator_list_voltage_table
,
514 static const struct regulator_ops ab8500_regulator_ops
= {
515 .enable
= ab8500_regulator_enable
,
516 .disable
= ab8500_regulator_disable
,
517 .is_enabled
= ab8500_regulator_is_enabled
,
518 .list_voltage
= regulator_list_voltage_table
,
521 static const struct regulator_ops ab8500_regulator_anamic_mode_ops
= {
522 .enable
= ab8500_regulator_enable
,
523 .disable
= ab8500_regulator_disable
,
524 .is_enabled
= ab8500_regulator_is_enabled
,
525 .set_mode
= ab8500_regulator_set_mode
,
526 .get_mode
= ab8500_regulator_get_mode
,
527 .list_voltage
= regulator_list_voltage_table
,
530 /* AB8500 regulator information */
531 static struct ab8500_regulator_info
532 ab8500_regulator_info
[AB8500_NUM_REGULATORS
] = {
534 * Variable Voltage Regulators
535 * name, min mV, max mV,
536 * update bank, reg, mask, enable val
537 * volt bank, reg, mask
539 [AB8500_LDO_AUX1
] = {
542 .ops
= &ab8500_regulator_volt_mode_ops
,
543 .type
= REGULATOR_VOLTAGE
,
544 .id
= AB8500_LDO_AUX1
,
545 .owner
= THIS_MODULE
,
546 .n_voltages
= ARRAY_SIZE(ldo_vauxn_voltages
),
547 .volt_table
= ldo_vauxn_voltages
,
549 .supply_name
= "vin",
556 .update_val_idle
= 0x03,
557 .update_val_normal
= 0x01,
558 .voltage_bank
= 0x04,
560 .voltage_mask
= 0x0f,
562 [AB8500_LDO_AUX2
] = {
565 .ops
= &ab8500_regulator_volt_mode_ops
,
566 .type
= REGULATOR_VOLTAGE
,
567 .id
= AB8500_LDO_AUX2
,
568 .owner
= THIS_MODULE
,
569 .n_voltages
= ARRAY_SIZE(ldo_vauxn_voltages
),
570 .volt_table
= ldo_vauxn_voltages
,
572 .supply_name
= "vin",
579 .update_val_idle
= 0x0c,
580 .update_val_normal
= 0x04,
581 .voltage_bank
= 0x04,
583 .voltage_mask
= 0x0f,
585 [AB8500_LDO_AUX3
] = {
588 .ops
= &ab8500_regulator_volt_mode_ops
,
589 .type
= REGULATOR_VOLTAGE
,
590 .id
= AB8500_LDO_AUX3
,
591 .owner
= THIS_MODULE
,
592 .n_voltages
= ARRAY_SIZE(ldo_vaux3_voltages
),
593 .volt_table
= ldo_vaux3_voltages
,
595 .supply_name
= "vin",
602 .update_val_idle
= 0x03,
603 .update_val_normal
= 0x01,
604 .voltage_bank
= 0x04,
606 .voltage_mask
= 0x07,
608 [AB8500_LDO_INTCORE
] = {
610 .name
= "LDO-INTCORE",
611 .ops
= &ab8500_regulator_volt_mode_ops
,
612 .type
= REGULATOR_VOLTAGE
,
613 .id
= AB8500_LDO_INTCORE
,
614 .owner
= THIS_MODULE
,
615 .n_voltages
= ARRAY_SIZE(ldo_vintcore_voltages
),
616 .volt_table
= ldo_vintcore_voltages
,
624 .update_val_idle
= 0x44,
625 .update_val_normal
= 0x04,
626 .voltage_bank
= 0x03,
628 .voltage_mask
= 0x38,
632 * Fixed Voltage Regulators
634 * update bank, reg, mask, enable val
636 [AB8500_LDO_TVOUT
] = {
639 .ops
= &ab8500_regulator_mode_ops
,
640 .type
= REGULATOR_VOLTAGE
,
641 .id
= AB8500_LDO_TVOUT
,
642 .owner
= THIS_MODULE
,
644 .volt_table
= fixed_2000000_voltage
,
652 .update_val_idle
= 0x82,
653 .update_val_normal
= 0x02,
655 [AB8500_LDO_AUDIO
] = {
658 .ops
= &ab8500_regulator_ops
,
659 .type
= REGULATOR_VOLTAGE
,
660 .id
= AB8500_LDO_AUDIO
,
661 .owner
= THIS_MODULE
,
664 .volt_table
= fixed_2000000_voltage
,
671 [AB8500_LDO_ANAMIC1
] = {
673 .name
= "LDO-ANAMIC1",
674 .ops
= &ab8500_regulator_ops
,
675 .type
= REGULATOR_VOLTAGE
,
676 .id
= AB8500_LDO_ANAMIC1
,
677 .owner
= THIS_MODULE
,
680 .volt_table
= fixed_2050000_voltage
,
687 [AB8500_LDO_ANAMIC2
] = {
689 .name
= "LDO-ANAMIC2",
690 .ops
= &ab8500_regulator_ops
,
691 .type
= REGULATOR_VOLTAGE
,
692 .id
= AB8500_LDO_ANAMIC2
,
693 .owner
= THIS_MODULE
,
696 .volt_table
= fixed_2050000_voltage
,
703 [AB8500_LDO_DMIC
] = {
706 .ops
= &ab8500_regulator_ops
,
707 .type
= REGULATOR_VOLTAGE
,
708 .id
= AB8500_LDO_DMIC
,
709 .owner
= THIS_MODULE
,
712 .volt_table
= fixed_1800000_voltage
,
721 * Regulators with fixed voltage and normal/idle modes
726 .ops
= &ab8500_regulator_mode_ops
,
727 .type
= REGULATOR_VOLTAGE
,
728 .id
= AB8500_LDO_ANA
,
729 .owner
= THIS_MODULE
,
732 .volt_table
= fixed_1200000_voltage
,
739 .update_val_idle
= 0x0c,
740 .update_val_normal
= 0x04,
744 /* AB8505 regulator information */
745 static struct ab8500_regulator_info
746 ab8505_regulator_info
[AB8505_NUM_REGULATORS
] = {
748 * Variable Voltage Regulators
749 * name, min mV, max mV,
750 * update bank, reg, mask, enable val
751 * volt bank, reg, mask
753 [AB8505_LDO_AUX1
] = {
756 .ops
= &ab8500_regulator_volt_mode_ops
,
757 .type
= REGULATOR_VOLTAGE
,
758 .id
= AB8505_LDO_AUX1
,
759 .owner
= THIS_MODULE
,
760 .n_voltages
= ARRAY_SIZE(ldo_vauxn_voltages
),
761 .volt_table
= ldo_vauxn_voltages
,
768 .update_val_idle
= 0x03,
769 .update_val_normal
= 0x01,
770 .voltage_bank
= 0x04,
772 .voltage_mask
= 0x0f,
774 [AB8505_LDO_AUX2
] = {
777 .ops
= &ab8500_regulator_volt_mode_ops
,
778 .type
= REGULATOR_VOLTAGE
,
779 .id
= AB8505_LDO_AUX2
,
780 .owner
= THIS_MODULE
,
781 .n_voltages
= ARRAY_SIZE(ldo_vauxn_voltages
),
782 .volt_table
= ldo_vauxn_voltages
,
789 .update_val_idle
= 0x0c,
790 .update_val_normal
= 0x04,
791 .voltage_bank
= 0x04,
793 .voltage_mask
= 0x0f,
795 [AB8505_LDO_AUX3
] = {
798 .ops
= &ab8500_regulator_volt_mode_ops
,
799 .type
= REGULATOR_VOLTAGE
,
800 .id
= AB8505_LDO_AUX3
,
801 .owner
= THIS_MODULE
,
802 .n_voltages
= ARRAY_SIZE(ldo_vaux3_voltages
),
803 .volt_table
= ldo_vaux3_voltages
,
810 .update_val_idle
= 0x03,
811 .update_val_normal
= 0x01,
812 .voltage_bank
= 0x04,
814 .voltage_mask
= 0x07,
816 [AB8505_LDO_AUX4
] = {
819 .ops
= &ab8500_regulator_volt_mode_ops
,
820 .type
= REGULATOR_VOLTAGE
,
821 .id
= AB8505_LDO_AUX4
,
822 .owner
= THIS_MODULE
,
823 .n_voltages
= ARRAY_SIZE(ldo_vauxn_voltages
),
824 .volt_table
= ldo_vauxn_voltages
,
827 /* values for Vaux4Regu register */
832 .update_val_idle
= 0x03,
833 .update_val_normal
= 0x01,
834 /* values for Vaux4SEL register */
835 .voltage_bank
= 0x04,
837 .voltage_mask
= 0x0f,
839 [AB8505_LDO_AUX5
] = {
842 .ops
= &ab8500_regulator_volt_mode_ops
,
843 .type
= REGULATOR_VOLTAGE
,
844 .id
= AB8505_LDO_AUX5
,
845 .owner
= THIS_MODULE
,
846 .n_voltages
= ARRAY_SIZE(ldo_vaux56_voltages
),
847 .volt_table
= ldo_vaux56_voltages
,
850 /* values for CtrlVaux5 register */
855 .update_val_idle
= 0x18,
856 .update_val_normal
= 0x10,
857 .voltage_bank
= 0x01,
859 .voltage_mask
= 0x07,
861 [AB8505_LDO_AUX6
] = {
864 .ops
= &ab8500_regulator_volt_mode_ops
,
865 .type
= REGULATOR_VOLTAGE
,
866 .id
= AB8505_LDO_AUX6
,
867 .owner
= THIS_MODULE
,
868 .n_voltages
= ARRAY_SIZE(ldo_vaux56_voltages
),
869 .volt_table
= ldo_vaux56_voltages
,
872 /* values for CtrlVaux6 register */
877 .update_val_idle
= 0x18,
878 .update_val_normal
= 0x10,
879 .voltage_bank
= 0x01,
881 .voltage_mask
= 0x07,
883 [AB8505_LDO_INTCORE
] = {
885 .name
= "LDO-INTCORE",
886 .ops
= &ab8500_regulator_volt_mode_ops
,
887 .type
= REGULATOR_VOLTAGE
,
888 .id
= AB8505_LDO_INTCORE
,
889 .owner
= THIS_MODULE
,
890 .n_voltages
= ARRAY_SIZE(ldo_vintcore_voltages
),
891 .volt_table
= ldo_vintcore_voltages
,
898 .update_val_idle
= 0x44,
899 .update_val_normal
= 0x04,
900 .voltage_bank
= 0x03,
902 .voltage_mask
= 0x38,
906 * Fixed Voltage Regulators
908 * update bank, reg, mask, enable val
913 .ops
= &ab8500_regulator_mode_ops
,
914 .type
= REGULATOR_VOLTAGE
,
915 .id
= AB8505_LDO_ADC
,
916 .owner
= THIS_MODULE
,
918 .volt_table
= fixed_2000000_voltage
,
919 .enable_time
= 10000,
926 .update_val_idle
= 0x82,
927 .update_val_normal
= 0x02,
929 [AB8505_LDO_AUDIO
] = {
932 .ops
= &ab8500_regulator_volt_ops
,
933 .type
= REGULATOR_VOLTAGE
,
934 .id
= AB8505_LDO_AUDIO
,
935 .owner
= THIS_MODULE
,
936 .n_voltages
= ARRAY_SIZE(ldo_vaudio_voltages
),
937 .volt_table
= ldo_vaudio_voltages
,
943 .voltage_bank
= 0x01,
945 .voltage_mask
= 0x70,
947 [AB8505_LDO_ANAMIC1
] = {
949 .name
= "LDO-ANAMIC1",
950 .ops
= &ab8500_regulator_anamic_mode_ops
,
951 .type
= REGULATOR_VOLTAGE
,
952 .id
= AB8505_LDO_ANAMIC1
,
953 .owner
= THIS_MODULE
,
955 .volt_table
= fixed_2050000_voltage
,
957 .shared_mode
= &ldo_anamic1_shared
,
965 .mode_val_idle
= 0x04,
966 .mode_val_normal
= 0x00,
968 [AB8505_LDO_ANAMIC2
] = {
970 .name
= "LDO-ANAMIC2",
971 .ops
= &ab8500_regulator_anamic_mode_ops
,
972 .type
= REGULATOR_VOLTAGE
,
973 .id
= AB8505_LDO_ANAMIC2
,
974 .owner
= THIS_MODULE
,
976 .volt_table
= fixed_2050000_voltage
,
978 .shared_mode
= &ldo_anamic2_shared
,
986 .mode_val_idle
= 0x04,
987 .mode_val_normal
= 0x00,
989 [AB8505_LDO_AUX8
] = {
992 .ops
= &ab8500_regulator_ops
,
993 .type
= REGULATOR_VOLTAGE
,
994 .id
= AB8505_LDO_AUX8
,
995 .owner
= THIS_MODULE
,
997 .volt_table
= fixed_1800000_voltage
,
1001 .update_mask
= 0x04,
1005 * Regulators with fixed voltage and normal/idle modes
1007 [AB8505_LDO_ANA
] = {
1010 .ops
= &ab8500_regulator_volt_mode_ops
,
1011 .type
= REGULATOR_VOLTAGE
,
1012 .id
= AB8505_LDO_ANA
,
1013 .owner
= THIS_MODULE
,
1014 .n_voltages
= ARRAY_SIZE(ldo_vana_voltages
),
1015 .volt_table
= ldo_vana_voltages
,
1018 .update_bank
= 0x04,
1020 .update_mask
= 0x0c,
1022 .update_val_idle
= 0x0c,
1023 .update_val_normal
= 0x04,
1024 .voltage_bank
= 0x04,
1025 .voltage_reg
= 0x29,
1026 .voltage_mask
= 0x7,
1030 static struct ab8500_shared_mode ldo_anamic1_shared
= {
1031 .shared_regulator
= &ab8505_regulator_info
[AB8505_LDO_ANAMIC2
],
1034 static struct ab8500_shared_mode ldo_anamic2_shared
= {
1035 .shared_regulator
= &ab8505_regulator_info
[AB8505_LDO_ANAMIC1
],
1038 struct ab8500_reg_init
{
1044 #define REG_INIT(_id, _bank, _addr, _mask) \
1051 /* AB8500 register init */
1052 static struct ab8500_reg_init ab8500_reg_init
[] = {
1054 * 0x30, VanaRequestCtrl
1055 * 0xc0, VextSupply1RequestCtrl
1057 REG_INIT(AB8500_REGUREQUESTCTRL2
, 0x03, 0x04, 0xf0),
1059 * 0x03, VextSupply2RequestCtrl
1060 * 0x0c, VextSupply3RequestCtrl
1061 * 0x30, Vaux1RequestCtrl
1062 * 0xc0, Vaux2RequestCtrl
1064 REG_INIT(AB8500_REGUREQUESTCTRL3
, 0x03, 0x05, 0xff),
1066 * 0x03, Vaux3RequestCtrl
1069 REG_INIT(AB8500_REGUREQUESTCTRL4
, 0x03, 0x06, 0x07),
1071 * 0x08, VanaSysClkReq1HPValid
1072 * 0x20, Vaux1SysClkReq1HPValid
1073 * 0x40, Vaux2SysClkReq1HPValid
1074 * 0x80, Vaux3SysClkReq1HPValid
1076 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1
, 0x03, 0x07, 0xe8),
1078 * 0x10, VextSupply1SysClkReq1HPValid
1079 * 0x20, VextSupply2SysClkReq1HPValid
1080 * 0x40, VextSupply3SysClkReq1HPValid
1082 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2
, 0x03, 0x08, 0x70),
1084 * 0x08, VanaHwHPReq1Valid
1085 * 0x20, Vaux1HwHPReq1Valid
1086 * 0x40, Vaux2HwHPReq1Valid
1087 * 0x80, Vaux3HwHPReq1Valid
1089 REG_INIT(AB8500_REGUHWHPREQ1VALID1
, 0x03, 0x09, 0xe8),
1091 * 0x01, VextSupply1HwHPReq1Valid
1092 * 0x02, VextSupply2HwHPReq1Valid
1093 * 0x04, VextSupply3HwHPReq1Valid
1095 REG_INIT(AB8500_REGUHWHPREQ1VALID2
, 0x03, 0x0a, 0x07),
1097 * 0x08, VanaHwHPReq2Valid
1098 * 0x20, Vaux1HwHPReq2Valid
1099 * 0x40, Vaux2HwHPReq2Valid
1100 * 0x80, Vaux3HwHPReq2Valid
1102 REG_INIT(AB8500_REGUHWHPREQ2VALID1
, 0x03, 0x0b, 0xe8),
1104 * 0x01, VextSupply1HwHPReq2Valid
1105 * 0x02, VextSupply2HwHPReq2Valid
1106 * 0x04, VextSupply3HwHPReq2Valid
1108 REG_INIT(AB8500_REGUHWHPREQ2VALID2
, 0x03, 0x0c, 0x07),
1110 * 0x20, VanaSwHPReqValid
1111 * 0x80, Vaux1SwHPReqValid
1113 REG_INIT(AB8500_REGUSWHPREQVALID1
, 0x03, 0x0d, 0xa0),
1115 * 0x01, Vaux2SwHPReqValid
1116 * 0x02, Vaux3SwHPReqValid
1117 * 0x04, VextSupply1SwHPReqValid
1118 * 0x08, VextSupply2SwHPReqValid
1119 * 0x10, VextSupply3SwHPReqValid
1121 REG_INIT(AB8500_REGUSWHPREQVALID2
, 0x03, 0x0e, 0x1f),
1123 * 0x02, SysClkReq2Valid1
1124 * 0x04, SysClkReq3Valid1
1125 * 0x08, SysClkReq4Valid1
1126 * 0x10, SysClkReq5Valid1
1127 * 0x20, SysClkReq6Valid1
1128 * 0x40, SysClkReq7Valid1
1129 * 0x80, SysClkReq8Valid1
1131 REG_INIT(AB8500_REGUSYSCLKREQVALID1
, 0x03, 0x0f, 0xfe),
1133 * 0x02, SysClkReq2Valid2
1134 * 0x04, SysClkReq3Valid2
1135 * 0x08, SysClkReq4Valid2
1136 * 0x10, SysClkReq5Valid2
1137 * 0x20, SysClkReq6Valid2
1138 * 0x40, SysClkReq7Valid2
1139 * 0x80, SysClkReq8Valid2
1141 REG_INIT(AB8500_REGUSYSCLKREQVALID2
, 0x03, 0x10, 0xfe),
1144 * 0x04, Vintcore12Ena
1145 * 0x38, Vintcore12Sel
1146 * 0x40, Vintcore12LP
1149 REG_INIT(AB8500_REGUMISC1
, 0x03, 0x80, 0xfe),
1156 REG_INIT(AB8500_VAUDIOSUPPLY
, 0x03, 0x83, 0x1e),
1158 * 0x01, Vamic1_dzout
1159 * 0x02, Vamic2_dzout
1161 REG_INIT(AB8500_REGUCTRL1VAMIC
, 0x03, 0x84, 0x03),
1163 * 0x03, VpllRegu (NOTE! PRCMU register bits)
1166 REG_INIT(AB8500_VPLLVANAREGU
, 0x04, 0x06, 0x0f),
1169 * 0x02, VrefDDRSleepMode
1171 REG_INIT(AB8500_VREFDDR
, 0x04, 0x07, 0x03),
1173 * 0x03, VextSupply1Regu
1174 * 0x0c, VextSupply2Regu
1175 * 0x30, VextSupply3Regu
1176 * 0x40, ExtSupply2Bypass
1177 * 0x80, ExtSupply3Bypass
1179 REG_INIT(AB8500_EXTSUPPLYREGU
, 0x04, 0x08, 0xff),
1184 REG_INIT(AB8500_VAUX12REGU
, 0x04, 0x09, 0x0f),
1188 REG_INIT(AB8500_VRF1VAUX3REGU
, 0x04, 0x0a, 0x03),
1192 REG_INIT(AB8500_VAUX1SEL
, 0x04, 0x1f, 0x0f),
1196 REG_INIT(AB8500_VAUX2SEL
, 0x04, 0x20, 0x0f),
1200 REG_INIT(AB8500_VRF1VAUX3SEL
, 0x04, 0x21, 0x07),
1202 * 0x01, VextSupply12LP
1204 REG_INIT(AB8500_REGUCTRL2SPARE
, 0x04, 0x22, 0x01),
1209 * 0x20, Vintcore12Disch
1213 REG_INIT(AB8500_REGUCTRLDISCH
, 0x04, 0x43, 0xfc),
1216 * 0x04, VdmicPullDownEna
1219 REG_INIT(AB8500_REGUCTRLDISCH2
, 0x04, 0x44, 0x16),
1222 /* AB8505 register init */
1223 static struct ab8500_reg_init ab8505_reg_init
[] = {
1225 * 0x03, VarmRequestCtrl
1226 * 0x0c, VsmpsCRequestCtrl
1227 * 0x30, VsmpsARequestCtrl
1228 * 0xc0, VsmpsBRequestCtrl
1230 REG_INIT(AB8505_REGUREQUESTCTRL1
, 0x03, 0x03, 0xff),
1232 * 0x03, VsafeRequestCtrl
1233 * 0x0c, VpllRequestCtrl
1234 * 0x30, VanaRequestCtrl
1236 REG_INIT(AB8505_REGUREQUESTCTRL2
, 0x03, 0x04, 0x3f),
1238 * 0x30, Vaux1RequestCtrl
1239 * 0xc0, Vaux2RequestCtrl
1241 REG_INIT(AB8505_REGUREQUESTCTRL3
, 0x03, 0x05, 0xf0),
1243 * 0x03, Vaux3RequestCtrl
1246 REG_INIT(AB8505_REGUREQUESTCTRL4
, 0x03, 0x06, 0x07),
1248 * 0x01, VsmpsASysClkReq1HPValid
1249 * 0x02, VsmpsBSysClkReq1HPValid
1250 * 0x04, VsafeSysClkReq1HPValid
1251 * 0x08, VanaSysClkReq1HPValid
1252 * 0x10, VpllSysClkReq1HPValid
1253 * 0x20, Vaux1SysClkReq1HPValid
1254 * 0x40, Vaux2SysClkReq1HPValid
1255 * 0x80, Vaux3SysClkReq1HPValid
1257 REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1
, 0x03, 0x07, 0xff),
1259 * 0x01, VsmpsCSysClkReq1HPValid
1260 * 0x02, VarmSysClkReq1HPValid
1261 * 0x04, VbbSysClkReq1HPValid
1262 * 0x08, VsmpsMSysClkReq1HPValid
1264 REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2
, 0x03, 0x08, 0x0f),
1266 * 0x01, VsmpsAHwHPReq1Valid
1267 * 0x02, VsmpsBHwHPReq1Valid
1268 * 0x04, VsafeHwHPReq1Valid
1269 * 0x08, VanaHwHPReq1Valid
1270 * 0x10, VpllHwHPReq1Valid
1271 * 0x20, Vaux1HwHPReq1Valid
1272 * 0x40, Vaux2HwHPReq1Valid
1273 * 0x80, Vaux3HwHPReq1Valid
1275 REG_INIT(AB8505_REGUHWHPREQ1VALID1
, 0x03, 0x09, 0xff),
1277 * 0x08, VsmpsMHwHPReq1Valid
1279 REG_INIT(AB8505_REGUHWHPREQ1VALID2
, 0x03, 0x0a, 0x08),
1281 * 0x01, VsmpsAHwHPReq2Valid
1282 * 0x02, VsmpsBHwHPReq2Valid
1283 * 0x04, VsafeHwHPReq2Valid
1284 * 0x08, VanaHwHPReq2Valid
1285 * 0x10, VpllHwHPReq2Valid
1286 * 0x20, Vaux1HwHPReq2Valid
1287 * 0x40, Vaux2HwHPReq2Valid
1288 * 0x80, Vaux3HwHPReq2Valid
1290 REG_INIT(AB8505_REGUHWHPREQ2VALID1
, 0x03, 0x0b, 0xff),
1292 * 0x08, VsmpsMHwHPReq2Valid
1294 REG_INIT(AB8505_REGUHWHPREQ2VALID2
, 0x03, 0x0c, 0x08),
1296 * 0x01, VsmpsCSwHPReqValid
1297 * 0x02, VarmSwHPReqValid
1298 * 0x04, VsmpsASwHPReqValid
1299 * 0x08, VsmpsBSwHPReqValid
1300 * 0x10, VsafeSwHPReqValid
1301 * 0x20, VanaSwHPReqValid
1302 * 0x40, VpllSwHPReqValid
1303 * 0x80, Vaux1SwHPReqValid
1305 REG_INIT(AB8505_REGUSWHPREQVALID1
, 0x03, 0x0d, 0xff),
1307 * 0x01, Vaux2SwHPReqValid
1308 * 0x02, Vaux3SwHPReqValid
1309 * 0x20, VsmpsMSwHPReqValid
1311 REG_INIT(AB8505_REGUSWHPREQVALID2
, 0x03, 0x0e, 0x23),
1313 * 0x02, SysClkReq2Valid1
1314 * 0x04, SysClkReq3Valid1
1315 * 0x08, SysClkReq4Valid1
1317 REG_INIT(AB8505_REGUSYSCLKREQVALID1
, 0x03, 0x0f, 0x0e),
1319 * 0x02, SysClkReq2Valid2
1320 * 0x04, SysClkReq3Valid2
1321 * 0x08, SysClkReq4Valid2
1323 REG_INIT(AB8505_REGUSYSCLKREQVALID2
, 0x03, 0x10, 0x0e),
1325 * 0x01, Vaux4SwHPReqValid
1326 * 0x02, Vaux4HwHPReq2Valid
1327 * 0x04, Vaux4HwHPReq1Valid
1328 * 0x08, Vaux4SysClkReq1HPValid
1330 REG_INIT(AB8505_REGUVAUX4REQVALID
, 0x03, 0x11, 0x0f),
1333 * 0x04, VintCore12Ena
1334 * 0x38, VintCore12Sel
1335 * 0x40, VintCore12LP
1338 REG_INIT(AB8505_REGUMISC1
, 0x03, 0x80, 0xfe),
1345 REG_INIT(AB8505_VAUDIOSUPPLY
, 0x03, 0x83, 0x1e),
1347 * 0x01, Vamic1_dzout
1348 * 0x02, Vamic2_dzout
1350 REG_INIT(AB8505_REGUCTRL1VAMIC
, 0x03, 0x84, 0x03),
1353 * 0x0c, VsmpsASelCtrl
1354 * 0x10, VsmpsAAutoMode
1355 * 0x20, VsmpsAPWMMode
1357 REG_INIT(AB8505_VSMPSAREGU
, 0x04, 0x03, 0x3f),
1360 * 0x0c, VsmpsBSelCtrl
1361 * 0x10, VsmpsBAutoMode
1362 * 0x20, VsmpsBPWMMode
1364 REG_INIT(AB8505_VSMPSBREGU
, 0x04, 0x04, 0x3f),
1367 * 0x0c, VsafeSelCtrl
1368 * 0x10, VsafeAutoMode
1369 * 0x20, VsafePWMMode
1371 REG_INIT(AB8505_VSAFEREGU
, 0x04, 0x05, 0x3f),
1373 * 0x03, VpllRegu (NOTE! PRCMU register bits)
1376 REG_INIT(AB8505_VPLLVANAREGU
, 0x04, 0x06, 0x0f),
1378 * 0x03, VextSupply1Regu
1379 * 0x0c, VextSupply2Regu
1380 * 0x30, VextSupply3Regu
1381 * 0x40, ExtSupply2Bypass
1382 * 0x80, ExtSupply3Bypass
1384 REG_INIT(AB8505_EXTSUPPLYREGU
, 0x04, 0x08, 0xff),
1389 REG_INIT(AB8505_VAUX12REGU
, 0x04, 0x09, 0x0f),
1393 REG_INIT(AB8505_VRF1VAUX3REGU
, 0x04, 0x0a, 0x0f),
1397 REG_INIT(AB8505_VSMPSASEL1
, 0x04, 0x13, 0x3f),
1401 REG_INIT(AB8505_VSMPSASEL2
, 0x04, 0x14, 0x3f),
1405 REG_INIT(AB8505_VSMPSASEL3
, 0x04, 0x15, 0x3f),
1409 REG_INIT(AB8505_VSMPSBSEL1
, 0x04, 0x17, 0x3f),
1413 REG_INIT(AB8505_VSMPSBSEL2
, 0x04, 0x18, 0x3f),
1417 REG_INIT(AB8505_VSMPSBSEL3
, 0x04, 0x19, 0x3f),
1421 REG_INIT(AB8505_VSAFESEL1
, 0x04, 0x1b, 0x7f),
1425 REG_INIT(AB8505_VSAFESEL2
, 0x04, 0x1c, 0x7f),
1429 REG_INIT(AB8505_VSAFESEL3
, 0x04, 0x1d, 0x7f),
1433 REG_INIT(AB8505_VAUX1SEL
, 0x04, 0x1f, 0x0f),
1437 REG_INIT(AB8505_VAUX2SEL
, 0x04, 0x20, 0x0f),
1442 REG_INIT(AB8505_VRF1VAUX3SEL
, 0x04, 0x21, 0x37),
1444 * 0x03, Vaux4RequestCtrl
1446 REG_INIT(AB8505_VAUX4REQCTRL
, 0x04, 0x2d, 0x03),
1450 REG_INIT(AB8505_VAUX4REGU
, 0x04, 0x2e, 0x03),
1454 REG_INIT(AB8505_VAUX4SEL
, 0x04, 0x2f, 0x0f),
1459 * 0x20, Vintcore12Disch
1463 REG_INIT(AB8505_REGUCTRLDISCH
, 0x04, 0x43, 0xfc),
1466 * 0x04, VdmicPullDownEna
1469 REG_INIT(AB8505_REGUCTRLDISCH2
, 0x04, 0x44, 0x16),
1473 REG_INIT(AB8505_REGUCTRLDISCH3
, 0x04, 0x48, 0x01),
1479 * 0x40, Vaux5DisSfst
1480 * 0x80, Vaux5DisPulld
1482 REG_INIT(AB8505_CTRLVAUX5
, 0x01, 0x55, 0xff),
1487 * 0x80, Vaux6DisPulld
1489 REG_INIT(AB8505_CTRLVAUX6
, 0x01, 0x56, 0x9f),
1492 static struct of_regulator_match ab8500_regulator_match
[] = {
1493 { .name
= "ab8500_ldo_aux1", .driver_data
= (void *) AB8500_LDO_AUX1
, },
1494 { .name
= "ab8500_ldo_aux2", .driver_data
= (void *) AB8500_LDO_AUX2
, },
1495 { .name
= "ab8500_ldo_aux3", .driver_data
= (void *) AB8500_LDO_AUX3
, },
1496 { .name
= "ab8500_ldo_intcore", .driver_data
= (void *) AB8500_LDO_INTCORE
, },
1497 { .name
= "ab8500_ldo_tvout", .driver_data
= (void *) AB8500_LDO_TVOUT
, },
1498 { .name
= "ab8500_ldo_audio", .driver_data
= (void *) AB8500_LDO_AUDIO
, },
1499 { .name
= "ab8500_ldo_anamic1", .driver_data
= (void *) AB8500_LDO_ANAMIC1
, },
1500 { .name
= "ab8500_ldo_anamic2", .driver_data
= (void *) AB8500_LDO_ANAMIC2
, },
1501 { .name
= "ab8500_ldo_dmic", .driver_data
= (void *) AB8500_LDO_DMIC
, },
1502 { .name
= "ab8500_ldo_ana", .driver_data
= (void *) AB8500_LDO_ANA
, },
1505 static struct of_regulator_match ab8505_regulator_match
[] = {
1506 { .name
= "ab8500_ldo_aux1", .driver_data
= (void *) AB8505_LDO_AUX1
, },
1507 { .name
= "ab8500_ldo_aux2", .driver_data
= (void *) AB8505_LDO_AUX2
, },
1508 { .name
= "ab8500_ldo_aux3", .driver_data
= (void *) AB8505_LDO_AUX3
, },
1509 { .name
= "ab8500_ldo_aux4", .driver_data
= (void *) AB8505_LDO_AUX4
, },
1510 { .name
= "ab8500_ldo_aux5", .driver_data
= (void *) AB8505_LDO_AUX5
, },
1511 { .name
= "ab8500_ldo_aux6", .driver_data
= (void *) AB8505_LDO_AUX6
, },
1512 { .name
= "ab8500_ldo_intcore", .driver_data
= (void *) AB8505_LDO_INTCORE
, },
1513 { .name
= "ab8500_ldo_adc", .driver_data
= (void *) AB8505_LDO_ADC
, },
1514 { .name
= "ab8500_ldo_audio", .driver_data
= (void *) AB8505_LDO_AUDIO
, },
1515 { .name
= "ab8500_ldo_anamic1", .driver_data
= (void *) AB8505_LDO_ANAMIC1
, },
1516 { .name
= "ab8500_ldo_anamic2", .driver_data
= (void *) AB8505_LDO_ANAMIC2
, },
1517 { .name
= "ab8500_ldo_aux8", .driver_data
= (void *) AB8505_LDO_AUX8
, },
1518 { .name
= "ab8500_ldo_ana", .driver_data
= (void *) AB8505_LDO_ANA
, },
1522 struct ab8500_regulator_info
*info
;
1524 struct ab8500_reg_init
*init
;
1526 struct of_regulator_match
*match
;
1530 static void abx500_get_regulator_info(struct ab8500
*ab8500
)
1532 if (is_ab8505(ab8500
)) {
1533 abx500_regulator
.info
= ab8505_regulator_info
;
1534 abx500_regulator
.info_size
= ARRAY_SIZE(ab8505_regulator_info
);
1535 abx500_regulator
.init
= ab8505_reg_init
;
1536 abx500_regulator
.init_size
= AB8505_NUM_REGULATOR_REGISTERS
;
1537 abx500_regulator
.match
= ab8505_regulator_match
;
1538 abx500_regulator
.match_size
= ARRAY_SIZE(ab8505_regulator_match
);
1540 abx500_regulator
.info
= ab8500_regulator_info
;
1541 abx500_regulator
.info_size
= ARRAY_SIZE(ab8500_regulator_info
);
1542 abx500_regulator
.init
= ab8500_reg_init
;
1543 abx500_regulator
.init_size
= AB8500_NUM_REGULATOR_REGISTERS
;
1544 abx500_regulator
.match
= ab8500_regulator_match
;
1545 abx500_regulator
.match_size
= ARRAY_SIZE(ab8500_regulator_match
);
1549 static int ab8500_regulator_register(struct platform_device
*pdev
,
1550 struct regulator_init_data
*init_data
,
1551 int id
, struct device_node
*np
)
1553 struct ab8500
*ab8500
= dev_get_drvdata(pdev
->dev
.parent
);
1554 struct ab8500_regulator_info
*info
= NULL
;
1555 struct regulator_config config
= { };
1556 struct regulator_dev
*rdev
;
1558 /* assign per-regulator data */
1559 info
= &abx500_regulator
.info
[id
];
1560 info
->dev
= &pdev
->dev
;
1562 config
.dev
= &pdev
->dev
;
1563 config
.init_data
= init_data
;
1564 config
.driver_data
= info
;
1565 config
.of_node
= np
;
1567 /* fix for hardware before ab8500v2.0 */
1568 if (is_ab8500_1p1_or_earlier(ab8500
)) {
1569 if (info
->desc
.id
== AB8500_LDO_AUX3
) {
1570 info
->desc
.n_voltages
=
1571 ARRAY_SIZE(ldo_vauxn_voltages
);
1572 info
->desc
.volt_table
= ldo_vauxn_voltages
;
1573 info
->voltage_mask
= 0xf;
1577 /* register regulator with framework */
1578 rdev
= devm_regulator_register(&pdev
->dev
, &info
->desc
, &config
);
1580 dev_err(&pdev
->dev
, "failed to register regulator %s\n",
1582 return PTR_ERR(rdev
);
1588 static int ab8500_regulator_probe(struct platform_device
*pdev
)
1590 struct ab8500
*ab8500
= dev_get_drvdata(pdev
->dev
.parent
);
1591 struct device_node
*np
= pdev
->dev
.of_node
;
1592 struct of_regulator_match
*match
;
1596 dev_err(&pdev
->dev
, "null mfd parent\n");
1600 abx500_get_regulator_info(ab8500
);
1602 err
= of_regulator_match(&pdev
->dev
, np
,
1603 abx500_regulator
.match
,
1604 abx500_regulator
.match_size
);
1607 "Error parsing regulator init data: %d\n", err
);
1611 match
= abx500_regulator
.match
;
1612 for (i
= 0; i
< abx500_regulator
.info_size
; i
++) {
1613 err
= ab8500_regulator_register(pdev
, match
[i
].init_data
, i
,
1622 static struct platform_driver ab8500_regulator_driver
= {
1623 .probe
= ab8500_regulator_probe
,
1625 .name
= "ab8500-regulator",
1629 static int __init
ab8500_regulator_init(void)
1633 ret
= platform_driver_register(&ab8500_regulator_driver
);
1635 pr_err("Failed to register ab8500 regulator: %d\n", ret
);
1639 subsys_initcall(ab8500_regulator_init
);
1641 static void __exit
ab8500_regulator_exit(void)
1643 platform_driver_unregister(&ab8500_regulator_driver
);
1645 module_exit(ab8500_regulator_exit
);
1647 MODULE_LICENSE("GPL v2");
1648 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
1649 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
1650 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
1651 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1652 MODULE_ALIAS("platform:ab8500-regulator");