| blob | 5617ef30530a65628703e0203846969de5036ce6 |
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Faraday FOTG210 EHCI-like driver
3 *
4 * Copyright (c) 2013 Faraday Technology Corporation
5 *
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
9 *
10 * Most of code borrowed from the Linux-3.7 EHCI driver
11 */
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/device.h>
15 #include <linux/dmapool.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/ioport.h>
19 #include <linux/sched.h>
20 #include <linux/vmalloc.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/hrtimer.h>
24 #include <linux/list.h>
25 #include <linux/interrupt.h>
26 #include <linux/usb.h>
27 #include <linux/usb/hcd.h>
28 #include <linux/moduleparam.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/uaccess.h>
33 #include <linux/platform_device.h>
34 #include <linux/io.h>
35 #include <linux/iopoll.h>
36 #include <linux/clk.h>
38 #include <asm/byteorder.h>
39 #include <asm/irq.h>
40 #include <asm/unaligned.h>
46 #undef FOTG210_URB_TRACE
47 #define FOTG210_STATS
49 /* magic numbers that can affect system performance */
52 #define FOTG210_TUNE_RL_TT 0
54 #define FOTG210_TUNE_MULT_TT 1
56 /* Some drivers think it's safe to schedule isochronous transfers more than 256
57 * ms into the future (partly as a result of an old bug in the scheduling
58 * code). In an attempt to avoid trouble, we will use a minimum scheduling
59 * length of 512 frames instead of 256.
60 */
63 /* Initial IRQ latency: faster than hw default */
68 /* initial park setting: slower than hw default */
73 /* for link power management(LPM) feature */
78 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
82 #define fotg210_dbg(fotg210, fmt, args...) \
83 dev_dbg(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
84 #define fotg210_err(fotg210, fmt, args...) \
85 dev_err(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
86 #define fotg210_info(fotg210, fmt, args...) \
87 dev_info(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
88 #define fotg210_warn(fotg210, fmt, args...) \
89 dev_warn(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
91 /* check the values in the HCSPARAMS register (host controller _Structural_
92 * parameters) see EHCI spec, Table 2-4 for each value
93 */
95 {
100 }
102 /* check the values in the HCCPARAMS register (host controller _Capability_
103 * parameters) see EHCI Spec, Table 2-5 for each value
104 */
106 {
110 params,
113 }
115 static void __maybe_unused
117 {
129 }
131 static void __maybe_unused
133 {
141 }
143 static void __maybe_unused
145 {
175 }
177 static int __maybe_unused
179 {
192 }
194 static int __maybe_unused
196 {
205 }
210 u32 command)
211 {
224 }
227 u32 status)
228 {
231 /* signaling state */
245 }
250 sig,
260 }
262 /* functions have the "wrong" filename when they're output... */
263 #define dbg_status(fotg210, label, status) { \
264 char _buf[80]; \
265 dbg_status_buf(_buf, sizeof(_buf), label, status); \
267 }
269 #define dbg_cmd(fotg210, label, command) { \
270 char _buf[80]; \
271 dbg_command_buf(_buf, sizeof(_buf), label, command); \
273 }
275 #define dbg_port(fotg210, label, port, status) { \
276 char _buf[80]; \
278 dbg_port_buf(_buf, sizeof(_buf), label, port, status));\
279 }
281 /* troubleshooting help: expose state in debugfs */
296 };
303 };
310 };
321 };
324 {
337 }
338 }
341 {
350 /* tries to advance through hw_alt_next */
352 }
356 {
357 u32 scratch;
358 u32 hw_curr;
369 else
377 /* else alt_next points to some other qtd */
378 }
394 /* hc may be modifying the list as we read it ... */
407 }
426 scratch,
434 }
443 done:
446 }
449 {
464 /* dumps a snapshot of the async schedule.
465 * usually empty except for long-term bulk reads, or head.
466 * one QH per line, and TDs we know about
467 */
480 }
484 }
486 /* count tds, get ep direction */
489 {
495 /* count tds, get ep direction */
497 temp++;
505 }
506 }
512 }
514 #define DBG_SCHED_LIMIT 64
516 {
524 __hc32 tag;
541 /* dump a snapshot of the periodic schedule.
542 * iso changes, interrupt usually doesn't.
543 */
566 /* uframe masks */
571 /* don't repeat what follows this qh */
580 }
582 }
583 /* show more info the first time around */
609 }
617 }
622 }
623 #undef DBG_SCHED_LIMIT
626 {
636 }
638 }
641 {
666 }
668 /* Capability Registers */
682 /* FIXME interpret both types of params */
693 /* Operational Registers */
722 }
724 #ifdef FOTG210_STATS
736 #endif
738 done:
742 }
744 static struct debug_buffer
746 {
756 }
759 }
762 {
771 }
778 }
780 out:
782 }
786 {
796 }
797 }
803 out:
806 }
809 {
815 }
818 }
820 {
824 }
827 {
837 }
840 {
842 fill_registers_buffer);
845 }
848 {
860 }
863 {
865 }
867 /* handshake - spin reading hc until handshake completes or fails
868 * @ptr: address of hc register to be read
869 * @mask: bits to look at in result of read
870 * @done: value of those bits when handshake succeeds
871 * @usec: timeout in microseconds
872 *
873 * Returns negative errno, or zero on success
874 *
875 * Success happens when the "mask" bits have the specified value (hardware
876 * handshake done). There are two failure modes: "usec" have passed (major
877 * hardware flakeout), or the register reads as all-ones (hardware removed).
878 *
879 * That last failure should_only happen in cases like physical cardbus eject
880 * before driver shutdown. But it also seems to be caused by bugs in cardbus
881 * bridge shutdown: shutting down the bridge before the devices using it.
882 */
885 {
886 u32 result;
896 }
898 /* Force HC to halt state from unknown (EHCI spec section 2.3).
899 * Must be called with interrupts enabled and the lock not held.
900 */
902 {
903 u32 temp;
907 /* disable any irqs left enabled by previous code */
910 /*
911 * This routine gets called during probe before fotg210->command
912 * has been initialized, so we can't rely on its value.
913 */
924 }
926 /* Reset a non-running (STS_HALT == 1) controller.
927 * Must be called with interrupts enabled and the lock not held.
928 */
930 {
934 /* If the EHCI debug controller is active, special care must be
935 * taken before and after a host controller reset
936 */
957 }
959 /* Idle the controller (turn off the schedules).
960 * Must be called with interrupts enabled and the lock not held.
961 */
963 {
964 u32 temp;
969 /* wait for any schedule enables/disables to take effect */
974 /* then disable anything that's still active */
980 /* hardware can take 16 microframes to turn off ... */
983 }
992 /* Set a bit in the USBCMD register */
994 {
998 /* unblock posted write */
1000 }
1002 /* Clear a bit in the USBCMD register */
1004 {
1008 /* unblock posted write */
1010 }
1012 /* EHCI timer support... Now using hrtimers.
1013 *
1014 * Lots of different events are triggered from fotg210->hrtimer. Whenever
1015 * the timer routine runs, it checks each possible event; events that are
1016 * currently enabled and whose expiration time has passed get handled.
1017 * The set of enabled events is stored as a collection of bitflags in
1018 * fotg210->enabled_hrtimer_events, and they are numbered in order of
1019 * increasing delay values (ranging between 1 ms and 100 ms).
1020 *
1021 * Rather than implementing a sorted list or tree of all pending events,
1022 * we keep track only of the lowest-numbered pending event, in
1023 * fotg210->next_hrtimer_event. Whenever fotg210->hrtimer gets restarted, its
1024 * expiration time is set to the timeout value for this event.
1025 *
1026 * As a result, events might not get handled right away; the actual delay
1027 * could be anywhere up to twice the requested delay. This doesn't
1028 * matter, because none of the events are especially time-critical. The
1029 * ones that matter most all have a delay of 1 ms, so they will be
1030 * handled after 2 ms at most, which is okay. In addition to this, we
1031 * allow for an expiration range of 1 ms.
1032 */
1034 /* Delay lengths for the hrtimer event types.
1035 * Keep this list sorted by delay length, in the same order as
1036 * the event types indexed by enum fotg210_hrtimer_event in fotg210.h.
1037 */
1049 };
1051 /* Enable a pending hrtimer event */
1054 {
1061 /* Track only the lowest-numbered pending event */
1066 }
1067 }
1070 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
1072 {
1075 /* Don't enable anything if the controller isn't running (e.g., died) */
1084 /* Poll again later, but give up after about 20 ms */
1089 }
1092 }
1095 /* The status is up-to-date; restart or stop the schedule as needed */
1103 /* Turn off the schedule after a while */
1105 FOTG210_HRTIMER_DISABLE_ASYNC,
1107 }
1108 }
1109 }
1111 /* Turn off the async schedule after a brief delay */
1113 {
1115 }
1118 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
1120 {
1123 /* Don't do anything if the controller isn't running (e.g., died) */
1132 /* Poll again later, but give up after about 20 ms */
1137 }
1140 }
1143 /* The status is up-to-date; restart or stop the schedule as needed */
1151 /* Turn off the schedule after a while */
1153 FOTG210_HRTIMER_DISABLE_PERIODIC,
1155 }
1156 }
1157 }
1159 /* Turn off the periodic schedule after a brief delay */
1161 {
1163 }
1166 /* Poll the STS_HALT status bit; see when a dead controller stops */
1168 {
1171 /* Give up after a few milliseconds */
1173 /* Try again later */
1177 }
1179 }
1181 /* Clean up the mess */
1187 /* Not in process context, so don't try to reset the controller */
1188 }
1191 /* Handle unlinked interrupt QHs once they are gone from the hardware */
1193 {
1196 /*
1197 * Process all the QHs on the intr_unlink list that were added
1198 * before the current unlink cycle began. The list is in
1199 * temporal order, so stop when we reach the first entry in the
1200 * current cycle. But if the root hub isn't running then
1201 * process all the QHs on the list.
1202 */
1212 }
1214 /* Handle remaining entries later */
1219 }
1221 }
1224 /* Start another free-iTDs/siTDs cycle */
1226 {
1233 }
1234 }
1236 /* Wait for controller to stop using old iTDs and siTDs */
1238 {
1249 }
1253 }
1256 /* Handle lost (or very late) IAA interrupts */
1258 {
1262 /*
1263 * Lost IAA irqs wedge things badly; seen first with a vt8235.
1264 * So we need this watchdog, but must protect it against both
1265 * (a) SMP races against real IAA firing and retriggering, and
1266 * (b) clean HC shutdown, when IAA watchdog was pending.
1267 */
1271 /* If we get here, IAA is *REALLY* late. It's barely
1272 * conceivable that the system is so busy that CMD_IAAD
1273 * is still legitimately set, so let's be sure it's
1274 * clear before we read STS_IAA. (The HC should clear
1275 * CMD_IAAD when it sets STS_IAA.)
1276 */
1279 /*
1280 * If IAA is set here it either legitimately triggered
1281 * after the watchdog timer expired (_way_ late, so we'll
1282 * still count it as lost) ... or a silicon erratum:
1283 * - VIA seems to set IAA without triggering the IRQ;
1284 * - IAAD potentially cleared without setting IAA.
1285 */
1291 }
1296 }
1297 }
1300 /* Enable the I/O watchdog, if appropriate */
1302 {
1303 /* Not needed if the controller isn't running or it's already enabled */
1309 /*
1310 * Isochronous transfers always need the watchdog.
1311 * For other sorts we use it only if the flag is set.
1312 */
1317 }
1320 /* Handler functions for the hrtimer event types.
1321 * Keep this array in the same order as the event types indexed by
1322 * enum fotg210_hrtimer_event in fotg210.h.
1323 */
1335 };
1338 {
1341 ktime_t now;
1352 /*
1353 * Check each pending event. If its time has expired, handle
1354 * the event; otherwise re-enable it.
1355 */
1360 else
1362 }
1366 }
1368 #define fotg210_bus_suspend NULL
1369 #define fotg210_bus_resume NULL
1373 {
1377 /* if reset finished and it's still not enabled -- handoff */
1379 /* with integrated TT, there's nobody to hand it to! */
1382 else
1387 }
1390 /* build "status change" packet (one or two bytes) from HC registers */
1393 {
1396 u32 mask;
1400 /* init status to no-changes */
1403 /* Inform the core about resumes-in-progress by returning
1404 * a non-zero value even if there are no status changes.
1405 */
1409 /* PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND */
1411 /* no hub change reports (bit 0) for now (power, ...) */
1413 /* port N changes (bit N)? */
1418 /*
1419 * Return status information even for ports with OWNER set.
1420 * Otherwise hub_wq wouldn't see the disconnect event when a
1421 * high-speed device is switched over to the companion
1422 * controller by the user.
1423 */
1430 }
1431 /* FIXME autosuspend idle root hubs */
1434 }
1438 {
1440 u16 temp;
1450 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1457 }
1461 {
1470 /*
1471 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1472 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1473 * (track current state ourselves) ... blink for diagnostics,
1474 * power, "this is the one", etc. EHCI spec supports this.
1475 */
1483 /* no hub-wide feature/status flags */
1487 }
1492 wIndex--;
1496 /*
1497 * Even if OWNER is set, so the port is owned by the
1498 * companion controller, hub_wq needs to be able to clear
1499 * the port-change status bits (especially
1500 * USB_PORT_STAT_C_CONNECTION).
1501 */
1518 /* resume signaling for 20 msec */
1534 /* GetPortStatus clears reset */
1538 }
1543 buf);
1546 /* no hub-wide feature/status flags */
1548 /*cpu_to_le32s ((u32 *) buf); */
1553 wIndex--;
1557 /* wPortChange bits */
1567 /* whoever resumes must GetPortStatus to complete it!! */
1570 /* Remote Wakeup received? */
1572 /* resume signaling for 20 msec */
1575 /* check the port again */
1578 }
1580 /* resume completed? */
1587 /* stop resume signaling */
1591 status_reg);
1600 }
1602 }
1603 }
1605 /* whoever resets must GetPortStatus to complete it!! */
1612 /* force reset to complete */
1615 status_reg);
1616 /* REVISIT: some hardware needs 550+ usec to clear
1617 * this bit; seems too long to spin routinely...
1618 */
1625 }
1627 /* see what we found out */
1631 /* restart schedule */
1634 }
1639 }
1641 /* transfer dedicated ports to the companion hc */
1649 }
1651 /*
1652 * Even if OWNER is set, there's no harm letting hub_wq
1653 * see the wPortStatus values (they should all be 0 except
1654 * for PORT_POWER anyway).
1655 */
1660 }
1664 /* maybe the port was unsuspended without our knowledge */
1673 }
1691 /* no hub-wide feature/status flags */
1695 }
1703 wIndex--;
1712 /* After above check the port must be connected.
1713 * Set appropriate bit thus could put phy into low power
1714 * mode if we have hostpc feature
1715 */
1717 status_reg);
1723 /* line status bits may report this as low speed,
1724 * which can be fine if this root hub has a
1725 * transaction translator built in.
1726 */
1731 /*
1732 * caller must wait, then call GetPortStatus
1733 * usb 2.0 spec says 50 ms resets on root
1734 */
1740 /* For downstream facing ports (these): one hub port is put
1741 * into test mode according to USB2 11.24.2.13, then the hub
1742 * must be reset (which for root hub now means rmmod+modprobe,
1743 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
1744 * about the EHCI-specific stuff.
1745 */
1753 /* Put all enabled ports into suspend */
1758 status_reg);
1771 }
1776 error:
1777 /* "stall" on error */
1779 }
1782 }
1786 {
1788 }
1792 {
1794 }
1796 /* There's basically three types of memory:
1797 * - data used only by the HCD ... kmalloc is fine
1798 * - async and periodic schedules, shared by HC and HCD ... these
1799 * need to use dma_pool or dma_alloc_coherent
1800 * - driver buffers, read/written by HC ... single shot DMA mapped
1801 *
1802 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
1803 * No memory seen by this driver is pageable.
1804 */
1806 /* Allocate the key transfer structures from the previously allocated pool */
1809 {
1816 }
1819 gfp_t flags)
1820 {
1822 dma_addr_t dma;
1829 }
1833 {
1835 }
1839 {
1840 /* clean qtds first, and know this is not linked */
1844 }
1849 }
1852 gfp_t flags)
1853 {
1855 dma_addr_t dma;
1866 /* dummy td enables safe urb queuing */
1871 }
1872 done:
1874 fail1:
1876 fail:
1879 }
1881 /* The queue heads and transfer descriptors are managed from pools tied
1882 * to each of the "per device" structures.
1883 * This is the initialisation and cleanup code.
1884 */
1887 {
1896 /* DMA consistent memory and pools */
1912 /* shadow periodic table */
1915 }
1917 /* remember to add cleanup code (above) if you add anything here */
1919 {
1922 /* QTDs for control/bulk/intr transfers */
1931 /* QHs for control/bulk/intr transfers */
1944 /* ITD for high speed ISO transfers */
1953 /* Hardware periodic table */
1964 /* software shadow of hardware table */
1966 flags);
1970 fail:
1974 }
1975 /* EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
1976 *
1977 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
1978 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
1979 * buffers needed for the larger number). We use one QH per endpoint, queue
1980 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
1981 *
1982 * ISO traffic uses "ISO TD" (itd) records, and (along with
1983 * interrupts) needs careful scheduling. Performance improvements can be
1984 * an ongoing challenge. That's in "ehci-sched.c".
1985 *
1986 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
1987 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
1988 * (b) special fields in qh entries or (c) split iso entries. TTs will
1989 * buffer low/full speed data so the host collects it at high speed.
1990 */
1992 /* fill a qtd, returning how much of the buffer we were able to queue up */
1995 {
1999 /* one buffer entry per 4K ... first might be short or unaligned */
2009 /* per-qtd limit: from 16K to 20K (best alignment) */
2018 else
2020 }
2022 /* short packets may only terminate transfers */
2025 }
2030 }
2034 {
2037 /* writes to an active overlay are unsafe */
2043 /* Except for control endpoints, we make hardware maintain data
2044 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
2045 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
2046 * ever clear it.
2047 */
2056 }
2057 }
2060 }
2062 /* if it weren't for a common silicon quirk (writing the dummy into the qh
2063 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
2064 * recovery (including urb dequeue) would need software changes to a QH...
2065 */
2067 {
2075 /*
2076 * first qtd may already be partially processed.
2077 * If we come here during unlink, the QH overlay region
2078 * might have reference to the just unlinked qtd. The
2079 * qtd is updated in qh_completions(). Update the QH
2080 * overlay here.
2081 */
2085 }
2086 }
2090 }
2096 {
2107 }
2111 {
2113 /* If an async split transaction gets an error or is unlinked,
2114 * the TT buffer may be left in an indeterminate state. We
2115 * have to clear the TT buffer.
2116 *
2117 * Note: this routine is never called for Isochronous transfers.
2118 */
2131 }
2132 }
2133 }
2137 {
2140 /* count IN/OUT bytes, not SETUP (even short packets) */
2144 /* don't modify error codes */
2148 /* force cleanup after short read; not always an error */
2152 /* serious "can't proceed" faults reported by the hardware */
2155 /* FIXME "must" disable babbling device's port too */
2157 /* CERR nonzero + halt --> stall */
2161 /* In theory, more than one of the following bits can be set
2162 * since they are sticky and the transaction is retried.
2163 * Which to test first is rather arbitrary.
2164 */
2166 /* fs/ls interrupt xfer missed the complete-split */
2173 /* timeout, bad CRC, wrong PID, etc */
2181 }
2189 }
2192 }
2198 {
2202 /* S-mask in a QH means it's an interrupt urb */
2205 /* ... update hc-wide periodic stats (for usbfs) */
2207 }
2208 }
2213 /* report non-error and short read status as zero */
2217 }
2219 #ifdef FOTG210_URB_TRACE
2225 status,
2227 #endif
2229 /* complete() can reenter this HCD */
2234 }
2238 /* Process and free completed qtds for a qh, returning URBs to drivers.
2239 * Chases up to qh->hw_current. Returns number of completions called,
2240 * indicating how much "real" work we did.
2241 */
2244 {
2250 u8 state;
2256 /* completions (or tasks on other cpus) must never clobber HALT
2257 * till we've gone through and cleaned everything up, even when
2258 * they add urbs to this qh's queue or mark them for unlinking.
2259 *
2260 * NOTE: unlinking expects to be done in queue order.
2261 *
2262 * It's a bug for qh->qh_state to be anything other than
2263 * QH_STATE_IDLE, unless our caller is scan_async() or
2264 * scan_intr().
2265 */
2270 rescan:
2275 /* remove de-activated QTDs from front of queue.
2276 * after faults (including short reads), cleanup this urb
2277 * then let the queue advance.
2278 * if queue is stopped, handles unlinks.
2279 */
2286 /* clean up any state from previous QTD ...*/
2290 last_status);
2291 count++;
2293 }
2296 }
2298 /* ignore urbs submitted during completions we reported */
2302 /* hardware copies qtd out of qh overlay */
2306 /* always clean up qtds the hc de-activated */
2307 retry_xacterr:
2310 /* Report Data Buffer Error: non-fatal but useful */
2319 /* on STALL, error, and short reads this urb must
2320 * complete and all its qtds must be recycled.
2321 */
2324 /* retry transaction errors until we
2325 * reach the software xacterr limit
2326 */
2337 /* reset the token in the qtd and the
2338 * qh overlay (which still contains
2339 * the qtd) so that we pick up from
2340 * where we left off
2341 */
2346 token);
2349 token);
2351 }
2354 /* magic dummy for some short reads; qh won't advance.
2355 * that silicon quirk can kick in with this dummy too.
2356 *
2357 * other short reads won't stop the queue, including
2358 * control transfers (status stage handles that) or
2359 * most other single-qtd reads ... the queue stops if
2360 * URB_SHORT_NOT_OK was set so the driver submitting
2361 * the urbs could clean it up.
2362 */
2367 }
2369 /* stop scanning when we reach qtds the hc is using */
2374 /* scan the whole queue for unlinks whenever it stops */
2378 /* cancel everything if we halt, suspend, etc */
2382 /* this qtd is active; skip it unless a previous qtd
2383 * for its urb faulted, or its urb was canceled.
2384 */
2388 /* qh unlinked; token in overlay may be most current */
2394 /* An unlink may leave an incomplete
2395 * async transaction in the TT buffer.
2396 * We have to clear it.
2397 */
2399 token);
2400 }
2401 }
2403 /* unless we already know the urb's status, collect qtd status
2404 * and update count of bytes transferred. in common short read
2405 * cases with only one data qtd (including control transfers),
2406 * queue processing won't halt. but with two or more qtds (for
2407 * example, with a 32 KB transfer), when the first qtd gets a
2408 * short read the second must be removed by hand.
2409 */
2418 /* As part of low/full-speed endpoint-halt processing
2419 * we must clear the TT buffer (11.17.5).
2420 */
2423 /* The TT's in some hubs malfunction when they
2424 * receive this request following a STALL (they
2425 * stop sending isochronous packets). Since a
2426 * STALL can't leave the TT buffer in a busy
2427 * state (if you believe Figures 11-48 - 11-51
2428 * in the USB 2.0 spec), we won't clear the TT
2429 * buffer in this case. Strictly speaking this
2430 * is a violation of the spec.
2431 */
2435 }
2436 }
2438 /* if we're removing something not at the queue head,
2439 * patch the hardware queue pointer.
2440 */
2445 }
2447 /* remove qtd; it's recycled after possible urb completion */
2451 /* reinit the xacterr counter for the next qtd */
2453 }
2455 /* last urb's completion might still need calling */
2458 count++;
2460 }
2462 /* Do we need to rescan for URBs dequeued during a giveback? */
2464 /* If the QH is already unlinked, do the rescan now. */
2468 /* Otherwise we have to wait until the QH is fully unlinked.
2469 * Our caller will start an unlink if qh->needs_rescan is
2470 * set. But if an unlink has already started, nothing needs
2471 * to be done.
2472 */
2475 }
2477 /* restore original state; caller must unlink or relink */
2480 /* be sure the hardware's done with the qh before refreshing
2481 * it after fault cleanup, or recovering from silicon wrongly
2482 * overlaying the dummy qtd (which reduces DMA chatter).
2483 */
2490 /* We won't refresh a QH that's linked (after the HC
2491 * stopped the queue). That avoids a race:
2492 * - HC reads first part of QH;
2493 * - CPU updates that first part and the token;
2494 * - HC reads rest of that QH, including token
2495 * Result: HC gets an inconsistent image, and then
2496 * DMAs to/from the wrong memory (corrupting it).
2497 *
2498 * That should be rare for interrupt transfers,
2499 * except maybe high bandwidth ...
2500 */
2502 /* Tell the caller to start an unlink */
2505 /* otherwise, unlink already started */
2506 }
2507 }
2510 }
2512 /* high bandwidth multiplier, as encoded in highspeed endpoint descriptors */
2513 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
2514 /* ... and packet size, for any kind of endpoint descriptor */
2515 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
2517 /* reverse of qh_urb_transaction: free a list of TDs.
2518 * used for cleanup after errors, before HC sees an URB's TDs.
2519 */
2522 {
2528 }
2529 }
2531 /* create a list of filled qtds for this URB; won't link into qh.
2532 */
2535 {
2537 dma_addr_t buf;
2540 u32 token;
2544 /*
2545 * URBs map to sequences of QTDs: one logical transaction
2546 */
2555 /* for split transactions, SplitXState initialized to zero */
2560 /* SETUP pid */
2565 /* ... and always at least one more pid */
2575 /* for zero length DATA stages, STATUS is always IN */
2578 }
2580 /*
2581 * data transfer stage: buffer setup
2582 */
2588 /* urb->transfer_buffer_length may be smaller than the
2589 * size of the scatterlist (or vice versa)
2590 */
2596 }
2600 /* else it's already initted to "out" pid (0 << 8) */
2604 /*
2605 * buffer gets wrapped in one or more qtds;
2606 * last one may be "short" (including zero len)
2607 * and may serve as a control status ack
2608 */
2613 maxpacket);
2618 /*
2619 * short reads advance to a "magic" dummy instead of the next
2620 * qtd ... that forces the queue to stop, for manual cleanup.
2621 * (this will usually be overridden later.)
2622 */
2626 /* qh makes control packets use qtd toggle; maybe switch it */
2636 }
2645 }
2647 /*
2648 * unless the caller requires manual cleanup after short reads,
2649 * have the alt_next mechanism keep the queue running after the
2650 * last data qtd (the only one, for control and most other cases).
2651 */
2656 /*
2657 * control requests may need a terminating data "status" ack;
2658 * other OUT ones may need a terminating short packet
2659 * (zero length).
2660 */
2672 }
2682 /* never any data in such packets */
2684 }
2685 }
2687 /* by default, enable interrupt on urb completion */
2692 cleanup:
2695 }
2697 /* Would be best to create all qh's from config descriptors,
2698 * when each interface/altsetting is established. Unlink
2699 * any previous qh and cancel its urbs first; endpoints are
2700 * implicitly reset then (data toggle too).
2701 * That'd mean updating how usbcore talks to HCDs. (2.7?)
2702 */
2705 /* Each QH holds a qtd list; a QH is used for everything except iso.
2706 *
2707 * For interrupt urbs, the scheduler must set the microframe scheduling
2708 * mask(s) each time the QH gets scheduled. For highspeed, that's
2709 * just one microframe in the s-mask. For split interrupt transactions
2710 * there are additional complications: c-mask, maybe FSTNs.
2711 */
2713 gfp_t flags)
2714 {
2725 /*
2726 * init endpoint/device data for this QH
2727 */
2735 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
2736 * acts like up to 3KB, but is built from smaller packets.
2737 */
2742 }
2744 /* Compute interrupt scheduling parameters just once, and save.
2745 * - allowing for high bandwidth, how many nsec/uframe are used?
2746 * - split transactions need a second CSPLIT uframe; same question
2747 * - splits also need a schedule gap (for full/low speed I/O)
2748 * - qh has a polling interval
2749 *
2750 * For control/bulk requests, the HC or TT handles these.
2751 */
2764 /* NOTE interval 2 or 4 uframes could work.
2765 * But interval 1 scheduling is simpler, and
2766 * includes high bandwidth.
2767 */
2772 }
2776 /* gap is f(FS/LS transfer times) */
2780 /* FIXME this just approximates SPLIT/CSPLIT times */
2787 }
2797 }
2798 }
2799 }
2801 /* support for tt scheduling, and access to toggles */
2804 /* using TT? */
2808 fallthrough;
2811 /* EPS 0 means "full" */
2817 }
2822 /* Some Freescale processors have an erratum in which the
2823 * port number in the queue head was 0..N-1 instead of 1..N.
2824 */
2827 else
2830 /* set the address of the TT; for TDI's integrated
2831 * root hub tt, leave it zeroed.
2832 */
2836 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2849 /* The USB spec says that high speed bulk endpoints
2850 * always use 512 byte maxpacket. But some device
2851 * vendors decided to ignore that, and MSFT is happy
2852 * to help them do so. So now people expect to use
2853 * such nonconformant devices with Linux too; sigh.
2854 */
2860 }
2865 done:
2868 }
2870 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2872 /* init as live, toggle clear, advance to dummy */
2881 }
2884 {
2888 /* Stop waiting to turn off the async schedule */
2891 /* Don't start the schedule until ASS is 0 */
2894 }
2897 {
2901 /* The async schedule and async_unlink list are supposed to be empty */
2904 /* Don't turn off the schedule until ASS is 1 */
2906 }
2908 /* move qh (and its qtds) onto async queue; maybe enable queue. */
2911 {
2915 /* Don't link a QH if there's a Clear-TT-Buffer pending */
2921 /* clear halt and/or toggle; and maybe recover from silicon quirk */
2924 /* splice right after start */
2935 /* qtd completions reported later by interrupt */
2938 }
2940 /* For control/bulk/interrupt, return QH with these TDs appended.
2941 * Allocates and initializes the QH if necessary.
2942 * Returns null if it can't allocate a QH it needs to.
2943 * If the QH has TDs (urbs) already, that's great.
2944 */
2948 {
2954 /* can't sleep here, we have fotg210->lock... */
2957 }
2963 else
2965 qtd_list);
2967 /* control qh may need patching ... */
2969 /* usb_reset_device() briefly reverts to address 0 */
2972 }
2974 /* just one way to queue requests: swap with the dummy qtd.
2975 * only hc or qh_refresh() ever modify the overlay.
2976 */
2979 dma_addr_t dma;
2980 __hc32 token;
2982 /* to avoid racing the HC, use the dummy td instead of
2983 * the first td of our list (becomes new dummy). both
2984 * tds stay deactivated until we're done, when the
2985 * HC is allowed to fetch the old dummy (4.10.2).
2986 */
3003 /* hc must see the new dummy at list end */
3009 /* let the hc process these next qtds */
3014 }
3015 }
3017 }
3021 {
3029 #ifdef FOTG210_URB_TRACE
3030 {
3041 }
3042 #endif
3048 }
3058 }
3060 /* Control/bulk operations through TTs don't need scheduling,
3061 * the HC and TT handle it when the TT has a buffer ready.
3062 */
3065 done:
3070 }
3074 {
3077 /* Add to the end of the list of QHs waiting for the next IAAD */
3081 else
3085 /* Unlink it from the schedule */
3094 }
3097 {
3098 /*
3099 * Do nothing if an IAA cycle is already running or
3100 * if one will be started shortly.
3101 */
3105 /* Do all the waiting QHs at once */
3109 /* If the controller isn't running, we don't have to wait for it */
3114 /* Otherwise start a new IAA cycle */
3116 /* Make sure the unlinks are all visible to the hardware */
3124 }
3125 }
3127 /* the async qh for the qtds being unlinked are now gone from the HC */
3130 {
3133 /* Process the idle QHs */
3134 restart:
3149 }
3152 /* Start a new IAA cycle if any QHs are waiting for it */
3157 }
3158 }
3161 {
3166 /* Unlink all the async QHs that have been empty for a timer cycle */
3177 else
3179 }
3180 }
3182 /* Start a new IAA cycle if any QHs are waiting for it */
3186 /* QHs that haven't been empty for long enough will be handled later */
3191 }
3192 }
3194 /* makes sure the async qh will become idle */
3195 /* caller must own fotg210->lock */
3199 {
3200 /*
3201 * If the QH isn't linked then there's nothing we can do
3202 * unless we were called during a giveback, in which case
3203 * qh_completions() has to deal with it.
3204 */
3209 }
3213 }
3216 {
3224 rescan:
3225 /* clean any finished work for this qh */
3229 /*
3230 * Unlinks could happen here; completion reporting
3231 * drops the lock. That's why fotg210->qh_scan_next
3232 * always holds the next qh to scan; if the next qh
3233 * gets unlinked then fotg210->qh_scan_next is adjusted
3234 * in single_unlink_async().
3235 */
3245 }
3246 }
3248 /*
3249 * Unlink empty entries, reducing DMA usage as well
3250 * as HCD schedule-scanning costs. Delay for any qh
3251 * we just scanned, there's a not-unusual case that it
3252 * doesn't stay idle for long.
3253 */
3260 }
3261 }
3262 /* EHCI scheduled transaction support: interrupt, iso, split iso
3263 * These are called "periodic" transactions in the EHCI spec.
3264 *
3265 * Note that for interrupt transfers, the QH/QTD manipulation is shared
3266 * with the "asynchronous" transaction support (control/bulk transfers).
3267 * The only real difference is in how interrupt transfers are scheduled.
3268 *
3269 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
3270 * It keeps track of every ITD (or SITD) that's linked, and holds enough
3271 * pre-calculated schedule data to make appending to the queue be quick.
3272 */
3275 /* periodic_next_shadow - return "next" pointer on shadow list
3276 * @periodic: host pointer to qh/itd
3277 * @tag: hardware tag for type of this record
3278 */
3281 {
3289 }
3290 }
3294 {
3296 /* our fotg210_shadow.qh is actually software part */
3299 /* others are hw parts */
3302 }
3303 }
3305 /* caller must hold fotg210->lock */
3308 {
3313 /* find predecessor of "ptr"; hw and shadow lists are in sync */
3320 }
3321 /* an interrupt entry (at list end) could have been shared */
3325 /* update shadow and hardware lists ... the old "next" pointers
3326 * from ptr may still be in use, the caller updates them.
3327 */
3333 }
3335 /* how many of the uframe's 125 usecs are allocated? */
3338 {
3348 /* is it in the S-mask? */
3351 /* ... or C-mask? */
3358 /* case Q_TYPE_FSTN: */
3360 /* for "save place" FSTNs, count the relevant INTR
3361 * bandwidth from the previous frame
3362 */
3375 }
3376 }
3381 }
3384 {
3391 else
3393 }
3395 /* return true iff the device's transaction translator is available
3396 * for a periodic transfer starting at the specified frame, using
3397 * all the uframes in the mask.
3398 */
3401 {
3405 /* note bandwidth wastage: split never follows csplit
3406 * (different dev or endpoint) until the next uframe.
3407 * calling convention doesn't make that distinction.
3408 */
3411 __hc32 type;
3425 u32 mask;
3429 /* "knows" no gap is needed */
3433 }
3437 /* case Q_TYPE_FSTN: */
3442 }
3444 /* collision or error */
3446 }
3447 }
3449 /* no collision */
3451 }
3454 {
3458 /* Stop waiting to turn off the periodic schedule */
3462 /* Don't start the schedule until PSS is 0 */
3465 }
3468 {
3472 /* Don't turn off the schedule until PSS is 1 */
3474 }
3476 /* periodic schedule slots have iso tds (normal or split) first, then a
3477 * sparse tree for active interrupt transfers.
3478 *
3479 * this just links in a qh; caller guarantees uframe masks are set right.
3480 * no FSTN support (yet; fotg210 0.96+)
3481 */
3483 {
3493 /* high bandwidth, or otherwise every microframe */
3503 /* skip the iso nodes at list head */
3511 }
3513 /* sorting each branch by period (slow-->fast)
3514 * enables sharing interior tree nodes
3515 */
3522 }
3523 /* link in this qh, unless some earlier pass did that */
3531 }
3532 }
3536 /* update per-qh bandwidth for usbfs */
3543 /* maybe enable periodic schedule processing */
3546 }
3550 {
3554 /*
3555 * If qh is for a low/full-speed device, simply unlinking it
3556 * could interfere with an ongoing split transaction. To unlink
3557 * it safely would require setting the QH_INACTIVATE bit and
3558 * waiting at least one frame, as described in EHCI 4.12.2.5.
3559 *
3560 * We won't bother with any of this. Instead, we assume that the
3561 * only reason for unlinking an interrupt QH while the current URB
3562 * is still active is to dequeue all the URBs (flush the whole
3563 * endpoint queue).
3564 *
3565 * If rebalancing the periodic schedule is ever implemented, this
3566 * approach will no longer be valid.
3567 */
3569 /* high bandwidth, or otherwise part of every microframe */
3577 /* update per-qh bandwidth for usbfs */
3588 /* qh->qh_next still "live" to HC */
3596 }
3600 {
3601 /* If the QH isn't linked then there's nothing we can do
3602 * unless we were called during a giveback, in which case
3603 * qh_completions() has to deal with it.
3604 */
3609 }
3613 /* Make sure the unlinks are visible before starting the timer */
3616 /*
3617 * The EHCI spec doesn't say how long it takes the controller to
3618 * stop accessing an unlinked interrupt QH. The timer delay is
3619 * 9 uframes; presumably that will be long enough.
3620 */
3623 /* New entries go at the end of the intr_unlink list */
3626 else
3638 }
3639 }
3642 {
3651 /* reschedule QH iff another request is queued */
3656 /* An error here likely indicates handshake failure
3657 * or no space left in the schedule. Neither fault
3658 * should happen often ...
3659 *
3660 * FIXME kill the now-dysfunctional queued urbs
3661 */
3665 }
3667 /* maybe turn off periodic schedule */
3670 }
3674 {
3677 /* complete split running into next frame?
3678 * given FSTN support, we could sometimes check...
3679 */
3683 /* convert "usecs we need" to "max already claimed" */
3686 /* we "know" 2 and 4 uframe intervals were rejected; so
3687 * for period 0, check _every_ microframe in the schedule.
3688 */
3693 uframe);
3696 }
3699 /* just check the specified uframe, at that period */
3706 }
3708 /* success! */
3710 }
3714 {
3727 }
3729 /* Make sure this tt's buffer is also available for CSPLITs.
3730 * We pessimize a bit; probably the typical full speed case
3731 * doesn't need the second CSPLIT.
3732 *
3733 * NOTE: both SPLIT and CSPLIT could be checked in just
3734 * one smart pass...
3735 */
3748 }
3749 done:
3751 }
3753 /* "first fit" scheduling policy used the first time through,
3754 * or when the previous schedule slot can't be re-used.
3755 */
3757 {
3760 __hc32 c_mask;
3768 /* reuse the previous schedule slots, if we can */
3777 }
3779 /* else scan the schedule to find a group of slots such that all
3780 * uframes have enough periodic bandwidth available.
3781 */
3783 /* "normal" case, uframing flexible except with splits */
3795 }
3796 }
3798 /* qh->period == 0 means every uframe */
3803 }
3808 /* reset S-frame and (maybe) C-frame masks */
3817 /* stuff into the periodic schedule */
3819 done:
3821 }
3825 {
3832 /* get endpoint and transfer/schedule data */
3840 }
3845 /* get qh and force any scheduling errors */
3851 }
3856 }
3858 /* then queue the urb's tds to the qh */
3862 /* ... update usbfs periodic stats */
3865 done:
3868 done_not_linked:
3874 }
3877 {
3882 rescan:
3883 /* clean any finished work for this qh */
3887 /*
3888 * Unlinks could happen here; completion reporting
3889 * drops the lock. That's why fotg210->qh_scan_next
3890 * always holds the next qh to scan; if the next qh
3891 * gets unlinked then fotg210->qh_scan_next is adjusted
3892 * in qh_unlink_periodic().
3893 */
3901 }
3902 }
3903 }
3905 /* fotg210_iso_stream ops work with both ITD and SITD */
3908 {
3916 }
3918 }
3923 {
3924 u32 buf1;
3930 /*
3931 * this might be a "high bandwidth" highspeed endpoint,
3932 * as encoded in the ep descriptor's wMaxPacket field
3933 */
3939 else
3951 /* usbfs wants to report the average usecs per frame tied up
3952 * when transfers on this endpoint are scheduled ...
3953 */
3962 }
3971 }
3975 {
3984 else
3997 }
3999 /* if dev->ep[epnum] is a QH, hw is set */
4005 }
4009 }
4011 /* fotg210_iso_sched ops can be ITD-only or SITD-only */
4014 gfp_t mem_flags)
4015 {
4025 }
4030 {
4034 /* how many uframes are needed for these transfers */
4037 /* figure out per-uframe itd fields that we'll need later
4038 * when we fit new itds into the schedule.
4039 */
4043 dma_addr_t buf;
4044 u32 trans;
4057 /* might need to cross a buffer page within a uframe */
4062 }
4063 }
4067 {
4070 /* caller must hold fotg210->lock!*/
4073 }
4077 {
4079 dma_addr_t itd_dma;
4093 else
4096 /* allocate/init ITDs */
4100 /*
4101 * Use iTDs from the free list, but not iTDs that may
4102 * still be in use by the hardware.
4103 */
4112 alloc_itd:
4121 }
4122 }
4126 }
4129 /* temporarily store schedule info in hcpriv */
4133 }
4137 {
4140 /* can't commit more than uframe_periodic_max usec */
4145 /* we know urb->interval is 2^N uframes */
4149 }
4151 /* This scheduler plans almost as far into the future as it has actual
4152 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
4153 * "as small as possible" to be cache-friendlier.) That limits the size
4154 * transfers you can stream reliably; avoid more than 64 msec per urb.
4155 * Also avoid queue depths of less than fotg210's worst irq latency (affected
4156 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
4157 * and other factors); or more than about 230 msec total (for portability,
4158 * given FOTG210_TUNE_FLS and the slop). Or, write a smarter scheduler!
4159 */
4165 {
4178 }
4182 /* Typical case: reuse current schedule, stream is still active.
4183 * Hopefully there are no gaps from the host falling behind
4184 * (irq delays etc), but if there are we'll take the next
4185 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
4186 */
4188 u32 excess;
4190 /* For high speed devices, allow scheduling within the
4191 * isochronous scheduling threshold. For full speed devices
4192 * and Intel PCI-based controllers, don't (work around for
4193 * Intel ICH9 bug).
4194 */
4197 else
4200 /* Fell behind (by up to twice the slop amount)?
4201 * We decide based on the time of the last currently-scheduled
4202 * slot, not the time of the next available slot.
4203 */
4208 else
4213 mod);
4216 }
4217 }
4219 /* need to schedule; when's the next (u)frame we could start?
4220 * this is bigger than fotg210->i_thresh allows; scheduling itself
4221 * isn't free, the slop should handle reasonably slow cpus. it
4222 * can also help high bandwidth if the dma and irq loads don't
4223 * jump until after the queue is primed.
4224 */
4230 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
4232 /* find a uframe slot with enough bandwidth.
4233 * Early uframes are more precious because full-speed
4234 * iso IN transfers can't use late uframes,
4235 * and therefore they should be allocated last.
4236 */
4240 start--;
4241 /* check schedule: enough space? */
4247 /* no room in the schedule */
4253 }
4254 }
4256 /* Tried to schedule too far into the future? */
4264 }
4268 /* report high speed start in uframes; full speed, in frames */
4273 /* Make sure scan_isoc() sees these */
4278 fail:
4282 }
4286 {
4289 /* it's been recently zeroed */
4298 /* All other fields are filled when scheduling */
4299 }
4304 {
4316 /* iso_frame_desc[].offset must be strictly increasing */
4323 }
4324 }
4328 {
4334 /* skip any iso nodes which might belong to previous microframes */
4342 }
4350 }
4352 /* fit urb's itds into the selected schedule slot; activate as needed */
4355 {
4372 }
4374 /* fill iTDs uframe by uframe */
4377 /* ASSERT: we have all necessary itds */
4379 /* ASSERT: no itds for this endpoint in this uframe */
4387 }
4396 packet++;
4398 /* link completed itds into the schedule */
4402 itd);
4404 }
4405 }
4408 /* don't need that schedule data any more */
4414 }
4416 #define ISO_ERRS (FOTG210_ISOC_BUF_ERR | FOTG210_ISOC_BABBLE |\
4417 FOTG210_ISOC_XACTERR)
4419 /* Process and recycle a completed ITD. Return true iff its urb completed,
4420 * and hence its completion callback probably added things to the hardware
4421 * schedule.
4422 *
4423 * Note that we carefully avoid recycling this descriptor until after any
4424 * completion callback runs, so that it won't be reused quickly. That is,
4425 * assuming (a) no more than two urbs per frame on this endpoint, and also
4426 * (b) only this endpoint's completions submit URBs. It seems some silicon
4427 * corrupts things if you reuse completed descriptors very quickly...
4428 */
4430 {
4433 u32 t;
4440 /* for each uframe with a packet */
4450 /* report transfer status */
4462 /* HC need not update length with this error */
4467 }
4473 /* URB was too late */
4475 }
4476 }
4478 /* handle completion now? */
4482 /* ASSERT: it's really the last itd for this urb
4483 * list_for_each_entry (itd, &stream->td_list, itd_list)
4484 * BUG_ON (itd->urb == urb);
4485 */
4487 /* give urb back to the driver; completion often (re)submits */
4503 }
4505 done:
4508 /* Add to the end of the free list for later reuse */
4511 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
4516 }
4519 }
4522 gfp_t mem_flags)
4523 {
4528 /* Get iso_stream head */
4533 }
4536 USB_PORT_STAT_HIGH_SPEED)) {
4540 }
4542 #ifdef FOTG210_URB_TRACE
4550 stream);
4551 #endif
4553 /* allocate ITDs w/o locking anything */
4558 }
4560 /* schedule ... need to lock */
4565 }
4572 else
4574 done_not_linked:
4576 done:
4578 }
4582 {
4588 /* scan each element in frame's queue for completions */
4598 /* If this ITD is still active, leave it for
4599 * later processing ... check the next entry.
4600 * No need to check for activity unless the
4601 * frame is current.
4602 */
4609 }
4617 }
4618 }
4620 /* Take finished ITDs out of the schedule
4621 * and process them: recycle, maybe report
4622 * URB completion. HC won't cache the
4623 * pointer for much longer, if at all.
4624 */
4635 fallthrough;
4638 /* End of the iTDs and siTDs */
4641 }
4643 /* assume completion callbacks modify the queue */
4646 }
4648 }
4651 {
4656 /*
4657 * When running, scan from last scan point up to "now"
4658 * else clean up by scanning everything that's left.
4659 * Touches as few pages as possible: cache-friendly.
4660 */
4668 }
4678 /* Stop when we have reached the current frame */
4682 }
4684 }
4686 /* Display / Set uframe_periodic_max
4687 */
4690 {
4697 }
4702 {
4708 ssize_t ret;
4716 uframe_periodic_max);
4718 }
4722 /*
4723 * lock, so that our checking does not race with possible periodic
4724 * bandwidth allocation through submitting new urbs.
4725 */
4728 /*
4729 * for request to decrease max periodic bandwidth, we have to check
4730 * every microframe in the schedule to see whether the decrease is
4731 * possible.
4732 */
4740 uframe));
4744 "cannot decrease uframe_periodic_max because periodic bandwidth is already allocated (%u > %u)\n",
4747 }
4748 }
4750 /* increasing is always ok */
4762 out_unlock:
4765 }
4770 {
4774 }
4777 {
4781 }
4782 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
4783 * The firmware seems to think that powering off is a wakeup event!
4784 * This routine turns off remote wakeup and everything else, on all ports.
4785 */
4787 {
4791 }
4793 /* Halt HC, turn off all ports, and let the BIOS use the companion controllers.
4794 * Must be called with interrupts enabled and the lock not held.
4795 */
4797 {
4804 }
4806 /* fotg210_shutdown kick in for silicon on any bus (not just pci, etc).
4807 * This forcibly disables dma and IRQs, helping kexec and other cases
4808 * where the next system software may expect clean state.
4809 */
4811 {
4823 }
4825 /* fotg210_work is called from some interrupts, timers, and so on.
4826 * it calls driver completion functions, after dropping fotg210->lock.
4827 */
4829 {
4830 /* another CPU may drop fotg210->lock during a schedule scan while
4831 * it reports urb completions. this flag guards against bogus
4832 * attempts at re-entrant schedule scanning.
4833 */
4837 }
4840 rescan:
4852 /* the IO watchdog guards against hardware or driver bugs that
4853 * misplace IRQs, and should let us run completely without IRQs.
4854 * such lossage has been observed on both VT6202 and VT8235.
4855 */
4857 }
4859 /* Called when the fotg210_hcd module is removed.
4860 */
4862 {
4867 /* no more interrupts ... */
4881 /* root hub is shut down separately (first, when possible) */
4887 #ifdef FOTG210_STATS
4893 #endif
4897 }
4899 /* one-time init, only for memory state */
4901 {
4903 u32 temp;
4905 u32 hcc_params;
4910 /*
4911 * keep io watchdog by default, those good HCDs could turn off it later
4912 */
4921 /*
4922 * by default set standard 80% (== 100 usec/uframe) max periodic
4923 * bandwidth as required by USB 2.0
4924 */
4927 /*
4928 * hw default: 1K periodic list heads, one per frame.
4929 * periodic_size can shrink by USBCMD update if hcc_params allows.
4930 */
4936 /* periodic schedule size can be smaller than default */
4949 }
4950 }
4955 /* controllers may cache some of the periodic schedule ... */
4958 /*
4959 * dedicate a qh for the async ring head, since we couldn't unlink
4960 * a 'real' qh without stopping the async schedule [4.8]. use it
4961 * as the 'reclamation list head' too.
4962 * its dummy is used in hw_alt_next of many tds, to prevent the qh
4963 * from automatically advancing to the next td after short reads.
4964 */
4974 /* clear interrupt enables, set irq latency */
4979 /* HW default park == 3, on hardware that supports it (like
4980 * NVidia and ALI silicon), maximizes throughput on the async
4981 * schedule by avoiding QH fetches between transfers.
4982 *
4983 * With fast usb storage devices and NForce2, "park" seems to
4984 * make problems: throughput reduction (!), data errors...
4985 */
4990 }
4992 }
4994 /* periodic schedule size can be smaller than default */
4997 }
5000 /* Accept arbitrarily long scatter-gather lists */
5004 }
5006 /* start HC running; it's halted, hcd_fotg210_init() has been run (once) */
5008 {
5010 u32 temp;
5014 /* EHCI spec section 4.1 */
5021 /*
5022 * hcc_params controls whether fotg210->regs->segment must (!!!)
5023 * be used; it constrains QH/ITD/SITD and QTD locations.
5024 * dma_pool consistent memory always uses segment zero.
5025 * streaming mappings for I/O buffers, like pci_map_single(),
5026 * can return segments above 4GB, if the device allows.
5027 *
5028 * NOTE: the dma mask is visible through dev->dma_mask, so
5029 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
5030 * Scsi_Host.highmem_io, and so forth. It's readonly to all
5031 * host side drivers though.
5032 */
5035 /*
5036 * Philips, Intel, and maybe others need CMD_RUN before the
5037 * root hub will detect new devices (why?); NEC doesn't
5038 */
5044 /*
5045 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
5046 * are explicitly handed to companion controller(s), so no TT is
5047 * involved with the root hub. (Except where one is integrated,
5048 * and there's no companion controller unless maybe for USB OTG.)
5049 *
5050 * Turning on the CF flag will transfer ownership of all ports
5051 * from the companions to the EHCI controller. If any of the
5052 * companions are in the middle of a port reset at the time, it
5053 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
5054 * guarantees that no resets are in progress. After we set CF,
5055 * a short delay lets the hardware catch up; new resets shouldn't
5056 * be started before the port switching actions could complete.
5057 */
5060 /* unblock posted writes */
5076 /* GRR this is run-once init(), being done every time the HC starts.
5077 * So long as they're part of class devices, we can't do it init()
5078 * since the class device isn't created that early.
5079 */
5084 }
5087 {
5097 /* cache this readonly data; minimize chip reads */
5103 /* data structure init */
5115 }
5118 {
5127 /* e.g. cardbus physical eject */
5131 }
5133 /*
5134 * We don't use STS_FLR, but some controllers don't like it to
5135 * remain on, so mask it out along with the other status bits.
5136 */
5139 /* Shared IRQ? */
5144 }
5146 /* clear (just) interrupts */
5151 /* unrequested/ignored: Frame List Rollover */
5154 /* INT, ERR, and IAA interrupt rates can be throttled */
5156 /* normal [4.15.1.2] or error [4.15.1.1] completion */
5160 else
5163 }
5165 /* complete the unlinking of some qh [4.15.2.3] */
5168 /* Turn off the IAA watchdog */
5172 /*
5173 * Mild optimization: Allow another IAAD to reset the
5174 * hrtimer, if one occurs before the next expiration.
5175 * In theory we could always cancel the hrtimer, but
5176 * tests show that about half the time it will be reset
5177 * for some other event anyway.
5178 */
5182 /* guard against (alleged) silicon errata */
5190 }
5192 /* remote wakeup [4.3.1] */
5197 /* kick root hub later */
5200 /* resume root hub? */
5212 /* start 20 msec resume signaling from this port,
5213 * and make hub_wq collect PORT_STAT_C_SUSPEND to
5214 * stop that signaling. Use 5 ms extra for safety,
5215 * like usb_port_resume() does.
5216 */
5221 }
5222 }
5224 /* PCI errors [4.15.2.4] */
5229 dead:
5232 /* Don't let the controller do anything more */
5241 /* Handle completions when the controller stops */
5243 }
5251 }
5253 /* non-error returns are a promise to giveback() the urb later
5254 * we drop ownership so next owner (or urb unlink) can get it
5255 *
5256 * urb + dev is in hcd.self.controller.urb_list
5257 * we're queueing TDs onto software and hardware lists
5258 *
5259 * hcd-specific init for hcpriv hasn't been done yet
5260 *
5261 * NOTE: control, bulk, and interrupt share the same code to append TDs
5262 * to a (possibly active) QH, and the same QH scanning code.
5263 */
5265 gfp_t mem_flags)
5266 {
5274 /* qh_completions() code doesn't handle all the fault cases
5275 * in multi-TD control transfers. Even 1KB is rare anyway.
5276 */
5279 fallthrough;
5280 /* case PIPE_BULK: */
5293 }
5294 }
5296 /* remove from hardware lists
5297 * completions normally happen asynchronously
5298 */
5301 {
5313 /* case PIPE_CONTROL: */
5314 /* case PIPE_BULK:*/
5326 /* already started */
5329 /* QH might be waiting for a Clear-TT-Buffer */
5332 }
5351 }
5355 /* itd... */
5357 /* wait till next completion, do it then. */
5358 /* completion irqs can wait up to 1024 msec, */
5360 }
5361 done:
5364 }
5366 /* bulk qh holds the data toggle */
5370 {
5375 /* ASSERT: any requests/urbs are being unlinked */
5376 /* ASSERT: nobody can be submitting urbs for this any more */
5378 rescan:
5384 /* endpoints can be iso streams. for now, we don't
5385 * accelerate iso completions ... so spin a while.
5386 */
5393 /* BUG_ON(!list_empty(&stream->free_list)); */
5396 }
5407 /* periodic qh self-unlinks on empty, and a COMPLETING qh
5408 * may already be unlinked.
5409 */
5412 fallthrough;
5415 idle_timeout:
5425 }
5426 fallthrough;
5428 /* caller was supposed to have unlinked any requests;
5429 * that's not our job. just leak this memory.
5430 */
5435 }
5436 done:
5439 }
5443 {
5457 /* For Bulk and Interrupt endpoints we maintain the toggle state
5458 * in the hardware; the toggle bits in udev aren't used at all.
5459 * When an endpoint is reset by usb_clear_halt() we must reset
5460 * the toggle bit in the QH.
5461 */
5469 /* The toggle value in the QH can't be updated
5470 * while the QH is active. Unlink it now;
5471 * re-linking will call qh_refresh().
5472 */
5475 else
5477 }
5478 }
5480 }
5483 {
5488 }
5490 /* The EHCI in ChipIdea HDRC cannot be a separate module or device,
5491 * because its registers (and irq) are shared between host/gadget/otg
5492 * functions and in order to facilitate role switching we cannot
5493 * give the fotg210 driver exclusive access to those.
5494 */
5504 /*
5505 * generic hardware linkage
5506 */
5510 /*
5511 * basic lifecycle operations
5512 */
5518 /*
5519 * managing i/o requests and associated device resources
5520 */
5526 /*
5527 * scheduling support
5528 */
5531 /*
5532 * root hub support
5533 */
5543 };
5546 {
5547 u32 value;
5556 }
5558 /*
5559 * fotg210_hcd_probe - initialize faraday FOTG210 HCDs
5560 *
5561 * Allocates basic resources for this USB host controller, and
5562 * then invokes the start() method for the HCD associated with it
5563 * through the hotplug entry's driver_data.
5564 */
5566 {
5584 }
5594 }
5603 }
5612 /* It's OK not to supply this clock */
5619 }
5621 /*
5622 * Percolate deferrals, for anything else,
5623 * just live without the clocking.
5624 */
5627 }
5639 }
5645 failed_dis_clk:
5649 }
5650 failed_put_hcd:
5652 fail_create_hcd:
5655 }
5657 /*
5658 * fotg210_hcd_remove - shutdown processing for EHCI HCDs
5659 * @dev: USB Host Controller being removed
5660 *
5661 */
5663 {
5670 }
5676 }
5678 #ifdef CONFIG_OF
5681 {},
5682 };
5684 #endif
5690 },
5693 };
5696 {
5706 pr_warn("Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
5720 clean:
5726 }
5730 {
5734 }