1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2006 by Texas Instruments
5 * This file is part of the Inventra Controller Driver for Linux.
8 #include <linux/module.h>
9 #include <linux/kernel.h>
10 #include <linux/sched.h>
11 #include <linux/list.h>
12 #include <linux/delay.h>
13 #include <linux/clk.h>
14 #include <linux/err.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/usb/usb_phy_generic.h>
21 #include <mach/cputype.h>
22 #include <mach/hardware.h>
24 #include <asm/mach-types.h>
26 #include "musb_core.h"
32 #define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR)
33 #define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
37 struct platform_device
*musb
;
40 struct gpio_desc
*vbus
;
41 struct work_struct vbus_work
;
44 /* REVISIT (PM) we should be able to keep the PHY in low power mode most
45 * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
46 * and, when in host mode, autosuspending idle root ports... PHYPLLON
47 * (overriding SUSPENDM?) then likely needs to stay off.
50 static inline void phy_on(void)
52 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
54 /* power everything up; start the on-chip PHY and its PLL */
55 phy_ctrl
&= ~(USBPHY_OSCPDWN
| USBPHY_OTGPDWN
| USBPHY_PHYPDWN
);
56 phy_ctrl
|= USBPHY_SESNDEN
| USBPHY_VBDTCTEN
| USBPHY_PHYPLLON
;
57 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
59 /* wait for PLL to lock before proceeding */
60 while ((__raw_readl(USB_PHY_CTRL
) & USBPHY_PHYCLKGD
) == 0)
64 static inline void phy_off(void)
66 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
68 /* powerdown the on-chip PHY, its PLL, and the OTG block */
69 phy_ctrl
&= ~(USBPHY_SESNDEN
| USBPHY_VBDTCTEN
| USBPHY_PHYPLLON
);
70 phy_ctrl
|= USBPHY_OSCPDWN
| USBPHY_OTGPDWN
| USBPHY_PHYPDWN
;
71 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
74 static int dma_off
= 1;
76 static void davinci_musb_enable(struct musb
*musb
)
80 /* workaround: setup irqs through both register sets */
81 tmp
= (musb
->epmask
& DAVINCI_USB_TX_ENDPTS_MASK
)
82 << DAVINCI_USB_TXINT_SHIFT
;
83 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
85 tmp
= (musb
->epmask
& (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK
))
86 << DAVINCI_USB_RXINT_SHIFT
;
87 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
91 tmp
|= ((val
& 0x01ff) << DAVINCI_USB_USBINT_SHIFT
);
92 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
94 if (is_dma_capable() && !dma_off
)
95 printk(KERN_WARNING
"%s %s: dma not reactivated\n",
100 /* force a DRVVBUS irq so we can start polling for ID change */
101 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_SET_REG
,
102 DAVINCI_INTR_DRVVBUS
<< DAVINCI_USB_USBINT_SHIFT
);
106 * Disable the HDRC and flush interrupts
108 static void davinci_musb_disable(struct musb
*musb
)
110 /* because we don't set CTRLR.UINT, "important" to:
111 * - not read/write INTRUSB/INTRUSBE
112 * - (except during initial setup, as workaround)
113 * - use INTSETR/INTCLRR instead
115 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_CLR_REG
,
116 DAVINCI_USB_USBINT_MASK
117 | DAVINCI_USB_TXINT_MASK
118 | DAVINCI_USB_RXINT_MASK
);
119 musb_writel(musb
->ctrl_base
, DAVINCI_USB_EOI_REG
, 0);
121 if (is_dma_capable() && !dma_off
)
122 WARNING("dma still active\n");
126 #define portstate(stmt) stmt
129 * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
130 * which doesn't wire DRVVBUS to the FET that switches it. Unclear
131 * if that's a problem with the DM6446 chip or just with that board.
133 * In either case, the DM355 EVM automates DRVVBUS the normal way,
134 * when J10 is out, and TI documents it as handling OTG.
137 /* I2C operations are always synchronous, and require a task context.
138 * With unloaded systems, using the shared workqueue seems to suffice
139 * to satisfy the 100msec A_WAIT_VRISE timeout...
141 static void evm_deferred_drvvbus(struct work_struct
*work
)
143 struct davinci_glue
*glue
= container_of(work
, struct davinci_glue
,
146 gpiod_set_value_cansleep(glue
->vbus
, glue
->vbus_state
);
147 glue
->vbus_state
= !glue
->vbus_state
;
150 static void davinci_musb_source_power(struct musb
*musb
, int is_on
,
153 struct davinci_glue
*glue
= dev_get_drvdata(musb
->controller
->parent
);
155 /* This GPIO handling is entirely optional */
162 if (glue
->vbus_state
== is_on
)
164 /* 0/1 vs "-1 == unknown/init" */
165 glue
->vbus_state
= !is_on
;
167 if (machine_is_davinci_evm()) {
169 gpiod_set_value_cansleep(glue
->vbus
, glue
->vbus_state
);
171 schedule_work(&glue
->vbus_work
);
174 glue
->vbus_state
= is_on
;
177 static void davinci_musb_set_vbus(struct musb
*musb
, int is_on
)
179 WARN_ON(is_on
&& is_peripheral_active(musb
));
180 davinci_musb_source_power(musb
, is_on
, 0);
184 #define POLL_SECONDS 2
186 static void otg_timer(struct timer_list
*t
)
188 struct musb
*musb
= from_timer(musb
, t
, dev_timer
);
189 void __iomem
*mregs
= musb
->mregs
;
193 /* We poll because DaVinci's won't expose several OTG-critical
194 * status change events (from the transceiver) otherwise.
196 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
197 dev_dbg(musb
->controller
, "poll devctl %02x (%s)\n", devctl
,
198 usb_otg_state_string(musb
->xceiv
->otg
->state
));
200 spin_lock_irqsave(&musb
->lock
, flags
);
201 switch (musb
->xceiv
->otg
->state
) {
202 case OTG_STATE_A_WAIT_VFALL
:
203 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
204 * seems to mis-handle session "start" otherwise (or in our
205 * case "recover"), in routine "VBUS was valid by the time
206 * VBUSERR got reported during enumeration" cases.
208 if (devctl
& MUSB_DEVCTL_VBUS
) {
209 mod_timer(&musb
->dev_timer
, jiffies
+ POLL_SECONDS
* HZ
);
212 musb
->xceiv
->otg
->state
= OTG_STATE_A_WAIT_VRISE
;
213 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_SET_REG
,
214 MUSB_INTR_VBUSERROR
<< DAVINCI_USB_USBINT_SHIFT
);
216 case OTG_STATE_B_IDLE
:
218 * There's no ID-changed IRQ, so we have no good way to tell
219 * when to switch to the A-Default state machine (by setting
220 * the DEVCTL.SESSION flag).
222 * Workaround: whenever we're in B_IDLE, try setting the
223 * session flag every few seconds. If it works, ID was
224 * grounded and we're now in the A-Default state machine.
226 * NOTE setting the session flag is _supposed_ to trigger
227 * SRP, but clearly it doesn't.
229 musb_writeb(mregs
, MUSB_DEVCTL
,
230 devctl
| MUSB_DEVCTL_SESSION
);
231 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
232 if (devctl
& MUSB_DEVCTL_BDEVICE
)
233 mod_timer(&musb
->dev_timer
, jiffies
+ POLL_SECONDS
* HZ
);
235 musb
->xceiv
->otg
->state
= OTG_STATE_A_IDLE
;
240 spin_unlock_irqrestore(&musb
->lock
, flags
);
243 static irqreturn_t
davinci_musb_interrupt(int irq
, void *__hci
)
246 irqreturn_t retval
= IRQ_NONE
;
247 struct musb
*musb
= __hci
;
248 struct usb_otg
*otg
= musb
->xceiv
->otg
;
249 void __iomem
*tibase
= musb
->ctrl_base
;
253 spin_lock_irqsave(&musb
->lock
, flags
);
255 /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through
256 * the Mentor registers (except for setup), use the TI ones and EOI.
258 * Docs describe irq "vector" registers associated with the CPPI and
259 * USB EOI registers. These hold a bitmask corresponding to the
260 * current IRQ, not an irq handler address. Would using those bits
261 * resolve some of the races observed in this dispatch code??
264 /* CPPI interrupts share the same IRQ line, but have their own
265 * mask, state, "vector", and EOI registers.
267 cppi
= container_of(musb
->dma_controller
, struct cppi
, controller
);
268 if (is_cppi_enabled(musb
) && musb
->dma_controller
&& !cppi
->irq
)
269 retval
= cppi_interrupt(irq
, __hci
);
271 /* ack and handle non-CPPI interrupts */
272 tmp
= musb_readl(tibase
, DAVINCI_USB_INT_SRC_MASKED_REG
);
273 musb_writel(tibase
, DAVINCI_USB_INT_SRC_CLR_REG
, tmp
);
274 dev_dbg(musb
->controller
, "IRQ %08x\n", tmp
);
276 musb
->int_rx
= (tmp
& DAVINCI_USB_RXINT_MASK
)
277 >> DAVINCI_USB_RXINT_SHIFT
;
278 musb
->int_tx
= (tmp
& DAVINCI_USB_TXINT_MASK
)
279 >> DAVINCI_USB_TXINT_SHIFT
;
280 musb
->int_usb
= (tmp
& DAVINCI_USB_USBINT_MASK
)
281 >> DAVINCI_USB_USBINT_SHIFT
;
283 /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
284 * DaVinci's missing ID change IRQ. We need an ID change IRQ to
285 * switch appropriately between halves of the OTG state machine.
286 * Managing DEVCTL.SESSION per Mentor docs requires we know its
287 * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
288 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
290 if (tmp
& (DAVINCI_INTR_DRVVBUS
<< DAVINCI_USB_USBINT_SHIFT
)) {
291 int drvvbus
= musb_readl(tibase
, DAVINCI_USB_STAT_REG
);
292 void __iomem
*mregs
= musb
->mregs
;
293 u8 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
294 int err
= musb
->int_usb
& MUSB_INTR_VBUSERROR
;
296 err
= musb
->int_usb
& MUSB_INTR_VBUSERROR
;
298 /* The Mentor core doesn't debounce VBUS as needed
299 * to cope with device connect current spikes. This
300 * means it's not uncommon for bus-powered devices
301 * to get VBUS errors during enumeration.
303 * This is a workaround, but newer RTL from Mentor
304 * seems to allow a better one: "re"starting sessions
305 * without waiting (on EVM, a **long** time) for VBUS
306 * to stop registering in devctl.
308 musb
->int_usb
&= ~MUSB_INTR_VBUSERROR
;
309 musb
->xceiv
->otg
->state
= OTG_STATE_A_WAIT_VFALL
;
310 mod_timer(&musb
->dev_timer
, jiffies
+ POLL_SECONDS
* HZ
);
311 WARNING("VBUS error workaround (delay coming)\n");
312 } else if (drvvbus
) {
314 musb
->xceiv
->otg
->state
= OTG_STATE_A_WAIT_VRISE
;
315 portstate(musb
->port1_status
|= USB_PORT_STAT_POWER
);
316 del_timer(&musb
->dev_timer
);
320 musb
->xceiv
->otg
->state
= OTG_STATE_B_IDLE
;
321 portstate(musb
->port1_status
&= ~USB_PORT_STAT_POWER
);
324 /* NOTE: this must complete poweron within 100 msec
325 * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
327 davinci_musb_source_power(musb
, drvvbus
, 0);
328 dev_dbg(musb
->controller
, "VBUS %s (%s)%s, devctl %02x\n",
329 drvvbus
? "on" : "off",
330 usb_otg_state_string(musb
->xceiv
->otg
->state
),
333 retval
= IRQ_HANDLED
;
336 if (musb
->int_tx
|| musb
->int_rx
|| musb
->int_usb
)
337 retval
|= musb_interrupt(musb
);
339 /* irq stays asserted until EOI is written */
340 musb_writel(tibase
, DAVINCI_USB_EOI_REG
, 0);
342 /* poll for ID change */
343 if (musb
->xceiv
->otg
->state
== OTG_STATE_B_IDLE
)
344 mod_timer(&musb
->dev_timer
, jiffies
+ POLL_SECONDS
* HZ
);
346 spin_unlock_irqrestore(&musb
->lock
, flags
);
351 static int davinci_musb_set_mode(struct musb
*musb
, u8 mode
)
353 /* EVM can't do this (right?) */
357 static int davinci_musb_init(struct musb
*musb
)
359 void __iomem
*tibase
= musb
->ctrl_base
;
363 musb
->xceiv
= usb_get_phy(USB_PHY_TYPE_USB2
);
364 if (IS_ERR_OR_NULL(musb
->xceiv
)) {
369 musb
->mregs
+= DAVINCI_BASE_OFFSET
;
371 /* returns zero if e.g. not clocked */
372 revision
= musb_readl(tibase
, DAVINCI_USB_VERSION_REG
);
376 timer_setup(&musb
->dev_timer
, otg_timer
, 0);
378 davinci_musb_source_power(musb
, 0, 1);
380 /* dm355 EVM swaps D+/D- for signal integrity, and
381 * is clocked from the main 24 MHz crystal.
383 if (machine_is_davinci_dm355_evm()) {
384 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
386 phy_ctrl
&= ~(3 << 9);
387 phy_ctrl
|= USBPHY_DATAPOL
;
388 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
391 /* On dm355, the default-A state machine needs DRVVBUS control.
392 * If we won't be a host, there's no need to turn it on.
394 if (cpu_is_davinci_dm355()) {
395 u32 deepsleep
= __raw_readl(DM355_DEEPSLEEP
);
397 deepsleep
&= ~DRVVBUS_FORCE
;
398 __raw_writel(deepsleep
, DM355_DEEPSLEEP
);
401 /* reset the controller */
402 musb_writel(tibase
, DAVINCI_USB_CTRL_REG
, 0x1);
404 /* start the on-chip PHY and its PLL */
409 /* NOTE: irqs are in mixed mode, not bypass to pure-musb */
410 pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
411 revision
, __raw_readl(USB_PHY_CTRL
),
412 musb_readb(tibase
, DAVINCI_USB_CTRL_REG
));
414 musb
->isr
= davinci_musb_interrupt
;
418 usb_put_phy(musb
->xceiv
);
420 usb_phy_generic_unregister();
424 static int davinci_musb_exit(struct musb
*musb
)
429 del_timer_sync(&musb
->dev_timer
);
432 if (cpu_is_davinci_dm355()) {
433 u32 deepsleep
= __raw_readl(DM355_DEEPSLEEP
);
435 deepsleep
&= ~DRVVBUS_FORCE
;
436 deepsleep
|= DRVVBUS_OVERRIDE
;
437 __raw_writel(deepsleep
, DM355_DEEPSLEEP
);
440 davinci_musb_source_power(musb
, 0 /*off*/, 1);
443 * delay, to avoid problems with module reload.
444 * if there's no peripheral connected, this can take a
445 * long time to fall, especially on EVM with huge C133.
448 devctl
= musb_readb(musb
->mregs
, MUSB_DEVCTL
);
449 if (!(devctl
& MUSB_DEVCTL_VBUS
))
451 if ((devctl
& MUSB_DEVCTL_VBUS
) != warn
) {
452 warn
= devctl
& MUSB_DEVCTL_VBUS
;
453 dev_dbg(musb
->controller
, "VBUS %d\n",
454 warn
>> MUSB_DEVCTL_VBUS_SHIFT
);
458 } while (maxdelay
> 0);
460 /* in OTG mode, another host might be connected */
461 if (devctl
& MUSB_DEVCTL_VBUS
)
462 dev_dbg(musb
->controller
, "VBUS off timeout (devctl %02x)\n", devctl
);
466 usb_put_phy(musb
->xceiv
);
471 static const struct musb_platform_ops davinci_ops
= {
472 .quirks
= MUSB_DMA_CPPI
,
473 .init
= davinci_musb_init
,
474 .exit
= davinci_musb_exit
,
476 #ifdef CONFIG_USB_TI_CPPI_DMA
477 .dma_init
= cppi_dma_controller_create
,
478 .dma_exit
= cppi_dma_controller_destroy
,
480 .enable
= davinci_musb_enable
,
481 .disable
= davinci_musb_disable
,
483 .set_mode
= davinci_musb_set_mode
,
485 .set_vbus
= davinci_musb_set_vbus
,
488 static const struct platform_device_info davinci_dev_info
= {
490 .id
= PLATFORM_DEVID_AUTO
,
491 .dma_mask
= DMA_BIT_MASK(32),
494 static int davinci_probe(struct platform_device
*pdev
)
496 struct resource musb_resources
[3];
497 struct musb_hdrc_platform_data
*pdata
= dev_get_platdata(&pdev
->dev
);
498 struct platform_device
*musb
;
499 struct davinci_glue
*glue
;
500 struct platform_device_info pinfo
;
505 glue
= devm_kzalloc(&pdev
->dev
, sizeof(*glue
), GFP_KERNEL
);
509 clk
= devm_clk_get(&pdev
->dev
, "usb");
511 dev_err(&pdev
->dev
, "failed to get clock\n");
516 ret
= clk_enable(clk
);
518 dev_err(&pdev
->dev
, "failed to enable clock\n");
522 glue
->dev
= &pdev
->dev
;
525 pdata
->platform_ops
= &davinci_ops
;
527 glue
->vbus
= devm_gpiod_get_optional(&pdev
->dev
, NULL
, GPIOD_OUT_LOW
);
528 if (IS_ERR(glue
->vbus
)) {
529 ret
= PTR_ERR(glue
->vbus
);
532 glue
->vbus_state
= -1;
533 INIT_WORK(&glue
->vbus_work
, evm_deferred_drvvbus
);
536 usb_phy_generic_register();
537 platform_set_drvdata(pdev
, glue
);
539 memset(musb_resources
, 0x00, sizeof(*musb_resources
) *
540 ARRAY_SIZE(musb_resources
));
542 musb_resources
[0].name
= pdev
->resource
[0].name
;
543 musb_resources
[0].start
= pdev
->resource
[0].start
;
544 musb_resources
[0].end
= pdev
->resource
[0].end
;
545 musb_resources
[0].flags
= pdev
->resource
[0].flags
;
547 musb_resources
[1].name
= pdev
->resource
[1].name
;
548 musb_resources
[1].start
= pdev
->resource
[1].start
;
549 musb_resources
[1].end
= pdev
->resource
[1].end
;
550 musb_resources
[1].flags
= pdev
->resource
[1].flags
;
553 * For DM6467 3 resources are passed. A placeholder for the 3rd
554 * resource is always there, so it's safe to always copy it...
556 musb_resources
[2].name
= pdev
->resource
[2].name
;
557 musb_resources
[2].start
= pdev
->resource
[2].start
;
558 musb_resources
[2].end
= pdev
->resource
[2].end
;
559 musb_resources
[2].flags
= pdev
->resource
[2].flags
;
561 pinfo
= davinci_dev_info
;
562 pinfo
.parent
= &pdev
->dev
;
563 pinfo
.res
= musb_resources
;
564 pinfo
.num_res
= ARRAY_SIZE(musb_resources
);
566 pinfo
.size_data
= sizeof(*pdata
);
568 glue
->musb
= musb
= platform_device_register_full(&pinfo
);
571 dev_err(&pdev
->dev
, "failed to register musb device: %d\n", ret
);
584 static int davinci_remove(struct platform_device
*pdev
)
586 struct davinci_glue
*glue
= platform_get_drvdata(pdev
);
588 platform_device_unregister(glue
->musb
);
589 usb_phy_generic_unregister();
590 clk_disable(glue
->clk
);
595 static struct platform_driver davinci_driver
= {
596 .probe
= davinci_probe
,
597 .remove
= davinci_remove
,
599 .name
= "musb-davinci",
603 MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
604 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
605 MODULE_LICENSE("GPL v2");
606 module_platform_driver(davinci_driver
);