arch/arm/boot/dts/armada-388-gp.dts

   1 /*
   2  * Device Tree file for Marvell Armada 385 development board
   3  * (RD-88F6820-GP)
   4  *
   5  * Copyright (C) 2014 Marvell
   6  *
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  *
   9  * This file is dual-licensed: you can use it either under the terms
  10  * of the GPL or the X11 license, at your option. Note that this dual
  11  * licensing only applies to this file, and not this project as a
  12  * whole.
  13  *
  14  *  a) This file is licensed under the terms of the GNU General Public
  15  *     License version 2.  This program is licensed "as is" without
  16  *     any warranty of any kind, whether express or implied.
  17  *
  18  * Or, alternatively,
  19  *
  20  *  b) Permission is hereby granted, free of charge, to any person
  21  *     obtaining a copy of this software and associated documentation
  22  *     files (the "Software"), to deal in the Software without
  23  *     restriction, including without limitation the rights to use,
  24  *     copy, modify, merge, publish, distribute, sublicense, and/or
  25  *     sell copies of the Software, and to permit persons to whom the
  26  *     Software is furnished to do so, subject to the following
  27  *     conditions:
  28  *
  29  *     The above copyright notice and this permission notice shall be
  30  *     included in all copies or substantial portions of the Software.
  31  *
  32  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39  *     OTHER DEALINGS IN THE SOFTWARE.
  40  */
  41
  42 /dts-v1/;
  43 #include "armada-388.dtsi"
  44 #include <dt-bindings/gpio/gpio.h>
  45
  46 / {
  47         model = "Marvell Armada 385 GP";
  48         compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
  49
  50         chosen {
  51                 bootargs = "console=ttyS0,115200";
  52                 stdout-path = &uart0;
  53         };
  54
  55         memory {
  56                 device_type = "memory";
  57                 reg = <0x00000000 0x80000000>; /* 2 GB */
  58         };
  59
  60         soc {
  61                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  62                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
  63
  64                 internal-regs {
  65                         spi@10600 {
  66                                 pinctrl-names = "default";
  67                                 pinctrl-0 = <&spi0_pins>;
  68                                 status = "okay";
  69
  70                                 spi-flash@0 {
  71                                         #address-cells = <1>;
  72                                         #size-cells = <1>;
  73                                         compatible = "st,m25p128";
  74                                         reg = <0>; /* Chip select 0 */
  75                                         spi-max-frequency = <50000000>;
  76                                         m25p,fast-read;
  77                                 };
  78                         };
  79
  80                         i2c@11000 {
  81                                 pinctrl-names = "default";
  82                                 pinctrl-0 = <&i2c0_pins>;
  83                                 status = "okay";
  84                                 clock-frequency = <100000>;
  85                                 /*
  86                                  * The EEPROM located at adresse 54 is needed
  87                                  * for the boot - DO NOT ERASE IT -
  88                                  */
  89
  90                                 expander0: pca9555@20 {
  91                                         compatible = "nxp,pca9555";
  92                                         pinctrl-names = "default";
  93                                         pinctrl-0 = <&pca0_pins>;
  94                                         interrupt-parent = <&gpio0>;
  95                                         interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
  96                                         gpio-controller;
  97                                         #gpio-cells = <2>;
  98                                         interrupt-controller;
  99                                         #interrupt-cells = <2>;
 100                                         reg = <0x20>;
 101                                 };
 102
 103                                 expander1: pca9555@21 {
 104                                         compatible = "nxp,pca9555";
 105                                         pinctrl-names = "default";
 106                                         interrupt-parent = <&gpio0>;
 107                                         interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
 108                                         gpio-controller;
 109                                         #gpio-cells = <2>;
 110                                         interrupt-controller;
 111                                         #interrupt-cells = <2>;
 112                                         reg = <0x21>;
 113                                 };
 114
 115                         };
 116
 117                         serial@12000 {
 118                                 /*
 119                                  * Exported on the micro USB connector CON16
 120                                  * through an FTDI
 121                                  */
 122
 123                                 pinctrl-names = "default";
 124                                 pinctrl-0 = <&uart0_pins>;
 125                                 status = "okay";
 126                         };
 127
 128                         /* GE1 CON15 */
 129                         ethernet@30000 {
 130                                 pinctrl-names = "default";
 131                                 pinctrl-0 = <&ge1_rgmii_pins>;
 132                                 status = "okay";
 133                                 phy = <&phy1>;
 134                                 phy-mode = "rgmii-id";
 135                         };
 136
 137                         /* CON4 */
 138                         usb@58000 {
 139                                 vcc-supply = <&reg_usb2_0_vbus>;
 140                                 status = "okay";
 141                         };
 142
 143                         /* GE0 CON1 */
 144                         ethernet@70000 {
 145                                 pinctrl-names = "default";
 146                                 /*
 147                                  * The Reference Clock 0 is used to provide a
 148                                  * clock to the PHY
 149                                  */
 150                                 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
 151                                 status = "okay";
 152                                 phy = <&phy0>;
 153                                 phy-mode = "rgmii-id";
 154                         };
 155
 156
 157                         mdio@72004 {
 158                                 pinctrl-names = "default";
 159                                 pinctrl-0 = <&mdio_pins>;
 160
 161                                 phy0: ethernet-phy@1 {
 162                                         reg = <1>;
 163                                 };
 164
 165                                 phy1: ethernet-phy@0 {
 166                                         reg = <0>;
 167                                 };
 168                         };
 169
 170                         sata@a8000 {
 171                                 pinctrl-names = "default";
 172                                 pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
 173                                 status = "okay";
 174                                 #address-cells = <1>;
 175                                 #size-cells = <0>;
 176
 177                                 sata0: sata-port@0 {
 178                                         reg = <0>;
 179                                         target-supply = <&reg_5v_sata0>;
 180                                 };
 181
 182                                 sata1: sata-port@1 {
 183                                         reg = <1>;
 184                                         target-supply = <&reg_5v_sata1>;
 185                                 };
 186                         };
 187
 188                         sata@e0000 {
 189                                 pinctrl-names = "default";
 190                                 pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
 191                                 status = "okay";
 192                                 #address-cells = <1>;
 193                                 #size-cells = <0>;
 194
 195                                 sata2: sata-port@0 {
 196                                         reg = <0>;
 197                                         target-supply = <&reg_5v_sata2>;
 198                                 };
 199
 200                                 sata3: sata-port@1 {
 201                                         reg = <1>;
 202                                         target-supply = <&reg_5v_sata3>;
 203                                 };
 204                         };
 205
 206                         sdhci@d8000 {
 207                                 pinctrl-names = "default";
 208                                 pinctrl-0 = <&sdhci_pins>;
 209                                 cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
 210                                 no-1-8-v;
 211                                 wp-inverted;
 212                                 bus-width = <8>;
 213                                 status = "okay";
 214                         };
 215
 216                         /* CON5 */
 217                         usb3@f0000 {
 218                                 vcc-supply = <&reg_usb2_1_vbus>;
 219                                 status = "okay";
 220                         };
 221
 222                         /* CON7 */
 223                         usb3@f8000 {
 224                                 vcc-supply = <&reg_usb3_vbus>;
 225                                 status = "okay";
 226                         };
 227                 };
 228
 229                 pcie-controller {
 230                         status = "okay";
 231                         /*
 232                          * One PCIe units is accessible through
 233                          * standard PCIe slot on the board.
 234                          */
 235                         pcie@1,0 {
 236                                 /* Port 0, Lane 0 */
 237                                 status = "okay";
 238                         };
 239
 240                         /*
 241                          * The two other PCIe units are accessible
 242                          * through mini PCIe slot on the board.
 243                          */
 244                         pcie@2,0 {
 245                                 /* Port 1, Lane 0 */
 246                                 status = "okay";
 247                         };
 248                         pcie@3,0 {
 249                                 /* Port 2, Lane 0 */
 250                                 status = "okay";
 251                         };
 252                 };
 253
 254                 gpio-fan {
 255                         compatible = "gpio-fan";
 256                         gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
 257                         gpio-fan,speed-map = <   0 0
 258                                               3000 1>;
 259                 };
 260         };
 261
 262         reg_usb3_vbus: usb3-vbus {
 263                 compatible = "regulator-fixed";
 264                 regulator-name = "usb3-vbus";
 265                 regulator-min-microvolt = <5000000>;
 266                 regulator-max-microvolt = <5000000>;
 267                 enable-active-high;
 268                 regulator-always-on;
 269                 gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
 270         };
 271
 272         reg_usb2_0_vbus: v5-vbus0 {
 273                 compatible = "regulator-fixed";
 274                 regulator-name = "v5.0-vbus0";
 275                 regulator-min-microvolt = <5000000>;
 276                 regulator-max-microvolt = <5000000>;
 277                 enable-active-high;
 278                 regulator-always-on;
 279                 gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
 280         };
 281
 282         reg_usb2_1_vbus: v5-vbus1 {
 283                 compatible = "regulator-fixed";
 284                 regulator-name = "v5.0-vbus1";
 285                 regulator-min-microvolt = <5000000>;
 286                 regulator-max-microvolt = <5000000>;
 287                 enable-active-high;
 288                 regulator-always-on;
 289                 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
 290         };
 291
 292         reg_usb2_1_vbus: v5-vbus1 {
 293                 compatible = "regulator-fixed";
 294                 regulator-name = "v5.0-vbus1";
 295                 regulator-min-microvolt = <5000000>;
 296                 regulator-max-microvolt = <5000000>;
 297                 enable-active-high;
 298                 regulator-always-on;
 299                 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
 300         };
 301
 302         reg_sata0: pwr-sata0 {
 303                 compatible = "regulator-fixed";
 304                 regulator-name = "pwr_en_sata0";
 305                 enable-active-high;
 306                 regulator-always-on;
 307
 308         };
 309
 310         reg_5v_sata0: v5-sata0 {
 311                 compatible = "regulator-fixed";
 312                 regulator-name = "v5.0-sata0";
 313                 regulator-min-microvolt = <5000000>;
 314                 regulator-max-microvolt = <5000000>;
 315                 regulator-always-on;
 316                 vin-supply = <&reg_sata0>;
 317         };
 318
 319         reg_12v_sata0: v12-sata0 {
 320                 compatible = "regulator-fixed";
 321                 regulator-name = "v12.0-sata0";
 322                 regulator-min-microvolt = <12000000>;
 323                 regulator-max-microvolt = <12000000>;
 324                 regulator-always-on;
 325                 vin-supply = <&reg_sata0>;
 326         };
 327
 328         reg_sata1: pwr-sata1 {
 329                 regulator-name = "pwr_en_sata1";
 330                 compatible = "regulator-fixed";
 331                 regulator-min-microvolt = <12000000>;
 332                 regulator-max-microvolt = <12000000>;
 333                 enable-active-high;
 334                 regulator-always-on;
 335                 gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
 336         };
 337
 338         reg_5v_sata1: v5-sata1 {
 339                 compatible = "regulator-fixed";
 340                 regulator-name = "v5.0-sata1";
 341                 regulator-min-microvolt = <5000000>;
 342                 regulator-max-microvolt = <5000000>;
 343                 regulator-always-on;
 344                 vin-supply = <&reg_sata1>;
 345         };
 346
 347         reg_12v_sata1: v12-sata1 {
 348                 compatible = "regulator-fixed";
 349                 regulator-name = "v12.0-sata1";
 350                 regulator-min-microvolt = <12000000>;
 351                 regulator-max-microvolt = <12000000>;
 352                 regulator-always-on;
 353                 vin-supply = <&reg_sata1>;
 354         };
 355
 356         reg_sata2: pwr-sata2 {
 357                 compatible = "regulator-fixed";
 358                 regulator-name = "pwr_en_sata2";
 359                 enable-active-high;
 360                 regulator-always-on;
 361                 gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
 362         };
 363
 364         reg_5v_sata2: v5-sata2 {
 365                 compatible = "regulator-fixed";
 366                 regulator-name = "v5.0-sata2";
 367                 regulator-min-microvolt = <5000000>;
 368                 regulator-max-microvolt = <5000000>;
 369                 regulator-always-on;
 370                 vin-supply = <&reg_sata2>;
 371         };
 372
 373         reg_12v_sata2: v12-sata2 {
 374                 compatible = "regulator-fixed";
 375                 regulator-name = "v12.0-sata2";
 376                 regulator-min-microvolt = <12000000>;
 377                 regulator-max-microvolt = <12000000>;
 378                 regulator-always-on;
 379                 vin-supply = <&reg_sata2>;
 380         };
 381
 382         reg_sata3: pwr-sata3 {
 383                 compatible = "regulator-fixed";
 384                 regulator-name = "pwr_en_sata3";
 385                 enable-active-high;
 386                 regulator-always-on;
 387                 gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
 388         };
 389
 390         reg_5v_sata3: v5-sata3 {
 391                 compatible = "regulator-fixed";
 392                 regulator-name = "v5.0-sata3";
 393                 regulator-min-microvolt = <5000000>;
 394                 regulator-max-microvolt = <5000000>;
 395                 regulator-always-on;
 396                 vin-supply = <&reg_sata3>;
 397         };
 398
 399         reg_12v_sata3: v12-sata3 {
 400                 compatible = "regulator-fixed";
 401                 regulator-name = "v12.0-sata3";
 402                 regulator-min-microvolt = <12000000>;
 403                 regulator-max-microvolt = <12000000>;
 404                 regulator-always-on;
 405                 vin-supply = <&reg_sata3>;
 406         };
 407 };
 408
 409 &pinctrl {
 410         pca0_pins: pca0_pins {
 411                 marvell,pins = "mpp18";
 412                 marvell,function = "gpio";
 413         };
 414 };