2 * Mailbox reservation modules for OMAP2/3
4 * Copyright (C) 2006-2009 Nokia Corporation
5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
17 #include <linux/platform_device.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/platform_data/mailbox-omap.h>
22 #include "omap-mbox.h"
24 #define MAILBOX_REVISION 0x000
25 #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
26 #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
27 #define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
28 #define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
29 #define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
31 #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u))
32 #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u))
33 #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u))
35 #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m)))
36 #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1))
38 #define MBOX_REG_SIZE 0x120
40 #define OMAP4_MBOX_REG_SIZE 0x130
42 #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
43 #define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32))
45 static void __iomem
*mbox_base
;
47 struct omap_mbox2_fifo
{
49 unsigned long fifo_stat
;
50 unsigned long msg_stat
;
53 struct omap_mbox2_priv
{
54 struct omap_mbox2_fifo tx_fifo
;
55 struct omap_mbox2_fifo rx_fifo
;
56 unsigned long irqenable
;
57 unsigned long irqstatus
;
60 u32 ctx
[OMAP4_MBOX_NR_REGS
];
61 unsigned long irqdisable
;
65 static inline unsigned int mbox_read_reg(size_t ofs
)
67 return __raw_readl(mbox_base
+ ofs
);
70 static inline void mbox_write_reg(u32 val
, size_t ofs
)
72 __raw_writel(val
, mbox_base
+ ofs
);
75 /* Mailbox H/W preparations */
76 static int omap2_mbox_startup(struct omap_mbox
*mbox
)
80 pm_runtime_enable(mbox
->dev
->parent
);
81 pm_runtime_get_sync(mbox
->dev
->parent
);
83 l
= mbox_read_reg(MAILBOX_REVISION
);
84 pr_debug("omap mailbox rev %d.%d\n", (l
& 0xf0) >> 4, (l
& 0x0f));
89 static void omap2_mbox_shutdown(struct omap_mbox
*mbox
)
91 pm_runtime_put_sync(mbox
->dev
->parent
);
92 pm_runtime_disable(mbox
->dev
->parent
);
95 /* Mailbox FIFO handle functions */
96 static mbox_msg_t
omap2_mbox_fifo_read(struct omap_mbox
*mbox
)
98 struct omap_mbox2_fifo
*fifo
=
99 &((struct omap_mbox2_priv
*)mbox
->priv
)->rx_fifo
;
100 return (mbox_msg_t
) mbox_read_reg(fifo
->msg
);
103 static void omap2_mbox_fifo_write(struct omap_mbox
*mbox
, mbox_msg_t msg
)
105 struct omap_mbox2_fifo
*fifo
=
106 &((struct omap_mbox2_priv
*)mbox
->priv
)->tx_fifo
;
107 mbox_write_reg(msg
, fifo
->msg
);
110 static int omap2_mbox_fifo_empty(struct omap_mbox
*mbox
)
112 struct omap_mbox2_fifo
*fifo
=
113 &((struct omap_mbox2_priv
*)mbox
->priv
)->rx_fifo
;
114 return (mbox_read_reg(fifo
->msg_stat
) == 0);
117 static int omap2_mbox_fifo_full(struct omap_mbox
*mbox
)
119 struct omap_mbox2_fifo
*fifo
=
120 &((struct omap_mbox2_priv
*)mbox
->priv
)->tx_fifo
;
121 return mbox_read_reg(fifo
->fifo_stat
);
124 /* Mailbox IRQ handle functions */
125 static void omap2_mbox_enable_irq(struct omap_mbox
*mbox
, omap_mbox_irq_t irq
)
127 struct omap_mbox2_priv
*p
= mbox
->priv
;
128 u32 l
, bit
= (irq
== IRQ_TX
) ? p
->notfull_bit
: p
->newmsg_bit
;
130 l
= mbox_read_reg(p
->irqenable
);
132 mbox_write_reg(l
, p
->irqenable
);
135 static void omap2_mbox_disable_irq(struct omap_mbox
*mbox
, omap_mbox_irq_t irq
)
137 struct omap_mbox2_priv
*p
= mbox
->priv
;
138 u32 bit
= (irq
== IRQ_TX
) ? p
->notfull_bit
: p
->newmsg_bit
;
141 * Read and update the interrupt configuration register for pre-OMAP4.
142 * OMAP4 and later SoCs have a dedicated interrupt disabling register.
145 bit
= mbox_read_reg(p
->irqdisable
) & ~bit
;
147 mbox_write_reg(bit
, p
->irqdisable
);
150 static void omap2_mbox_ack_irq(struct omap_mbox
*mbox
, omap_mbox_irq_t irq
)
152 struct omap_mbox2_priv
*p
= mbox
->priv
;
153 u32 bit
= (irq
== IRQ_TX
) ? p
->notfull_bit
: p
->newmsg_bit
;
155 mbox_write_reg(bit
, p
->irqstatus
);
157 /* Flush posted write for irq status to avoid spurious interrupts */
158 mbox_read_reg(p
->irqstatus
);
161 static int omap2_mbox_is_irq(struct omap_mbox
*mbox
, omap_mbox_irq_t irq
)
163 struct omap_mbox2_priv
*p
= mbox
->priv
;
164 u32 bit
= (irq
== IRQ_TX
) ? p
->notfull_bit
: p
->newmsg_bit
;
165 u32 enable
= mbox_read_reg(p
->irqenable
);
166 u32 status
= mbox_read_reg(p
->irqstatus
);
168 return (int)(enable
& status
& bit
);
171 static void omap2_mbox_save_ctx(struct omap_mbox
*mbox
)
174 struct omap_mbox2_priv
*p
= mbox
->priv
;
178 nr_regs
= OMAP4_MBOX_NR_REGS
;
180 nr_regs
= MBOX_NR_REGS
;
181 for (i
= 0; i
< nr_regs
; i
++) {
182 p
->ctx
[i
] = mbox_read_reg(i
* sizeof(u32
));
184 dev_dbg(mbox
->dev
, "%s: [%02x] %08x\n", __func__
,
189 static void omap2_mbox_restore_ctx(struct omap_mbox
*mbox
)
192 struct omap_mbox2_priv
*p
= mbox
->priv
;
196 nr_regs
= OMAP4_MBOX_NR_REGS
;
198 nr_regs
= MBOX_NR_REGS
;
199 for (i
= 0; i
< nr_regs
; i
++) {
200 mbox_write_reg(p
->ctx
[i
], i
* sizeof(u32
));
202 dev_dbg(mbox
->dev
, "%s: [%02x] %08x\n", __func__
,
207 static struct omap_mbox_ops omap2_mbox_ops
= {
208 .type
= OMAP_MBOX_TYPE2
,
209 .startup
= omap2_mbox_startup
,
210 .shutdown
= omap2_mbox_shutdown
,
211 .fifo_read
= omap2_mbox_fifo_read
,
212 .fifo_write
= omap2_mbox_fifo_write
,
213 .fifo_empty
= omap2_mbox_fifo_empty
,
214 .fifo_full
= omap2_mbox_fifo_full
,
215 .enable_irq
= omap2_mbox_enable_irq
,
216 .disable_irq
= omap2_mbox_disable_irq
,
217 .ack_irq
= omap2_mbox_ack_irq
,
218 .is_irq
= omap2_mbox_is_irq
,
219 .save_ctx
= omap2_mbox_save_ctx
,
220 .restore_ctx
= omap2_mbox_restore_ctx
,
223 static int omap2_mbox_probe(struct platform_device
*pdev
)
225 struct resource
*mem
;
227 struct omap_mbox
**list
, *mbox
, *mboxblk
;
228 struct omap_mbox2_priv
*priv
, *privblk
;
229 struct omap_mbox_pdata
*pdata
= pdev
->dev
.platform_data
;
230 struct omap_mbox_dev_info
*info
;
233 if (!pdata
|| !pdata
->info_cnt
|| !pdata
->info
) {
234 pr_err("%s: platform not supported\n", __func__
);
238 /* allocate one extra for marking end of list */
239 list
= kzalloc((pdata
->info_cnt
+ 1) * sizeof(*list
), GFP_KERNEL
);
243 mboxblk
= mbox
= kzalloc(pdata
->info_cnt
* sizeof(*mbox
), GFP_KERNEL
);
249 privblk
= priv
= kzalloc(pdata
->info_cnt
* sizeof(*priv
), GFP_KERNEL
);
256 for (i
= 0; i
< pdata
->info_cnt
; i
++, info
++, priv
++) {
257 priv
->tx_fifo
.msg
= MAILBOX_MESSAGE(info
->tx_id
);
258 priv
->tx_fifo
.fifo_stat
= MAILBOX_FIFOSTATUS(info
->tx_id
);
259 priv
->rx_fifo
.msg
= MAILBOX_MESSAGE(info
->rx_id
);
260 priv
->rx_fifo
.msg_stat
= MAILBOX_MSGSTATUS(info
->rx_id
);
261 priv
->notfull_bit
= MAILBOX_IRQ_NOTFULL(info
->tx_id
);
262 priv
->newmsg_bit
= MAILBOX_IRQ_NEWMSG(info
->rx_id
);
263 if (pdata
->intr_type
) {
264 priv
->irqenable
= OMAP4_MAILBOX_IRQENABLE(info
->usr_id
);
265 priv
->irqstatus
= OMAP4_MAILBOX_IRQSTATUS(info
->usr_id
);
267 OMAP4_MAILBOX_IRQENABLE_CLR(info
->usr_id
);
269 priv
->irqenable
= MAILBOX_IRQENABLE(info
->usr_id
);
270 priv
->irqstatus
= MAILBOX_IRQSTATUS(info
->usr_id
);
271 priv
->irqdisable
= MAILBOX_IRQENABLE(info
->usr_id
);
273 priv
->intr_type
= pdata
->intr_type
;
276 mbox
->name
= info
->name
;
277 mbox
->ops
= &omap2_mbox_ops
;
278 mbox
->irq
= platform_get_irq(pdev
, info
->irq_id
);
286 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
292 mbox_base
= ioremap(mem
->start
, resource_size(mem
));
298 ret
= omap_mbox_register(&pdev
->dev
, list
);
301 platform_set_drvdata(pdev
, list
);
316 static int omap2_mbox_remove(struct platform_device
*pdev
)
318 struct omap_mbox2_priv
*privblk
;
319 struct omap_mbox
**list
= platform_get_drvdata(pdev
);
320 struct omap_mbox
*mboxblk
= list
[0];
322 privblk
= mboxblk
->priv
;
323 omap_mbox_unregister();
332 static struct platform_driver omap2_mbox_driver
= {
333 .probe
= omap2_mbox_probe
,
334 .remove
= omap2_mbox_remove
,
336 .name
= "omap-mailbox",
340 static int __init
omap2_mbox_init(void)
342 return platform_driver_register(&omap2_mbox_driver
);
345 static void __exit
omap2_mbox_exit(void)
347 platform_driver_unregister(&omap2_mbox_driver
);
350 module_init(omap2_mbox_init
);
351 module_exit(omap2_mbox_exit
);
353 MODULE_LICENSE("GPL v2");
354 MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions");
355 MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
356 MODULE_AUTHOR("Paul Mundt");
357 MODULE_ALIAS("platform:omap2-mailbox");