sched: Remove double_rq_lock() from __migrate_task()
[linux/fpc-iii.git] / drivers / media / dvb-frontends / mb86a16_priv.h
blob360a35acfe842255250dffe3ddb90607033b3fa6
1 /*
2 Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #ifndef __MB86A16_PRIV_H
22 #define __MB86A16_PRIV_H
24 #define MB86A16_TSOUT 0x00
25 #define MB86A16_TSOUT_HIZSEL (0x01 << 5)
26 #define MB86A16_TSOUT_HIZCNTI (0x01 << 4)
27 #define MB86A16_TSOUT_MODE (0x01 << 3)
28 #define MB86A16_TSOUT_ORDER (0x01 << 2)
29 #define MB86A16_TSOUT_ERROR (0x01 << 1)
30 #define Mb86A16_TSOUT_EDGE (0x01 << 0)
32 #define MB86A16_FEC 0x01
33 #define MB86A16_FEC_FSYNC (0x01 << 5)
34 #define MB86A16_FEC_PCKB8 (0x01 << 4)
35 #define MB86A16_FEC_DVDS (0x01 << 3)
36 #define MB86A16_FEC_EREN (0x01 << 2)
37 #define Mb86A16_FEC_RSEN (0x01 << 1)
38 #define MB86A16_FEC_DIEN (0x01 << 0)
40 #define MB86A16_AGC 0x02
41 #define MB86A16_AGC_AGMD (0x01 << 6)
42 #define MB86A16_AGC_AGCW (0x0f << 2)
43 #define MB86A16_AGC_AGCP (0x01 << 1)
44 #define MB86A16_AGC_AGCR (0x01 << 0)
46 #define MB86A16_SRATE1 0x03
47 #define MB86A16_SRATE1_DECI (0x07 << 2)
48 #define MB86A16_SRATE1_CSEL (0x01 << 1)
49 #define MB86A16_SRATE1_RSEL (0x01 << 0)
51 #define MB86A16_SRATE2 0x04
52 #define MB86A16_SRATE2_STOFSL (0xff << 0)
54 #define MB86A16_SRATE3 0x05
55 #define MB86A16_SRATE2_STOFSH (0xff << 0)
57 #define MB86A16_VITERBI 0x06
58 #define MB86A16_FRAMESYNC 0x07
59 #define MB86A16_CRLFILTCOEF1 0x08
60 #define MB86A16_CRLFILTCOEF2 0x09
61 #define MB86A16_STRFILTCOEF1 0x0a
62 #define MB86A16_STRFILTCOEF2 0x0b
63 #define MB86A16_RESET 0x0c
64 #define MB86A16_STATUS 0x0d
65 #define MB86A16_AFCML 0x0e
66 #define MB86A16_AFCMH 0x0f
67 #define MB86A16_BERMON 0x10
68 #define MB86A16_BERTAB 0x11
69 #define MB86A16_BERLSB 0x12
70 #define MB86A16_BERMID 0x13
71 #define MB86A16_BERMSB 0x14
72 #define MB86A16_AGCM 0x15
74 #define MB86A16_DCC1 0x16
75 #define MB86A16_DCC1_DISTA (0x01 << 7)
76 #define MB86A16_DCC1_PRTY (0x01 << 6)
77 #define MB86A16_DCC1_CTOE (0x01 << 5)
78 #define MB86A16_DCC1_TBEN (0x01 << 4)
79 #define MB86A16_DCC1_TBO (0x01 << 3)
80 #define MB86A16_DCC1_NUM (0x07 << 0)
82 #define MB86A16_DCC2 0x17
83 #define MB86A16_DCC2_DCBST (0x01 << 0)
85 #define MB86A16_DCC3 0x18
86 #define MB86A16_DCC3_CODE0 (0xff << 0)
88 #define MB86A16_DCC4 0x19
89 #define MB86A16_DCC4_CODE1 (0xff << 0)
91 #define MB86A16_DCC5 0x1a
92 #define MB86A16_DCC5_CODE2 (0xff << 0)
94 #define MB86A16_DCC6 0x1b
95 #define MB86A16_DCC6_CODE3 (0xff << 0)
97 #define MB86A16_DCC7 0x1c
98 #define MB86A16_DCC7_CODE4 (0xff << 0)
100 #define MB86A16_DCC8 0x1d
101 #define MB86A16_DCC8_CODE5 (0xff << 0)
103 #define MB86A16_DCCOUT 0x1e
104 #define MB86A16_DCCOUT_DISEN (0x01 << 0)
106 #define MB86A16_TONEOUT1 0x1f
107 #define MB86A16_TONE_TDIVL (0xff << 0)
109 #define MB86A16_TONEOUT2 0x20
110 #define MB86A16_TONE_TMD (0x03 << 2)
111 #define MB86A16_TONE_TDIVH (0x03 << 0)
113 #define MB86A16_FREQ1 0x21
114 #define MB86A16_FREQ2 0x22
115 #define MB86A16_FREQ3 0x23
116 #define MB86A16_FREQ4 0x24
117 #define MB86A16_FREQSET 0x25
118 #define MB86A16_CNM 0x26
119 #define MB86A16_PORT0 0x27
120 #define MB86A16_PORT1 0x28
121 #define MB86A16_DRCFILT 0x29
122 #define MB86A16_AFC 0x2a
123 #define MB86A16_AFCEXL 0x2b
124 #define MB86A16_AFCEXH 0x2c
125 #define MB86A16_DAGC 0x2d
126 #define MB86A16_SEQMODE 0x32
127 #define MB86A16_S0S1T 0x33
128 #define MB86A16_S2S3T 0x34
129 #define MB86A16_S4S5T 0x35
130 #define MB86A16_CNTMR 0x36
131 #define MB86A16_SIG1 0x37
132 #define MB86A16_SIG2 0x38
133 #define MB86A16_VIMAG 0x39
134 #define MB86A16_VISET1 0x3a
135 #define MB86A16_VISET2 0x3b
136 #define MB86A16_VISET3 0x3c
137 #define MB86A16_FAGCS1 0x3d
138 #define MB86A16_FAGCS2 0x3e
139 #define MB86A16_FAGCS3 0x3f
140 #define MB86A16_FAGCS4 0x40
141 #define MB86A16_FAGCS5 0x41
142 #define MB86A16_FAGCS6 0x42
143 #define MB86A16_CRM 0x43
144 #define MB86A16_STRM 0x44
145 #define MB86A16_DAGCML 0x45
146 #define MB86A16_DAGCMH 0x46
147 #define MB86A16_QPSKTST 0x49
148 #define MB86A16_DISTMON 0x52
149 #define MB86A16_VERSION 0x7f
151 #endif /* __MB86A16_PRIV_H */