2 * Realtek RTL2832 DVB-T demodulator driver
4 * Copyright (C) 2012 Thomas Mair <thomas.mair86@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #ifndef RTL2832_PRIV_H
22 #define RTL2832_PRIV_H
24 #include "dvb_frontend.h"
26 #include <linux/i2c-mux.h>
29 struct i2c_adapter
*i2c
;
30 struct i2c_adapter
*i2c_adapter
;
31 struct i2c_adapter
*i2c_adapter_tuner
;
32 struct dvb_frontend fe
;
33 struct rtl2832_config cfg
;
39 u8 page
; /* active register page */
40 struct delayed_work i2c_gate_work
;
43 struct rtl2832_reg_entry
{
50 struct rtl2832_reg_value
{
56 /* Demod register bit names */
57 enum DVBT_REG_BIT_NAME
{
61 DVBT_RSD_BER_FAIL_VAL
,
122 DVBT_CFREQ_OFF_RATIO
,
157 DVBT_AGC_TARG_VAL_8_1
,
188 DVBT_MPEG_IO_OPT_2_2
,
189 DVBT_MPEG_IO_OPT_1_0
,
246 DVBT_REG_BIT_NAME_ITEM_TERMINATOR
,
249 static const struct rtl2832_reg_value rtl2832_tuner_init_tua9001
[] = {
250 {DVBT_DAGC_TRG_VAL
, 0x39},
251 {DVBT_AGC_TARG_VAL_0
, 0x0},
252 {DVBT_AGC_TARG_VAL_8_1
, 0x5a},
253 {DVBT_AAGC_LOOP_GAIN
, 0x16},
254 {DVBT_LOOP_GAIN2_3_0
, 0x6},
255 {DVBT_LOOP_GAIN2_4
, 0x1},
256 {DVBT_LOOP_GAIN3
, 0x16},
264 {DVBT_IF_AGC_MIN
, 0x80},
265 {DVBT_IF_AGC_MAX
, 0x7f},
266 {DVBT_RF_AGC_MIN
, 0x9c},
267 {DVBT_RF_AGC_MAX
, 0x7f},
268 {DVBT_POLAR_RF_AGC
, 0x0},
269 {DVBT_POLAR_IF_AGC
, 0x0},
270 {DVBT_AD7_SETTING
, 0xe9f4},
271 {DVBT_OPT_ADC_IQ
, 0x1},
274 {DVBT_SPEC_INV
, 0x0},
277 static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012
[] = {
278 {DVBT_DAGC_TRG_VAL
, 0x5a},
279 {DVBT_AGC_TARG_VAL_0
, 0x0},
280 {DVBT_AGC_TARG_VAL_8_1
, 0x5a},
281 {DVBT_AAGC_LOOP_GAIN
, 0x16},
282 {DVBT_LOOP_GAIN2_3_0
, 0x6},
283 {DVBT_LOOP_GAIN2_4
, 0x1},
284 {DVBT_LOOP_GAIN3
, 0x16},
292 {DVBT_IF_AGC_MIN
, 0x80},
293 {DVBT_IF_AGC_MAX
, 0x7f},
294 {DVBT_RF_AGC_MIN
, 0x80},
295 {DVBT_RF_AGC_MAX
, 0x7f},
296 {DVBT_POLAR_RF_AGC
, 0x0},
297 {DVBT_POLAR_IF_AGC
, 0x0},
298 {DVBT_AD7_SETTING
, 0xe9bf},
299 {DVBT_EN_GI_PGA
, 0x0},
300 {DVBT_THD_LOCK_UP
, 0x0},
301 {DVBT_THD_LOCK_DW
, 0x0},
302 {DVBT_THD_UP1
, 0x11},
303 {DVBT_THD_DW1
, 0xef},
304 {DVBT_INTER_CNT_LEN
, 0xc},
305 {DVBT_GI_PGA_STATE
, 0x0},
306 {DVBT_EN_AGC_PGA
, 0x1},
307 {DVBT_IF_AGC_MAN
, 0x0},
308 {DVBT_SPEC_INV
, 0x0},
311 static const struct rtl2832_reg_value rtl2832_tuner_init_e4000
[] = {
312 {DVBT_DAGC_TRG_VAL
, 0x5a},
313 {DVBT_AGC_TARG_VAL_0
, 0x0},
314 {DVBT_AGC_TARG_VAL_8_1
, 0x5a},
315 {DVBT_AAGC_LOOP_GAIN
, 0x18},
316 {DVBT_LOOP_GAIN2_3_0
, 0x8},
317 {DVBT_LOOP_GAIN2_4
, 0x1},
318 {DVBT_LOOP_GAIN3
, 0x18},
326 {DVBT_IF_AGC_MIN
, 0x80},
327 {DVBT_IF_AGC_MAX
, 0x7f},
328 {DVBT_RF_AGC_MIN
, 0x80},
329 {DVBT_RF_AGC_MAX
, 0x7f},
330 {DVBT_POLAR_RF_AGC
, 0x0},
331 {DVBT_POLAR_IF_AGC
, 0x0},
332 {DVBT_AD7_SETTING
, 0xe9d4},
333 {DVBT_EN_GI_PGA
, 0x0},
334 {DVBT_THD_LOCK_UP
, 0x0},
335 {DVBT_THD_LOCK_DW
, 0x0},
336 {DVBT_THD_UP1
, 0x14},
337 {DVBT_THD_DW1
, 0xec},
338 {DVBT_INTER_CNT_LEN
, 0xc},
339 {DVBT_GI_PGA_STATE
, 0x0},
340 {DVBT_EN_AGC_PGA
, 0x1},
343 {DVBT_REG_MONSEL
, 0x1},
345 {DVBT_REG_4MSEL
, 0x0},
346 {DVBT_SPEC_INV
, 0x0},
349 static const struct rtl2832_reg_value rtl2832_tuner_init_r820t
[] = {
350 {DVBT_DAGC_TRG_VAL
, 0x39},
351 {DVBT_AGC_TARG_VAL_0
, 0x0},
352 {DVBT_AGC_TARG_VAL_8_1
, 0x40},
353 {DVBT_AAGC_LOOP_GAIN
, 0x16},
354 {DVBT_LOOP_GAIN2_3_0
, 0x8},
355 {DVBT_LOOP_GAIN2_4
, 0x1},
356 {DVBT_LOOP_GAIN3
, 0x18},
364 {DVBT_IF_AGC_MIN
, 0x80},
365 {DVBT_IF_AGC_MAX
, 0x7f},
366 {DVBT_RF_AGC_MIN
, 0x80},
367 {DVBT_RF_AGC_MAX
, 0x7f},
368 {DVBT_POLAR_RF_AGC
, 0x0},
369 {DVBT_POLAR_IF_AGC
, 0x0},
370 {DVBT_AD7_SETTING
, 0xe9f4},
371 {DVBT_SPEC_INV
, 0x1},
374 #endif /* RTL2832_PRIV_H */