drivers/reset/reset-a10sr.c

   1 /*
   2  *  Copyright Intel Corporation (C) 2017. All Rights Reserved
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * Reset driver for Altera Arria10 MAX5 System Resource Chip
  17  *
  18  * Adapted from reset-socfpga.c
  19  */
  20
  21 #include <linux/err.h>
  22 #include <linux/mfd/altera-a10sr.h>
  23 #include <linux/module.h>
  24 #include <linux/of.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/reset-controller.h>
  27
  28 #include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
  29
  30 struct a10sr_reset {
  31         struct reset_controller_dev     rcdev;
  32         struct regmap *regmap;
  33 };
  34
  35 static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
  36 {
  37         return container_of(rc, struct a10sr_reset, rcdev);
  38 }
  39
  40 static inline int a10sr_reset_shift(unsigned long id)
  41 {
  42         switch (id) {
  43         case A10SR_RESET_ENET_HPS:
  44                 return 1;
  45         case A10SR_RESET_PCIE:
  46         case A10SR_RESET_FILE:
  47         case A10SR_RESET_BQSPI:
  48         case A10SR_RESET_USB:
  49                 return id + 11;
  50         default:
  51                 return -EINVAL;
  52         }
  53 }
  54
  55 static int a10sr_reset_update(struct reset_controller_dev *rcdev,
  56                               unsigned long id, bool assert)
  57 {
  58         struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
  59         int offset = a10sr_reset_shift(id);
  60         u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
  61         int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
  62
  63         return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
  64 }
  65
  66 static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
  67                               unsigned long id)
  68 {
  69         return a10sr_reset_update(rcdev, id, true);
  70 }
  71
  72 static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
  73                                 unsigned long id)
  74 {
  75         return a10sr_reset_update(rcdev, id, false);
  76 }
  77
  78 static int a10sr_reset_status(struct reset_controller_dev *rcdev,
  79                               unsigned long id)
  80 {
  81         int ret;
  82         struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
  83         int offset = a10sr_reset_shift(id);
  84         u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
  85         int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
  86         unsigned int value;
  87
  88         ret = regmap_read(a10r->regmap, index, &value);
  89         if (ret < 0)
  90                 return ret;
  91
  92         return !!(value & mask);
  93 }
  94
  95 static const struct reset_control_ops a10sr_reset_ops = {
  96         .assert         = a10sr_reset_assert,
  97         .deassert       = a10sr_reset_deassert,
  98         .status         = a10sr_reset_status,
  99 };
 100
 101 static int a10sr_reset_probe(struct platform_device *pdev)
 102 {
 103         struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
 104         struct a10sr_reset *a10r;
 105
 106         a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
 107                             GFP_KERNEL);
 108         if (!a10r)
 109                 return -ENOMEM;
 110
 111         a10r->rcdev.owner = THIS_MODULE;
 112         a10r->rcdev.nr_resets = A10SR_RESET_NUM;
 113         a10r->rcdev.ops = &a10sr_reset_ops;
 114         a10r->rcdev.of_node = pdev->dev.of_node;
 115         a10r->regmap = a10sr->regmap;
 116
 117         platform_set_drvdata(pdev, a10r);
 118
 119         return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
 120 }
 121
 122 static const struct of_device_id a10sr_reset_of_match[] = {
 123         { .compatible = "altr,a10sr-reset" },
 124         { },
 125 };
 126 MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
 127
 128 static struct platform_driver a10sr_reset_driver = {
 129         .probe  = a10sr_reset_probe,
 130         .driver = {
 131                 .name           = "altr_a10sr_reset",
 132         },
 133 };
 134 module_platform_driver(a10sr_reset_driver);
 135
 136 MODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>");
 137 MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
 138 MODULE_LICENSE("GPL v2");