drivers/iio/dac/ad5686.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * This file is part of AD5686 DAC driver
   4  *
   5  * Copyright 2018 Analog Devices Inc.
   6  */
   7
   8 #ifndef __DRIVERS_IIO_DAC_AD5686_H__
   9 #define __DRIVERS_IIO_DAC_AD5686_H__
  10
  11 #include <linux/types.h>
  12 #include <linux/cache.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kernel.h>
  15
  16 #define AD5683_DATA(x)                          ((x) << 4)
  17 #define AD5686_ADDR(x)                          ((x) << 16)
  18 #define AD5686_CMD(x)                           ((x) << 20)
  19
  20 #define AD5686_ADDR_DAC(chan)                   (0x1 << (chan))
  21 #define AD5686_ADDR_ALL_DAC                     0xF
  22
  23 #define AD5686_CMD_NOOP                         0x0
  24 #define AD5686_CMD_WRITE_INPUT_N                0x1
  25 #define AD5686_CMD_UPDATE_DAC_N                 0x2
  26 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N       0x3
  27 #define AD5686_CMD_POWERDOWN_DAC                0x4
  28 #define AD5686_CMD_LDAC_MASK                    0x5
  29 #define AD5686_CMD_RESET                        0x6
  30 #define AD5686_CMD_INTERNAL_REFER_SETUP         0x7
  31 #define AD5686_CMD_DAISY_CHAIN_ENABLE           0x8
  32 #define AD5686_CMD_READBACK_ENABLE              0x9
  33
  34 #define AD5686_LDAC_PWRDN_NONE                  0x0
  35 #define AD5686_LDAC_PWRDN_1K                    0x1
  36 #define AD5686_LDAC_PWRDN_100K                  0x2
  37 #define AD5686_LDAC_PWRDN_3STATE                0x3
  38
  39 #define AD5686_CMD_CONTROL_REG                  0x4
  40 #define AD5686_CMD_READBACK_ENABLE_V2           0x5
  41 #define AD5683_REF_BIT_MSK                      BIT(12)
  42 #define AD5693_REF_BIT_MSK                      BIT(12)
  43
  44 /**
  45  * ad5686_supported_device_ids:
  46  */
  47 enum ad5686_supported_device_ids {
  48         ID_AD5311R,
  49         ID_AD5671R,
  50         ID_AD5672R,
  51         ID_AD5675R,
  52         ID_AD5676,
  53         ID_AD5676R,
  54         ID_AD5681R,
  55         ID_AD5682R,
  56         ID_AD5683,
  57         ID_AD5683R,
  58         ID_AD5684,
  59         ID_AD5684R,
  60         ID_AD5685R,
  61         ID_AD5686,
  62         ID_AD5686R,
  63         ID_AD5691R,
  64         ID_AD5692R,
  65         ID_AD5693,
  66         ID_AD5693R,
  67         ID_AD5694,
  68         ID_AD5694R,
  69         ID_AD5695R,
  70         ID_AD5696,
  71         ID_AD5696R,
  72 };
  73
  74 enum ad5686_regmap_type {
  75         AD5683_REGMAP,
  76         AD5686_REGMAP,
  77         AD5693_REGMAP
  78 };
  79
  80 struct ad5686_state;
  81
  82 typedef int (*ad5686_write_func)(struct ad5686_state *st,
  83                                  u8 cmd, u8 addr, u16 val);
  84
  85 typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
  86
  87 /**
  88  * struct ad5686_chip_info - chip specific information
  89  * @int_vref_mv:        AD5620/40/60: the internal reference voltage
  90  * @num_channels:       number of channels
  91  * @channel:            channel specification
  92  * @regmap_type:        register map layout variant
  93  */
  94
  95 struct ad5686_chip_info {
  96         u16                             int_vref_mv;
  97         unsigned int                    num_channels;
  98         struct iio_chan_spec            *channels;
  99         enum ad5686_regmap_type         regmap_type;
 100 };
 101
 102 /**
 103  * struct ad5446_state - driver instance specific data
 104  * @spi:                spi_device
 105  * @chip_info:          chip model specific constants, available modes etc
 106  * @reg:                supply regulator
 107  * @vref_mv:            actual reference voltage used
 108  * @pwr_down_mask:      power down mask
 109  * @pwr_down_mode:      current power down mode
 110  * @use_internal_vref:  set to true if the internal reference voltage is used
 111  * @data:               spi transfer buffers
 112  */
 113
 114 struct ad5686_state {
 115         struct device                   *dev;
 116         const struct ad5686_chip_info   *chip_info;
 117         struct regulator                *reg;
 118         unsigned short                  vref_mv;
 119         unsigned int                    pwr_down_mask;
 120         unsigned int                    pwr_down_mode;
 121         ad5686_write_func               write;
 122         ad5686_read_func                read;
 123         bool                            use_internal_vref;
 124
 125         /*
 126          * DMA (thus cache coherency maintenance) requires the
 127          * transfer buffers to live in their own cache lines.
 128          */
 129
 130         union {
 131                 __be32 d32;
 132                 __be16 d16;
 133                 u8 d8[4];
 134         } data[3] ____cacheline_aligned;
 135 };
 136
 137
 138 int ad5686_probe(struct device *dev,
 139                  enum ad5686_supported_device_ids chip_type,
 140                  const char *name, ad5686_write_func write,
 141                  ad5686_read_func read);
 142
 143 int ad5686_remove(struct device *dev);
 144
 145
 146 #endif /* __DRIVERS_IIO_DAC_AD5686_H__ */