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perf python: Do not force closing original perf descriptor in evlist.get_pollfd()
[linux/fpc-iii.git] / drivers / usb / gadget / udc / atmel_usba_udc.c
blob11247322d587584bb71fb66d14837fb4a929d381
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Driver for the Atmel USBA high speed USB device controller
4 *
5 * Copyright (C) 2005-2007 Atmel Corporation
6 */
7 #include <linux/clk.h>
8 #include <linux/clk/at91_pmc.h>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/slab.h>
14 #include <linux/device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/list.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/platform_device.h>
19 #include <linux/regmap.h>
20 #include <linux/ctype.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <linux/delay.h>
24 #include <linux/of.h>
25 #include <linux/irq.h>
26 #include <linux/gpio/consumer.h>
27
28 #include "atmel_usba_udc.h"
29 #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
30 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
31
32 #ifdef CONFIG_USB_GADGET_DEBUG_FS
33 #include <linux/debugfs.h>
34 #include <linux/uaccess.h>
35
36 static int queue_dbg_open(struct inode *inode, struct file *file)
37 {
38 struct usba_ep *ep = inode->i_private;
39 struct usba_request *req, *req_copy;
40 struct list_head *queue_data;
41
42 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
43 if (!queue_data)
44 return -ENOMEM;
45 INIT_LIST_HEAD(queue_data);
46
47 spin_lock_irq(&ep->udc->lock);
48 list_for_each_entry(req, &ep->queue, queue) {
49 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
50 if (!req_copy)
51 goto fail;
52 list_add_tail(&req_copy->queue, queue_data);
53 }
54 spin_unlock_irq(&ep->udc->lock);
55
56 file->private_data = queue_data;
57 return 0;
58
59 fail:
60 spin_unlock_irq(&ep->udc->lock);
61 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
62 list_del(&req->queue);
63 kfree(req);
64 }
65 kfree(queue_data);
66 return -ENOMEM;
67 }
68
69 /*
70 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
71 *
72 * b: buffer address
73 * l: buffer length
74 * I/i: interrupt/no interrupt
75 * Z/z: zero/no zero
76 * S/s: short ok/short not ok
77 * s: status
78 * n: nr_packets
79 * F/f: submitted/not submitted to FIFO
80 * D/d: using/not using DMA
81 * L/l: last transaction/not last transaction
82 */
83 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
84 size_t nbytes, loff_t *ppos)
85 {
86 struct list_head *queue = file->private_data;
87 struct usba_request *req, *tmp_req;
88 size_t len, remaining, actual = 0;
89 char tmpbuf[38];
90
91 if (!access_ok(VERIFY_WRITE, buf, nbytes))
92 return -EFAULT;
93
94 inode_lock(file_inode(file));
95 list_for_each_entry_safe(req, tmp_req, queue, queue) {
96 len = snprintf(tmpbuf, sizeof(tmpbuf),
97 "%8p %08x %c%c%c %5d %c%c%c\n",
98 req->req.buf, req->req.length,
99 req->req.no_interrupt ? 'i' : 'I',
100 req->req.zero ? 'Z' : 'z',
101 req->req.short_not_ok ? 's' : 'S',
102 req->req.status,
103 req->submitted ? 'F' : 'f',
104 req->using_dma ? 'D' : 'd',
105 req->last_transaction ? 'L' : 'l');
106 len = min(len, sizeof(tmpbuf));
107 if (len > nbytes)
108 break;
109
110 list_del(&req->queue);
111 kfree(req);
112
113 remaining = __copy_to_user(buf, tmpbuf, len);
114 actual += len - remaining;
115 if (remaining)
116 break;
117
118 nbytes -= len;
119 buf += len;
120 }
121 inode_unlock(file_inode(file));
122
123 return actual;
124 }
125
126 static int queue_dbg_release(struct inode *inode, struct file *file)
127 {
128 struct list_head *queue_data = file->private_data;
129 struct usba_request *req, *tmp_req;
130
131 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
132 list_del(&req->queue);
133 kfree(req);
134 }
135 kfree(queue_data);
136 return 0;
137 }
138
139 static int regs_dbg_open(struct inode *inode, struct file *file)
140 {
141 struct usba_udc *udc;
142 unsigned int i;
143 u32 *data;
144 int ret = -ENOMEM;
145
146 inode_lock(inode);
147 udc = inode->i_private;
148 data = kmalloc(inode->i_size, GFP_KERNEL);
149 if (!data)
150 goto out;
151
152 spin_lock_irq(&udc->lock);
153 for (i = 0; i < inode->i_size / 4; i++)
154 data[i] = readl_relaxed(udc->regs + i * 4);
155 spin_unlock_irq(&udc->lock);
156
157 file->private_data = data;
158 ret = 0;
159
160 out:
161 inode_unlock(inode);
162
163 return ret;
164 }
165
166 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
167 size_t nbytes, loff_t *ppos)
168 {
169 struct inode *inode = file_inode(file);
170 int ret;
171
172 inode_lock(inode);
173 ret = simple_read_from_buffer(buf, nbytes, ppos,
174 file->private_data,
175 file_inode(file)->i_size);
176 inode_unlock(inode);
177
178 return ret;
179 }
180
181 static int regs_dbg_release(struct inode *inode, struct file *file)
182 {
183 kfree(file->private_data);
184 return 0;
185 }
186
187 const struct file_operations queue_dbg_fops = {
188 .owner = THIS_MODULE,
189 .open = queue_dbg_open,
190 .llseek = no_llseek,
191 .read = queue_dbg_read,
192 .release = queue_dbg_release,
193 };
194
195 const struct file_operations regs_dbg_fops = {
196 .owner = THIS_MODULE,
197 .open = regs_dbg_open,
198 .llseek = generic_file_llseek,
199 .read = regs_dbg_read,
200 .release = regs_dbg_release,
201 };
202
203 static void usba_ep_init_debugfs(struct usba_udc *udc,
204 struct usba_ep *ep)
205 {
206 struct dentry *ep_root;
207
208 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
209 ep->debugfs_dir = ep_root;
210
211 debugfs_create_file("queue", 0400, ep_root, ep, &queue_dbg_fops);
212 if (ep->can_dma)
213 debugfs_create_u32("dma_status", 0400, ep_root,
214 &ep->last_dma_status);
215 if (ep_is_control(ep))
216 debugfs_create_u32("state", 0400, ep_root, &ep->state);
217 }
218
219 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
220 {
221 debugfs_remove_recursive(ep->debugfs_dir);
222 }
223
224 static void usba_init_debugfs(struct usba_udc *udc)
225 {
226 struct dentry *root;
227 struct resource *regs_resource;
228
229 root = debugfs_create_dir(udc->gadget.name, NULL);
230 udc->debugfs_root = root;
231
232 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
233 CTRL_IOMEM_ID);
234
235 if (regs_resource) {
236 debugfs_create_file_size("regs", 0400, root, udc,
237 &regs_dbg_fops,
238 resource_size(regs_resource));
239 }
240
241 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
242 }
243
244 static void usba_cleanup_debugfs(struct usba_udc *udc)
245 {
246 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
247 debugfs_remove_recursive(udc->debugfs_root);
248 }
249 #else
250 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
251 struct usba_ep *ep)
252 {
253
254 }
255
256 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
257 {
258
259 }
260
261 static inline void usba_init_debugfs(struct usba_udc *udc)
262 {
263
264 }
265
266 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
267 {
268
269 }
270 #endif
271
272 static ushort fifo_mode;
273
274 module_param(fifo_mode, ushort, 0x0);
275 MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
276
277 /* mode 0 - uses autoconfig */
278
279 /* mode 1 - fits in 8KB, generic max fifo configuration */
280 static struct usba_fifo_cfg mode_1_cfg[] = {
281 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
282 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
283 { .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 1, },
284 { .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 1, },
285 { .hw_ep_num = 4, .fifo_size = 1024, .nr_banks = 1, },
286 { .hw_ep_num = 5, .fifo_size = 1024, .nr_banks = 1, },
287 { .hw_ep_num = 6, .fifo_size = 1024, .nr_banks = 1, },
288 };
289
290 /* mode 2 - fits in 8KB, performance max fifo configuration */
291 static struct usba_fifo_cfg mode_2_cfg[] = {
292 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
293 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 3, },
294 { .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 2, },
295 { .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 2, },
296 };
297
298 /* mode 3 - fits in 8KB, mixed fifo configuration */
299 static struct usba_fifo_cfg mode_3_cfg[] = {
300 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
301 { .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
302 { .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
303 { .hw_ep_num = 3, .fifo_size = 512, .nr_banks = 2, },
304 { .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
305 { .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
306 { .hw_ep_num = 6, .fifo_size = 512, .nr_banks = 2, },
307 };
308
309 /* mode 4 - fits in 8KB, custom fifo configuration */
310 static struct usba_fifo_cfg mode_4_cfg[] = {
311 { .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
312 { .hw_ep_num = 1, .fifo_size = 512, .nr_banks = 2, },
313 { .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
314 { .hw_ep_num = 3, .fifo_size = 8, .nr_banks = 2, },
315 { .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
316 { .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
317 { .hw_ep_num = 6, .fifo_size = 16, .nr_banks = 2, },
318 { .hw_ep_num = 7, .fifo_size = 8, .nr_banks = 2, },
319 { .hw_ep_num = 8, .fifo_size = 8, .nr_banks = 2, },
320 };
321 /* Add additional configurations here */
322
323 static int usba_config_fifo_table(struct usba_udc *udc)
324 {
325 int n;
326
327 switch (fifo_mode) {
328 default:
329 fifo_mode = 0;
330 case 0:
331 udc->fifo_cfg = NULL;
332 n = 0;
333 break;
334 case 1:
335 udc->fifo_cfg = mode_1_cfg;
336 n = ARRAY_SIZE(mode_1_cfg);
337 break;
338 case 2:
339 udc->fifo_cfg = mode_2_cfg;
340 n = ARRAY_SIZE(mode_2_cfg);
341 break;
342 case 3:
343 udc->fifo_cfg = mode_3_cfg;
344 n = ARRAY_SIZE(mode_3_cfg);
345 break;
346 case 4:
347 udc->fifo_cfg = mode_4_cfg;
348 n = ARRAY_SIZE(mode_4_cfg);
349 break;
350 }
351 DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
352
353 return n;
354 }
355
356 static inline u32 usba_int_enb_get(struct usba_udc *udc)
357 {
358 return udc->int_enb_cache;
359 }
360
361 static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
362 {
363 usba_writel(udc, INT_ENB, val);
364 udc->int_enb_cache = val;
365 }
366
367 static int vbus_is_present(struct usba_udc *udc)
368 {
369 if (udc->vbus_pin)
370 return gpiod_get_value(udc->vbus_pin);
371
372 /* No Vbus detection: Assume always present */
373 return 1;
374 }
375
376 static void toggle_bias(struct usba_udc *udc, int is_on)
377 {
378 if (udc->errata && udc->errata->toggle_bias)
379 udc->errata->toggle_bias(udc, is_on);
380 }
381
382 static void generate_bias_pulse(struct usba_udc *udc)
383 {
384 if (!udc->bias_pulse_needed)
385 return;
386
387 if (udc->errata && udc->errata->pulse_bias)
388 udc->errata->pulse_bias(udc);
389
390 udc->bias_pulse_needed = false;
391 }
392
393 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
394 {
395 unsigned int transaction_len;
396
397 transaction_len = req->req.length - req->req.actual;
398 req->last_transaction = 1;
399 if (transaction_len > ep->ep.maxpacket) {
400 transaction_len = ep->ep.maxpacket;
401 req->last_transaction = 0;
402 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
403 req->last_transaction = 0;
404
405 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
406 ep->ep.name, req, transaction_len,
407 req->last_transaction ? ", done" : "");
408
409 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
410 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
411 req->req.actual += transaction_len;
412 }
413
414 static void submit_request(struct usba_ep *ep, struct usba_request *req)
415 {
416 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
417 ep->ep.name, req, req->req.length);
418
419 req->req.actual = 0;
420 req->submitted = 1;
421
422 if (req->using_dma) {
423 if (req->req.length == 0) {
424 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
425 return;
426 }
427
428 if (req->req.zero)
429 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
430 else
431 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
432
433 usba_dma_writel(ep, ADDRESS, req->req.dma);
434 usba_dma_writel(ep, CONTROL, req->ctrl);
435 } else {
436 next_fifo_transaction(ep, req);
437 if (req->last_transaction) {
438 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
439 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
440 } else {
441 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
442 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
443 }
444 }
445 }
446
447 static void submit_next_request(struct usba_ep *ep)
448 {
449 struct usba_request *req;
450
451 if (list_empty(&ep->queue)) {
452 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
453 return;
454 }
455
456 req = list_entry(ep->queue.next, struct usba_request, queue);
457 if (!req->submitted)
458 submit_request(ep, req);
459 }
460
461 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
462 {
463 ep->state = STATUS_STAGE_IN;
464 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
465 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
466 }
467
468 static void receive_data(struct usba_ep *ep)
469 {
470 struct usba_udc *udc = ep->udc;
471 struct usba_request *req;
472 unsigned long status;
473 unsigned int bytecount, nr_busy;
474 int is_complete = 0;
475
476 status = usba_ep_readl(ep, STA);
477 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
478
479 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
480
481 while (nr_busy > 0) {
482 if (list_empty(&ep->queue)) {
483 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
484 break;
485 }
486 req = list_entry(ep->queue.next,
487 struct usba_request, queue);
488
489 bytecount = USBA_BFEXT(BYTE_COUNT, status);
490
491 if (status & (1 << 31))
492 is_complete = 1;
493 if (req->req.actual + bytecount >= req->req.length) {
494 is_complete = 1;
495 bytecount = req->req.length - req->req.actual;
496 }
497
498 memcpy_fromio(req->req.buf + req->req.actual,
499 ep->fifo, bytecount);
500 req->req.actual += bytecount;
501
502 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
503
504 if (is_complete) {
505 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
506 req->req.status = 0;
507 list_del_init(&req->queue);
508 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
509 spin_unlock(&udc->lock);
510 usb_gadget_giveback_request(&ep->ep, &req->req);
511 spin_lock(&udc->lock);
512 }
513
514 status = usba_ep_readl(ep, STA);
515 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
516
517 if (is_complete && ep_is_control(ep)) {
518 send_status(udc, ep);
519 break;
520 }
521 }
522 }
523
524 static void
525 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
526 {
527 struct usba_udc *udc = ep->udc;
528
529 WARN_ON(!list_empty(&req->queue));
530
531 if (req->req.status == -EINPROGRESS)
532 req->req.status = status;
533
534 if (req->using_dma)
535 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
536
537 DBG(DBG_GADGET | DBG_REQ,
538 "%s: req %p complete: status %d, actual %u\n",
539 ep->ep.name, req, req->req.status, req->req.actual);
540
541 spin_unlock(&udc->lock);
542 usb_gadget_giveback_request(&ep->ep, &req->req);
543 spin_lock(&udc->lock);
544 }
545
546 static void
547 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
548 {
549 struct usba_request *req, *tmp_req;
550
551 list_for_each_entry_safe(req, tmp_req, list, queue) {
552 list_del_init(&req->queue);
553 request_complete(ep, req, status);
554 }
555 }
556
557 static int
558 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
559 {
560 struct usba_ep *ep = to_usba_ep(_ep);
561 struct usba_udc *udc = ep->udc;
562 unsigned long flags, maxpacket;
563 unsigned int nr_trans;
564
565 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
566
567 maxpacket = usb_endpoint_maxp(desc);
568
569 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
570 || ep->index == 0
571 || desc->bDescriptorType != USB_DT_ENDPOINT
572 || maxpacket == 0
573 || maxpacket > ep->fifo_size) {
574 DBG(DBG_ERR, "ep_enable: Invalid argument");
575 return -EINVAL;
576 }
577
578 ep->is_isoc = 0;
579 ep->is_in = 0;
580
581 DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
582 ep->ep.name, ep->ept_cfg, maxpacket);
583
584 if (usb_endpoint_dir_in(desc)) {
585 ep->is_in = 1;
586 ep->ept_cfg |= USBA_EPT_DIR_IN;
587 }
588
589 switch (usb_endpoint_type(desc)) {
590 case USB_ENDPOINT_XFER_CONTROL:
591 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
592 break;
593 case USB_ENDPOINT_XFER_ISOC:
594 if (!ep->can_isoc) {
595 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
596 ep->ep.name);
597 return -EINVAL;
598 }
599
600 /*
601 * Bits 11:12 specify number of _additional_
602 * transactions per microframe.
603 */
604 nr_trans = usb_endpoint_maxp_mult(desc);
605 if (nr_trans > 3)
606 return -EINVAL;
607
608 ep->is_isoc = 1;
609 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
610 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
611
612 break;
613 case USB_ENDPOINT_XFER_BULK:
614 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
615 break;
616 case USB_ENDPOINT_XFER_INT:
617 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
618 break;
619 }
620
621 spin_lock_irqsave(&ep->udc->lock, flags);
622
623 ep->ep.desc = desc;
624 ep->ep.maxpacket = maxpacket;
625
626 usba_ep_writel(ep, CFG, ep->ept_cfg);
627 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
628
629 if (ep->can_dma) {
630 u32 ctrl;
631
632 usba_int_enb_set(udc, usba_int_enb_get(udc) |
633 USBA_BF(EPT_INT, 1 << ep->index) |
634 USBA_BF(DMA_INT, 1 << ep->index));
635 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
636 usba_ep_writel(ep, CTL_ENB, ctrl);
637 } else {
638 usba_int_enb_set(udc, usba_int_enb_get(udc) |
639 USBA_BF(EPT_INT, 1 << ep->index));
640 }
641
642 spin_unlock_irqrestore(&udc->lock, flags);
643
644 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
645 (unsigned long)usba_ep_readl(ep, CFG));
646 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
647 (unsigned long)usba_int_enb_get(udc));
648
649 return 0;
650 }
651
652 static int usba_ep_disable(struct usb_ep *_ep)
653 {
654 struct usba_ep *ep = to_usba_ep(_ep);
655 struct usba_udc *udc = ep->udc;
656 LIST_HEAD(req_list);
657 unsigned long flags;
658
659 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
660
661 spin_lock_irqsave(&udc->lock, flags);
662
663 if (!ep->ep.desc) {
664 spin_unlock_irqrestore(&udc->lock, flags);
665 /* REVISIT because this driver disables endpoints in
666 * reset_all_endpoints() before calling disconnect(),
667 * most gadget drivers would trigger this non-error ...
668 */
669 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
670 DBG(DBG_ERR, "ep_disable: %s not enabled\n",
671 ep->ep.name);
672 return -EINVAL;
673 }
674 ep->ep.desc = NULL;
675
676 list_splice_init(&ep->queue, &req_list);
677 if (ep->can_dma) {
678 usba_dma_writel(ep, CONTROL, 0);
679 usba_dma_writel(ep, ADDRESS, 0);
680 usba_dma_readl(ep, STATUS);
681 }
682 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
683 usba_int_enb_set(udc, usba_int_enb_get(udc) &
684 ~USBA_BF(EPT_INT, 1 << ep->index));
685
686 request_complete_list(ep, &req_list, -ESHUTDOWN);
687
688 spin_unlock_irqrestore(&udc->lock, flags);
689
690 return 0;
691 }
692
693 static struct usb_request *
694 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
695 {
696 struct usba_request *req;
697
698 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
699
700 req = kzalloc(sizeof(*req), gfp_flags);
701 if (!req)
702 return NULL;
703
704 INIT_LIST_HEAD(&req->queue);
705
706 return &req->req;
707 }
708
709 static void
710 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
711 {
712 struct usba_request *req = to_usba_req(_req);
713
714 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
715
716 kfree(req);
717 }
718
719 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
720 struct usba_request *req, gfp_t gfp_flags)
721 {
722 unsigned long flags;
723 int ret;
724
725 DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
726 ep->ep.name, req->req.length, &req->req.dma,
727 req->req.zero ? 'Z' : 'z',
728 req->req.short_not_ok ? 'S' : 's',
729 req->req.no_interrupt ? 'I' : 'i');
730
731 if (req->req.length > 0x10000) {
732 /* Lengths from 0 to 65536 (inclusive) are supported */
733 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
734 return -EINVAL;
735 }
736
737 ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
738 if (ret)
739 return ret;
740
741 req->using_dma = 1;
742 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
743 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
744 | USBA_DMA_END_BUF_EN;
745
746 if (!ep->is_in)
747 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
748
749 /*
750 * Add this request to the queue and submit for DMA if
751 * possible. Check if we're still alive first -- we may have
752 * received a reset since last time we checked.
753 */
754 ret = -ESHUTDOWN;
755 spin_lock_irqsave(&udc->lock, flags);
756 if (ep->ep.desc) {
757 if (list_empty(&ep->queue))
758 submit_request(ep, req);
759
760 list_add_tail(&req->queue, &ep->queue);
761 ret = 0;
762 }
763 spin_unlock_irqrestore(&udc->lock, flags);
764
765 return ret;
766 }
767
768 static int
769 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
770 {
771 struct usba_request *req = to_usba_req(_req);
772 struct usba_ep *ep = to_usba_ep(_ep);
773 struct usba_udc *udc = ep->udc;
774 unsigned long flags;
775 int ret;
776
777 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
778 ep->ep.name, req, _req->length);
779
780 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
781 !ep->ep.desc)
782 return -ESHUTDOWN;
783
784 req->submitted = 0;
785 req->using_dma = 0;
786 req->last_transaction = 0;
787
788 _req->status = -EINPROGRESS;
789 _req->actual = 0;
790
791 if (ep->can_dma)
792 return queue_dma(udc, ep, req, gfp_flags);
793
794 /* May have received a reset since last time we checked */
795 ret = -ESHUTDOWN;
796 spin_lock_irqsave(&udc->lock, flags);
797 if (ep->ep.desc) {
798 list_add_tail(&req->queue, &ep->queue);
799
800 if ((!ep_is_control(ep) && ep->is_in) ||
801 (ep_is_control(ep)
802 && (ep->state == DATA_STAGE_IN
803 || ep->state == STATUS_STAGE_IN)))
804 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
805 else
806 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
807 ret = 0;
808 }
809 spin_unlock_irqrestore(&udc->lock, flags);
810
811 return ret;
812 }
813
814 static void
815 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
816 {
817 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
818 }
819
820 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
821 {
822 unsigned int timeout;
823 u32 status;
824
825 /*
826 * Stop the DMA controller. When writing both CH_EN
827 * and LINK to 0, the other bits are not affected.
828 */
829 usba_dma_writel(ep, CONTROL, 0);
830
831 /* Wait for the FIFO to empty */
832 for (timeout = 40; timeout; --timeout) {
833 status = usba_dma_readl(ep, STATUS);
834 if (!(status & USBA_DMA_CH_EN))
835 break;
836 udelay(1);
837 }
838
839 if (pstatus)
840 *pstatus = status;
841
842 if (timeout == 0) {
843 dev_err(&ep->udc->pdev->dev,
844 "%s: timed out waiting for DMA FIFO to empty\n",
845 ep->ep.name);
846 return -ETIMEDOUT;
847 }
848
849 return 0;
850 }
851
852 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
853 {
854 struct usba_ep *ep = to_usba_ep(_ep);
855 struct usba_udc *udc = ep->udc;
856 struct usba_request *req;
857 unsigned long flags;
858 u32 status;
859
860 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
861 ep->ep.name, req);
862
863 spin_lock_irqsave(&udc->lock, flags);
864
865 list_for_each_entry(req, &ep->queue, queue) {
866 if (&req->req == _req)
867 break;
868 }
869
870 if (&req->req != _req) {
871 spin_unlock_irqrestore(&udc->lock, flags);
872 return -EINVAL;
873 }
874
875 if (req->using_dma) {
876 /*
877 * If this request is currently being transferred,
878 * stop the DMA controller and reset the FIFO.
879 */
880 if (ep->queue.next == &req->queue) {
881 status = usba_dma_readl(ep, STATUS);
882 if (status & USBA_DMA_CH_EN)
883 stop_dma(ep, &status);
884
885 #ifdef CONFIG_USB_GADGET_DEBUG_FS
886 ep->last_dma_status = status;
887 #endif
888
889 usba_writel(udc, EPT_RST, 1 << ep->index);
890
891 usba_update_req(ep, req, status);
892 }
893 }
894
895 /*
896 * Errors should stop the queue from advancing until the
897 * completion function returns.
898 */
899 list_del_init(&req->queue);
900
901 request_complete(ep, req, -ECONNRESET);
902
903 /* Process the next request if any */
904 submit_next_request(ep);
905 spin_unlock_irqrestore(&udc->lock, flags);
906
907 return 0;
908 }
909
910 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
911 {
912 struct usba_ep *ep = to_usba_ep(_ep);
913 struct usba_udc *udc = ep->udc;
914 unsigned long flags;
915 int ret = 0;
916
917 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
918 value ? "set" : "clear");
919
920 if (!ep->ep.desc) {
921 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
922 ep->ep.name);
923 return -ENODEV;
924 }
925 if (ep->is_isoc) {
926 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
927 ep->ep.name);
928 return -ENOTTY;
929 }
930
931 spin_lock_irqsave(&udc->lock, flags);
932
933 /*
934 * We can't halt IN endpoints while there are still data to be
935 * transferred
936 */
937 if (!list_empty(&ep->queue)
938 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
939 & USBA_BF(BUSY_BANKS, -1L))))) {
940 ret = -EAGAIN;
941 } else {
942 if (value)
943 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
944 else
945 usba_ep_writel(ep, CLR_STA,
946 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
947 usba_ep_readl(ep, STA);
948 }
949
950 spin_unlock_irqrestore(&udc->lock, flags);
951
952 return ret;
953 }
954
955 static int usba_ep_fifo_status(struct usb_ep *_ep)
956 {
957 struct usba_ep *ep = to_usba_ep(_ep);
958
959 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
960 }
961
962 static void usba_ep_fifo_flush(struct usb_ep *_ep)
963 {
964 struct usba_ep *ep = to_usba_ep(_ep);
965 struct usba_udc *udc = ep->udc;
966
967 usba_writel(udc, EPT_RST, 1 << ep->index);
968 }
969
970 static const struct usb_ep_ops usba_ep_ops = {
971 .enable = usba_ep_enable,
972 .disable = usba_ep_disable,
973 .alloc_request = usba_ep_alloc_request,
974 .free_request = usba_ep_free_request,
975 .queue = usba_ep_queue,
976 .dequeue = usba_ep_dequeue,
977 .set_halt = usba_ep_set_halt,
978 .fifo_status = usba_ep_fifo_status,
979 .fifo_flush = usba_ep_fifo_flush,
980 };
981
982 static int usba_udc_get_frame(struct usb_gadget *gadget)
983 {
984 struct usba_udc *udc = to_usba_udc(gadget);
985
986 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
987 }
988
989 static int usba_udc_wakeup(struct usb_gadget *gadget)
990 {
991 struct usba_udc *udc = to_usba_udc(gadget);
992 unsigned long flags;
993 u32 ctrl;
994 int ret = -EINVAL;
995
996 spin_lock_irqsave(&udc->lock, flags);
997 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
998 ctrl = usba_readl(udc, CTRL);
999 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
1000 ret = 0;
1001 }
1002 spin_unlock_irqrestore(&udc->lock, flags);
1003
1004 return ret;
1005 }
1006
1007 static int
1008 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1009 {
1010 struct usba_udc *udc = to_usba_udc(gadget);
1011 unsigned long flags;
1012
1013 gadget->is_selfpowered = (is_selfpowered != 0);
1014 spin_lock_irqsave(&udc->lock, flags);
1015 if (is_selfpowered)
1016 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1017 else
1018 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1019 spin_unlock_irqrestore(&udc->lock, flags);
1020
1021 return 0;
1022 }
1023
1024 static int atmel_usba_start(struct usb_gadget *gadget,
1025 struct usb_gadget_driver *driver);
1026 static int atmel_usba_stop(struct usb_gadget *gadget);
1027
1028 static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
1029 struct usb_endpoint_descriptor *desc,
1030 struct usb_ss_ep_comp_descriptor *ep_comp)
1031 {
1032 struct usb_ep *_ep;
1033 struct usba_ep *ep;
1034
1035 /* Look at endpoints until an unclaimed one looks usable */
1036 list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1037 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1038 goto found_ep;
1039 }
1040 /* Fail */
1041 return NULL;
1042
1043 found_ep:
1044
1045 if (fifo_mode == 0) {
1046 /* Optimize hw fifo size based on ep type and other info */
1047 ep = to_usba_ep(_ep);
1048
1049 switch (usb_endpoint_type(desc)) {
1050 case USB_ENDPOINT_XFER_CONTROL:
1051 break;
1052
1053 case USB_ENDPOINT_XFER_ISOC:
1054 ep->fifo_size = 1024;
1055 ep->nr_banks = 2;
1056 break;
1057
1058 case USB_ENDPOINT_XFER_BULK:
1059 ep->fifo_size = 512;
1060 ep->nr_banks = 1;
1061 break;
1062
1063 case USB_ENDPOINT_XFER_INT:
1064 if (desc->wMaxPacketSize == 0)
1065 ep->fifo_size =
1066 roundup_pow_of_two(_ep->maxpacket_limit);
1067 else
1068 ep->fifo_size =
1069 roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1070 ep->nr_banks = 1;
1071 break;
1072 }
1073
1074 /* It might be a little bit late to set this */
1075 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1076
1077 /* Generate ept_cfg basd on FIFO size and number of banks */
1078 if (ep->fifo_size <= 8)
1079 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1080 else
1081 /* LSB is bit 1, not 0 */
1082 ep->ept_cfg =
1083 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1084
1085 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1086
1087 ep->udc->configured_ep++;
1088 }
1089
1090 return _ep;
1091 }
1092
1093 static const struct usb_gadget_ops usba_udc_ops = {
1094 .get_frame = usba_udc_get_frame,
1095 .wakeup = usba_udc_wakeup,
1096 .set_selfpowered = usba_udc_set_selfpowered,
1097 .udc_start = atmel_usba_start,
1098 .udc_stop = atmel_usba_stop,
1099 .match_ep = atmel_usba_match_ep,
1100 };
1101
1102 static struct usb_endpoint_descriptor usba_ep0_desc = {
1103 .bLength = USB_DT_ENDPOINT_SIZE,
1104 .bDescriptorType = USB_DT_ENDPOINT,
1105 .bEndpointAddress = 0,
1106 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1107 .wMaxPacketSize = cpu_to_le16(64),
1108 /* FIXME: I have no idea what to put here */
1109 .bInterval = 1,
1110 };
1111
1112 static struct usb_gadget usba_gadget_template = {
1113 .ops = &usba_udc_ops,
1114 .max_speed = USB_SPEED_HIGH,
1115 .name = "atmel_usba_udc",
1116 };
1117
1118 /*
1119 * Called with interrupts disabled and udc->lock held.
1120 */
1121 static void reset_all_endpoints(struct usba_udc *udc)
1122 {
1123 struct usba_ep *ep;
1124 struct usba_request *req, *tmp_req;
1125
1126 usba_writel(udc, EPT_RST, ~0UL);
1127
1128 ep = to_usba_ep(udc->gadget.ep0);
1129 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1130 list_del_init(&req->queue);
1131 request_complete(ep, req, -ECONNRESET);
1132 }
1133 }
1134
1135 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1136 {
1137 struct usba_ep *ep;
1138
1139 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1140 return to_usba_ep(udc->gadget.ep0);
1141
1142 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1143 u8 bEndpointAddress;
1144
1145 if (!ep->ep.desc)
1146 continue;
1147 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1148 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1149 continue;
1150 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1151 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1152 return ep;
1153 }
1154
1155 return NULL;
1156 }
1157
1158 /* Called with interrupts disabled and udc->lock held */
1159 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1160 {
1161 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1162 ep->state = WAIT_FOR_SETUP;
1163 }
1164
1165 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1166 {
1167 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1168 return 1;
1169 return 0;
1170 }
1171
1172 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1173 {
1174 u32 regval;
1175
1176 DBG(DBG_BUS, "setting address %u...\n", addr);
1177 regval = usba_readl(udc, CTRL);
1178 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1179 usba_writel(udc, CTRL, regval);
1180 }
1181
1182 static int do_test_mode(struct usba_udc *udc)
1183 {
1184 static const char test_packet_buffer[] = {
1185 /* JKJKJKJK * 9 */
1186 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1187 /* JJKKJJKK * 8 */
1188 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1189 /* JJKKJJKK * 8 */
1190 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1191 /* JJJJJJJKKKKKKK * 8 */
1192 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1193 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1194 /* JJJJJJJK * 8 */
1195 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1196 /* {JKKKKKKK * 10}, JK */
1197 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1198 };
1199 struct usba_ep *ep;
1200 struct device *dev = &udc->pdev->dev;
1201 int test_mode;
1202
1203 test_mode = udc->test_mode;
1204
1205 /* Start from a clean slate */
1206 reset_all_endpoints(udc);
1207
1208 switch (test_mode) {
1209 case 0x0100:
1210 /* Test_J */
1211 usba_writel(udc, TST, USBA_TST_J_MODE);
1212 dev_info(dev, "Entering Test_J mode...\n");
1213 break;
1214 case 0x0200:
1215 /* Test_K */
1216 usba_writel(udc, TST, USBA_TST_K_MODE);
1217 dev_info(dev, "Entering Test_K mode...\n");
1218 break;
1219 case 0x0300:
1220 /*
1221 * Test_SE0_NAK: Force high-speed mode and set up ep0
1222 * for Bulk IN transfers
1223 */
1224 ep = &udc->usba_ep[0];
1225 usba_writel(udc, TST,
1226 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1227 usba_ep_writel(ep, CFG,
1228 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1229 | USBA_EPT_DIR_IN
1230 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1231 | USBA_BF(BK_NUMBER, 1));
1232 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1233 set_protocol_stall(udc, ep);
1234 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1235 } else {
1236 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1237 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1238 }
1239 break;
1240 case 0x0400:
1241 /* Test_Packet */
1242 ep = &udc->usba_ep[0];
1243 usba_ep_writel(ep, CFG,
1244 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1245 | USBA_EPT_DIR_IN
1246 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1247 | USBA_BF(BK_NUMBER, 1));
1248 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1249 set_protocol_stall(udc, ep);
1250 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1251 } else {
1252 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1253 usba_writel(udc, TST, USBA_TST_PKT_MODE);
1254 memcpy_toio(ep->fifo, test_packet_buffer,
1255 sizeof(test_packet_buffer));
1256 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1257 dev_info(dev, "Entering Test_Packet mode...\n");
1258 }
1259 break;
1260 default:
1261 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1262 return -EINVAL;
1263 }
1264
1265 return 0;
1266 }
1267
1268 /* Avoid overly long expressions */
1269 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1270 {
1271 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1272 return true;
1273 return false;
1274 }
1275
1276 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1277 {
1278 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1279 return true;
1280 return false;
1281 }
1282
1283 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1284 {
1285 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1286 return true;
1287 return false;
1288 }
1289
1290 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1291 struct usb_ctrlrequest *crq)
1292 {
1293 int retval = 0;
1294
1295 switch (crq->bRequest) {
1296 case USB_REQ_GET_STATUS: {
1297 u16 status;
1298
1299 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1300 status = cpu_to_le16(udc->devstatus);
1301 } else if (crq->bRequestType
1302 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1303 status = cpu_to_le16(0);
1304 } else if (crq->bRequestType
1305 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1306 struct usba_ep *target;
1307
1308 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1309 if (!target)
1310 goto stall;
1311
1312 status = 0;
1313 if (is_stalled(udc, target))
1314 status |= cpu_to_le16(1);
1315 } else
1316 goto delegate;
1317
1318 /* Write directly to the FIFO. No queueing is done. */
1319 if (crq->wLength != cpu_to_le16(sizeof(status)))
1320 goto stall;
1321 ep->state = DATA_STAGE_IN;
1322 writew_relaxed(status, ep->fifo);
1323 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1324 break;
1325 }
1326
1327 case USB_REQ_CLEAR_FEATURE: {
1328 if (crq->bRequestType == USB_RECIP_DEVICE) {
1329 if (feature_is_dev_remote_wakeup(crq))
1330 udc->devstatus
1331 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1332 else
1333 /* Can't CLEAR_FEATURE TEST_MODE */
1334 goto stall;
1335 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1336 struct usba_ep *target;
1337
1338 if (crq->wLength != cpu_to_le16(0)
1339 || !feature_is_ep_halt(crq))
1340 goto stall;
1341 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1342 if (!target)
1343 goto stall;
1344
1345 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1346 if (target->index != 0)
1347 usba_ep_writel(target, CLR_STA,
1348 USBA_TOGGLE_CLR);
1349 } else {
1350 goto delegate;
1351 }
1352
1353 send_status(udc, ep);
1354 break;
1355 }
1356
1357 case USB_REQ_SET_FEATURE: {
1358 if (crq->bRequestType == USB_RECIP_DEVICE) {
1359 if (feature_is_dev_test_mode(crq)) {
1360 send_status(udc, ep);
1361 ep->state = STATUS_STAGE_TEST;
1362 udc->test_mode = le16_to_cpu(crq->wIndex);
1363 return 0;
1364 } else if (feature_is_dev_remote_wakeup(crq)) {
1365 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1366 } else {
1367 goto stall;
1368 }
1369 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1370 struct usba_ep *target;
1371
1372 if (crq->wLength != cpu_to_le16(0)
1373 || !feature_is_ep_halt(crq))
1374 goto stall;
1375
1376 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1377 if (!target)
1378 goto stall;
1379
1380 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1381 } else
1382 goto delegate;
1383
1384 send_status(udc, ep);
1385 break;
1386 }
1387
1388 case USB_REQ_SET_ADDRESS:
1389 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1390 goto delegate;
1391
1392 set_address(udc, le16_to_cpu(crq->wValue));
1393 send_status(udc, ep);
1394 ep->state = STATUS_STAGE_ADDR;
1395 break;
1396
1397 default:
1398 delegate:
1399 spin_unlock(&udc->lock);
1400 retval = udc->driver->setup(&udc->gadget, crq);
1401 spin_lock(&udc->lock);
1402 }
1403
1404 return retval;
1405
1406 stall:
1407 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1408 "halting endpoint...\n",
1409 ep->ep.name, crq->bRequestType, crq->bRequest,
1410 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1411 le16_to_cpu(crq->wLength));
1412 set_protocol_stall(udc, ep);
1413 return -1;
1414 }
1415
1416 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1417 {
1418 struct usba_request *req;
1419 u32 epstatus;
1420 u32 epctrl;
1421
1422 restart:
1423 epstatus = usba_ep_readl(ep, STA);
1424 epctrl = usba_ep_readl(ep, CTL);
1425
1426 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1427 ep->ep.name, ep->state, epstatus, epctrl);
1428
1429 req = NULL;
1430 if (!list_empty(&ep->queue))
1431 req = list_entry(ep->queue.next,
1432 struct usba_request, queue);
1433
1434 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1435 if (req->submitted)
1436 next_fifo_transaction(ep, req);
1437 else
1438 submit_request(ep, req);
1439
1440 if (req->last_transaction) {
1441 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1442 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1443 }
1444 goto restart;
1445 }
1446 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1447 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1448
1449 switch (ep->state) {
1450 case DATA_STAGE_IN:
1451 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1452 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1453 ep->state = STATUS_STAGE_OUT;
1454 break;
1455 case STATUS_STAGE_ADDR:
1456 /* Activate our new address */
1457 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1458 | USBA_FADDR_EN));
1459 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1460 ep->state = WAIT_FOR_SETUP;
1461 break;
1462 case STATUS_STAGE_IN:
1463 if (req) {
1464 list_del_init(&req->queue);
1465 request_complete(ep, req, 0);
1466 submit_next_request(ep);
1467 }
1468 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1469 ep->state = WAIT_FOR_SETUP;
1470 break;
1471 case STATUS_STAGE_TEST:
1472 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1473 ep->state = WAIT_FOR_SETUP;
1474 if (do_test_mode(udc))
1475 set_protocol_stall(udc, ep);
1476 break;
1477 default:
1478 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1479 "halting endpoint...\n",
1480 ep->ep.name, ep->state);
1481 set_protocol_stall(udc, ep);
1482 break;
1483 }
1484
1485 goto restart;
1486 }
1487 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1488 switch (ep->state) {
1489 case STATUS_STAGE_OUT:
1490 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1491 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1492
1493 if (req) {
1494 list_del_init(&req->queue);
1495 request_complete(ep, req, 0);
1496 }
1497 ep->state = WAIT_FOR_SETUP;
1498 break;
1499
1500 case DATA_STAGE_OUT:
1501 receive_data(ep);
1502 break;
1503
1504 default:
1505 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1506 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1507 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1508 "halting endpoint...\n",
1509 ep->ep.name, ep->state);
1510 set_protocol_stall(udc, ep);
1511 break;
1512 }
1513
1514 goto restart;
1515 }
1516 if (epstatus & USBA_RX_SETUP) {
1517 union {
1518 struct usb_ctrlrequest crq;
1519 unsigned long data[2];
1520 } crq;
1521 unsigned int pkt_len;
1522 int ret;
1523
1524 if (ep->state != WAIT_FOR_SETUP) {
1525 /*
1526 * Didn't expect a SETUP packet at this
1527 * point. Clean up any pending requests (which
1528 * may be successful).
1529 */
1530 int status = -EPROTO;
1531
1532 /*
1533 * RXRDY and TXCOMP are dropped when SETUP
1534 * packets arrive. Just pretend we received
1535 * the status packet.
1536 */
1537 if (ep->state == STATUS_STAGE_OUT
1538 || ep->state == STATUS_STAGE_IN) {
1539 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1540 status = 0;
1541 }
1542
1543 if (req) {
1544 list_del_init(&req->queue);
1545 request_complete(ep, req, status);
1546 }
1547 }
1548
1549 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1550 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1551 if (pkt_len != sizeof(crq)) {
1552 pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1553 pkt_len, sizeof(crq));
1554 set_protocol_stall(udc, ep);
1555 return;
1556 }
1557
1558 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1559 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1560
1561 /* Free up one bank in the FIFO so that we can
1562 * generate or receive a reply right away. */
1563 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1564
1565 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1566 ep->state, crq.crq.bRequestType,
1567 crq.crq.bRequest); */
1568
1569 if (crq.crq.bRequestType & USB_DIR_IN) {
1570 /*
1571 * The USB 2.0 spec states that "if wLength is
1572 * zero, there is no data transfer phase."
1573 * However, testusb #14 seems to actually
1574 * expect a data phase even if wLength = 0...
1575 */
1576 ep->state = DATA_STAGE_IN;
1577 } else {
1578 if (crq.crq.wLength != cpu_to_le16(0))
1579 ep->state = DATA_STAGE_OUT;
1580 else
1581 ep->state = STATUS_STAGE_IN;
1582 }
1583
1584 ret = -1;
1585 if (ep->index == 0)
1586 ret = handle_ep0_setup(udc, ep, &crq.crq);
1587 else {
1588 spin_unlock(&udc->lock);
1589 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1590 spin_lock(&udc->lock);
1591 }
1592
1593 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1594 crq.crq.bRequestType, crq.crq.bRequest,
1595 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1596
1597 if (ret < 0) {
1598 /* Let the host know that we failed */
1599 set_protocol_stall(udc, ep);
1600 }
1601 }
1602 }
1603
1604 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1605 {
1606 struct usba_request *req;
1607 u32 epstatus;
1608 u32 epctrl;
1609
1610 epstatus = usba_ep_readl(ep, STA);
1611 epctrl = usba_ep_readl(ep, CTL);
1612
1613 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1614
1615 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1616 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1617
1618 if (list_empty(&ep->queue)) {
1619 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1620 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1621 return;
1622 }
1623
1624 req = list_entry(ep->queue.next, struct usba_request, queue);
1625
1626 if (req->using_dma) {
1627 /* Send a zero-length packet */
1628 usba_ep_writel(ep, SET_STA,
1629 USBA_TX_PK_RDY);
1630 usba_ep_writel(ep, CTL_DIS,
1631 USBA_TX_PK_RDY);
1632 list_del_init(&req->queue);
1633 submit_next_request(ep);
1634 request_complete(ep, req, 0);
1635 } else {
1636 if (req->submitted)
1637 next_fifo_transaction(ep, req);
1638 else
1639 submit_request(ep, req);
1640
1641 if (req->last_transaction) {
1642 list_del_init(&req->queue);
1643 submit_next_request(ep);
1644 request_complete(ep, req, 0);
1645 }
1646 }
1647
1648 epstatus = usba_ep_readl(ep, STA);
1649 epctrl = usba_ep_readl(ep, CTL);
1650 }
1651 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1652 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1653 receive_data(ep);
1654 }
1655 }
1656
1657 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1658 {
1659 struct usba_request *req;
1660 u32 status, control, pending;
1661
1662 status = usba_dma_readl(ep, STATUS);
1663 control = usba_dma_readl(ep, CONTROL);
1664 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1665 ep->last_dma_status = status;
1666 #endif
1667 pending = status & control;
1668 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1669
1670 if (status & USBA_DMA_CH_EN) {
1671 dev_err(&udc->pdev->dev,
1672 "DMA_CH_EN is set after transfer is finished!\n");
1673 dev_err(&udc->pdev->dev,
1674 "status=%#08x, pending=%#08x, control=%#08x\n",
1675 status, pending, control);
1676
1677 /*
1678 * try to pretend nothing happened. We might have to
1679 * do something here...
1680 */
1681 }
1682
1683 if (list_empty(&ep->queue))
1684 /* Might happen if a reset comes along at the right moment */
1685 return;
1686
1687 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1688 req = list_entry(ep->queue.next, struct usba_request, queue);
1689 usba_update_req(ep, req, status);
1690
1691 list_del_init(&req->queue);
1692 submit_next_request(ep);
1693 request_complete(ep, req, 0);
1694 }
1695 }
1696
1697 static irqreturn_t usba_udc_irq(int irq, void *devid)
1698 {
1699 struct usba_udc *udc = devid;
1700 u32 status, int_enb;
1701 u32 dma_status;
1702 u32 ep_status;
1703
1704 spin_lock(&udc->lock);
1705
1706 int_enb = usba_int_enb_get(udc);
1707 status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1708 DBG(DBG_INT, "irq, status=%#08x\n", status);
1709
1710 if (status & USBA_DET_SUSPEND) {
1711 toggle_bias(udc, 0);
1712 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1713 usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
1714 udc->bias_pulse_needed = true;
1715 DBG(DBG_BUS, "Suspend detected\n");
1716 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1717 && udc->driver && udc->driver->suspend) {
1718 spin_unlock(&udc->lock);
1719 udc->driver->suspend(&udc->gadget);
1720 spin_lock(&udc->lock);
1721 }
1722 }
1723
1724 if (status & USBA_WAKE_UP) {
1725 toggle_bias(udc, 1);
1726 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1727 usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
1728 DBG(DBG_BUS, "Wake Up CPU detected\n");
1729 }
1730
1731 if (status & USBA_END_OF_RESUME) {
1732 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1733 generate_bias_pulse(udc);
1734 DBG(DBG_BUS, "Resume detected\n");
1735 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1736 && udc->driver && udc->driver->resume) {
1737 spin_unlock(&udc->lock);
1738 udc->driver->resume(&udc->gadget);
1739 spin_lock(&udc->lock);
1740 }
1741 }
1742
1743 dma_status = USBA_BFEXT(DMA_INT, status);
1744 if (dma_status) {
1745 int i;
1746
1747 for (i = 1; i <= USBA_NR_DMAS; i++)
1748 if (dma_status & (1 << i))
1749 usba_dma_irq(udc, &udc->usba_ep[i]);
1750 }
1751
1752 ep_status = USBA_BFEXT(EPT_INT, status);
1753 if (ep_status) {
1754 int i;
1755
1756 for (i = 0; i < udc->num_ep; i++)
1757 if (ep_status & (1 << i)) {
1758 if (ep_is_control(&udc->usba_ep[i]))
1759 usba_control_irq(udc, &udc->usba_ep[i]);
1760 else
1761 usba_ep_irq(udc, &udc->usba_ep[i]);
1762 }
1763 }
1764
1765 if (status & USBA_END_OF_RESET) {
1766 struct usba_ep *ep0, *ep;
1767 int i, n;
1768
1769 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1770 generate_bias_pulse(udc);
1771 reset_all_endpoints(udc);
1772
1773 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1774 udc->gadget.speed = USB_SPEED_UNKNOWN;
1775 spin_unlock(&udc->lock);
1776 usb_gadget_udc_reset(&udc->gadget, udc->driver);
1777 spin_lock(&udc->lock);
1778 }
1779
1780 if (status & USBA_HIGH_SPEED)
1781 udc->gadget.speed = USB_SPEED_HIGH;
1782 else
1783 udc->gadget.speed = USB_SPEED_FULL;
1784 DBG(DBG_BUS, "%s bus reset detected\n",
1785 usb_speed_string(udc->gadget.speed));
1786
1787 ep0 = &udc->usba_ep[0];
1788 ep0->ep.desc = &usba_ep0_desc;
1789 ep0->state = WAIT_FOR_SETUP;
1790 usba_ep_writel(ep0, CFG,
1791 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1792 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1793 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1794 usba_ep_writel(ep0, CTL_ENB,
1795 USBA_EPT_ENABLE | USBA_RX_SETUP);
1796 usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
1797 USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1798
1799 /*
1800 * Unclear why we hit this irregularly, e.g. in usbtest,
1801 * but it's clearly harmless...
1802 */
1803 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1804 dev_err(&udc->pdev->dev,
1805 "ODD: EP0 configuration is invalid!\n");
1806
1807 /* Preallocate other endpoints */
1808 n = fifo_mode ? udc->num_ep : udc->configured_ep;
1809 for (i = 1; i < n; i++) {
1810 ep = &udc->usba_ep[i];
1811 usba_ep_writel(ep, CFG, ep->ept_cfg);
1812 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1813 dev_err(&udc->pdev->dev,
1814 "ODD: EP%d configuration is invalid!\n", i);
1815 }
1816 }
1817
1818 spin_unlock(&udc->lock);
1819
1820 return IRQ_HANDLED;
1821 }
1822
1823 static int start_clock(struct usba_udc *udc)
1824 {
1825 int ret;
1826
1827 if (udc->clocked)
1828 return 0;
1829
1830 ret = clk_prepare_enable(udc->pclk);
1831 if (ret)
1832 return ret;
1833 ret = clk_prepare_enable(udc->hclk);
1834 if (ret) {
1835 clk_disable_unprepare(udc->pclk);
1836 return ret;
1837 }
1838
1839 udc->clocked = true;
1840 return 0;
1841 }
1842
1843 static void stop_clock(struct usba_udc *udc)
1844 {
1845 if (!udc->clocked)
1846 return;
1847
1848 clk_disable_unprepare(udc->hclk);
1849 clk_disable_unprepare(udc->pclk);
1850
1851 udc->clocked = false;
1852 }
1853
1854 static int usba_start(struct usba_udc *udc)
1855 {
1856 unsigned long flags;
1857 int ret;
1858
1859 ret = start_clock(udc);
1860 if (ret)
1861 return ret;
1862
1863 spin_lock_irqsave(&udc->lock, flags);
1864 toggle_bias(udc, 1);
1865 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1866 usba_int_enb_set(udc, USBA_END_OF_RESET);
1867 spin_unlock_irqrestore(&udc->lock, flags);
1868
1869 return 0;
1870 }
1871
1872 static void usba_stop(struct usba_udc *udc)
1873 {
1874 unsigned long flags;
1875
1876 spin_lock_irqsave(&udc->lock, flags);
1877 udc->gadget.speed = USB_SPEED_UNKNOWN;
1878 reset_all_endpoints(udc);
1879
1880 /* This will also disable the DP pullup */
1881 toggle_bias(udc, 0);
1882 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1883 spin_unlock_irqrestore(&udc->lock, flags);
1884
1885 stop_clock(udc);
1886 }
1887
1888 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
1889 {
1890 struct usba_udc *udc = devid;
1891 int vbus;
1892
1893 /* debounce */
1894 udelay(10);
1895
1896 mutex_lock(&udc->vbus_mutex);
1897
1898 vbus = vbus_is_present(udc);
1899 if (vbus != udc->vbus_prev) {
1900 if (vbus) {
1901 usba_start(udc);
1902 } else {
1903 usba_stop(udc);
1904
1905 if (udc->driver->disconnect)
1906 udc->driver->disconnect(&udc->gadget);
1907 }
1908 udc->vbus_prev = vbus;
1909 }
1910
1911 mutex_unlock(&udc->vbus_mutex);
1912 return IRQ_HANDLED;
1913 }
1914
1915 static int atmel_usba_start(struct usb_gadget *gadget,
1916 struct usb_gadget_driver *driver)
1917 {
1918 int ret;
1919 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1920 unsigned long flags;
1921
1922 spin_lock_irqsave(&udc->lock, flags);
1923 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1924 udc->driver = driver;
1925 spin_unlock_irqrestore(&udc->lock, flags);
1926
1927 mutex_lock(&udc->vbus_mutex);
1928
1929 if (udc->vbus_pin)
1930 enable_irq(gpiod_to_irq(udc->vbus_pin));
1931
1932 /* If Vbus is present, enable the controller and wait for reset */
1933 udc->vbus_prev = vbus_is_present(udc);
1934 if (udc->vbus_prev) {
1935 ret = usba_start(udc);
1936 if (ret)
1937 goto err;
1938 }
1939
1940 mutex_unlock(&udc->vbus_mutex);
1941 return 0;
1942
1943 err:
1944 if (udc->vbus_pin)
1945 disable_irq(gpiod_to_irq(udc->vbus_pin));
1946
1947 mutex_unlock(&udc->vbus_mutex);
1948
1949 spin_lock_irqsave(&udc->lock, flags);
1950 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1951 udc->driver = NULL;
1952 spin_unlock_irqrestore(&udc->lock, flags);
1953 return ret;
1954 }
1955
1956 static int atmel_usba_stop(struct usb_gadget *gadget)
1957 {
1958 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1959
1960 if (udc->vbus_pin)
1961 disable_irq(gpiod_to_irq(udc->vbus_pin));
1962
1963 if (fifo_mode == 0)
1964 udc->configured_ep = 1;
1965
1966 usba_stop(udc);
1967
1968 udc->driver = NULL;
1969
1970 return 0;
1971 }
1972
1973 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
1974 {
1975 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
1976 is_on ? AT91_PMC_BIASEN : 0);
1977 }
1978
1979 static void at91sam9g45_pulse_bias(struct usba_udc *udc)
1980 {
1981 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
1982 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
1983 AT91_PMC_BIASEN);
1984 }
1985
1986 static const struct usba_udc_errata at91sam9rl_errata = {
1987 .toggle_bias = at91sam9rl_toggle_bias,
1988 };
1989
1990 static const struct usba_udc_errata at91sam9g45_errata = {
1991 .pulse_bias = at91sam9g45_pulse_bias,
1992 };
1993
1994 static const struct of_device_id atmel_udc_dt_ids[] = {
1995 { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
1996 { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
1997 { .compatible = "atmel,sama5d3-udc" },
1998 { /* sentinel */ }
1999 };
2000
2001 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
2002
2003 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2004 struct usba_udc *udc)
2005 {
2006 u32 val;
2007 struct device_node *np = pdev->dev.of_node;
2008 const struct of_device_id *match;
2009 struct device_node *pp;
2010 int i, ret;
2011 struct usba_ep *eps, *ep;
2012
2013 match = of_match_node(atmel_udc_dt_ids, np);
2014 if (!match)
2015 return ERR_PTR(-EINVAL);
2016
2017 udc->errata = match->data;
2018 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
2019 if (IS_ERR(udc->pmc))
2020 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9rl-pmc");
2021 if (IS_ERR(udc->pmc))
2022 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
2023 if (udc->errata && IS_ERR(udc->pmc))
2024 return ERR_CAST(udc->pmc);
2025
2026 udc->num_ep = 0;
2027
2028 udc->vbus_pin = devm_gpiod_get_optional(&pdev->dev, "atmel,vbus",
2029 GPIOD_IN);
2030
2031 if (fifo_mode == 0) {
2032 pp = NULL;
2033 while ((pp = of_get_next_child(np, pp)))
2034 udc->num_ep++;
2035 udc->configured_ep = 1;
2036 } else {
2037 udc->num_ep = usba_config_fifo_table(udc);
2038 }
2039
2040 eps = devm_kcalloc(&pdev->dev, udc->num_ep, sizeof(struct usba_ep),
2041 GFP_KERNEL);
2042 if (!eps)
2043 return ERR_PTR(-ENOMEM);
2044
2045 udc->gadget.ep0 = &eps[0].ep;
2046
2047 INIT_LIST_HEAD(&eps[0].ep.ep_list);
2048
2049 pp = NULL;
2050 i = 0;
2051 while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
2052 ep = &eps[i];
2053
2054 ret = of_property_read_u32(pp, "reg", &val);
2055 if (ret) {
2056 dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
2057 goto err;
2058 }
2059 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
2060
2061 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
2062 if (ret) {
2063 dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
2064 goto err;
2065 }
2066 if (fifo_mode) {
2067 if (val < udc->fifo_cfg[i].fifo_size) {
2068 dev_warn(&pdev->dev,
2069 "Using max fifo-size value from DT\n");
2070 ep->fifo_size = val;
2071 } else {
2072 ep->fifo_size = udc->fifo_cfg[i].fifo_size;
2073 }
2074 } else {
2075 ep->fifo_size = val;
2076 }
2077
2078 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
2079 if (ret) {
2080 dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
2081 goto err;
2082 }
2083 if (fifo_mode) {
2084 if (val < udc->fifo_cfg[i].nr_banks) {
2085 dev_warn(&pdev->dev,
2086 "Using max nb-banks value from DT\n");
2087 ep->nr_banks = val;
2088 } else {
2089 ep->nr_banks = udc->fifo_cfg[i].nr_banks;
2090 }
2091 } else {
2092 ep->nr_banks = val;
2093 }
2094
2095 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
2096 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
2097
2098 sprintf(ep->name, "ep%d", ep->index);
2099 ep->ep.name = ep->name;
2100
2101 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2102 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2103 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2104 ep->ep.ops = &usba_ep_ops;
2105 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2106 ep->udc = udc;
2107 INIT_LIST_HEAD(&ep->queue);
2108
2109 if (ep->index == 0) {
2110 ep->ep.caps.type_control = true;
2111 } else {
2112 ep->ep.caps.type_iso = ep->can_isoc;
2113 ep->ep.caps.type_bulk = true;
2114 ep->ep.caps.type_int = true;
2115 }
2116
2117 ep->ep.caps.dir_in = true;
2118 ep->ep.caps.dir_out = true;
2119
2120 if (fifo_mode != 0) {
2121 /*
2122 * Generate ept_cfg based on FIFO size and
2123 * banks number
2124 */
2125 if (ep->fifo_size <= 8)
2126 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2127 else
2128 /* LSB is bit 1, not 0 */
2129 ep->ept_cfg =
2130 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2131
2132 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2133 }
2134
2135 if (i)
2136 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2137
2138 i++;
2139 }
2140
2141 if (i == 0) {
2142 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2143 ret = -EINVAL;
2144 goto err;
2145 }
2146
2147 return eps;
2148 err:
2149 return ERR_PTR(ret);
2150 }
2151
2152 static int usba_udc_probe(struct platform_device *pdev)
2153 {
2154 struct resource *res;
2155 struct clk *pclk, *hclk;
2156 struct usba_udc *udc;
2157 int irq, ret, i;
2158
2159 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2160 if (!udc)
2161 return -ENOMEM;
2162
2163 udc->gadget = usba_gadget_template;
2164 INIT_LIST_HEAD(&udc->gadget.ep_list);
2165
2166 res = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2167 udc->regs = devm_ioremap_resource(&pdev->dev, res);
2168 if (IS_ERR(udc->regs))
2169 return PTR_ERR(udc->regs);
2170 dev_info(&pdev->dev, "MMIO registers at %pR mapped at %p\n",
2171 res, udc->regs);
2172
2173 res = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2174 udc->fifo = devm_ioremap_resource(&pdev->dev, res);
2175 if (IS_ERR(udc->fifo))
2176 return PTR_ERR(udc->fifo);
2177 dev_info(&pdev->dev, "FIFO at %pR mapped at %p\n", res, udc->fifo);
2178
2179 irq = platform_get_irq(pdev, 0);
2180 if (irq < 0)
2181 return irq;
2182
2183 pclk = devm_clk_get(&pdev->dev, "pclk");
2184 if (IS_ERR(pclk))
2185 return PTR_ERR(pclk);
2186 hclk = devm_clk_get(&pdev->dev, "hclk");
2187 if (IS_ERR(hclk))
2188 return PTR_ERR(hclk);
2189
2190 spin_lock_init(&udc->lock);
2191 mutex_init(&udc->vbus_mutex);
2192 udc->pdev = pdev;
2193 udc->pclk = pclk;
2194 udc->hclk = hclk;
2195
2196 platform_set_drvdata(pdev, udc);
2197
2198 /* Make sure we start from a clean slate */
2199 ret = clk_prepare_enable(pclk);
2200 if (ret) {
2201 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2202 return ret;
2203 }
2204
2205 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2206 clk_disable_unprepare(pclk);
2207
2208 udc->usba_ep = atmel_udc_of_init(pdev, udc);
2209
2210 toggle_bias(udc, 0);
2211
2212 if (IS_ERR(udc->usba_ep))
2213 return PTR_ERR(udc->usba_ep);
2214
2215 ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2216 "atmel_usba_udc", udc);
2217 if (ret) {
2218 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2219 irq, ret);
2220 return ret;
2221 }
2222 udc->irq = irq;
2223
2224 if (udc->vbus_pin) {
2225 irq_set_status_flags(gpiod_to_irq(udc->vbus_pin), IRQ_NOAUTOEN);
2226 ret = devm_request_threaded_irq(&pdev->dev,
2227 gpiod_to_irq(udc->vbus_pin), NULL,
2228 usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS,
2229 "atmel_usba_udc", udc);
2230 if (ret) {
2231 udc->vbus_pin = NULL;
2232 dev_warn(&udc->pdev->dev,
2233 "failed to request vbus irq; "
2234 "assuming always on\n");
2235 }
2236 }
2237
2238 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2239 if (ret)
2240 return ret;
2241 device_init_wakeup(&pdev->dev, 1);
2242
2243 usba_init_debugfs(udc);
2244 for (i = 1; i < udc->num_ep; i++)
2245 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2246
2247 return 0;
2248 }
2249
2250 static int usba_udc_remove(struct platform_device *pdev)
2251 {
2252 struct usba_udc *udc;
2253 int i;
2254
2255 udc = platform_get_drvdata(pdev);
2256
2257 device_init_wakeup(&pdev->dev, 0);
2258 usb_del_gadget_udc(&udc->gadget);
2259
2260 for (i = 1; i < udc->num_ep; i++)
2261 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2262 usba_cleanup_debugfs(udc);
2263
2264 return 0;
2265 }
2266
2267 #ifdef CONFIG_PM_SLEEP
2268 static int usba_udc_suspend(struct device *dev)
2269 {
2270 struct usba_udc *udc = dev_get_drvdata(dev);
2271
2272 /* Not started */
2273 if (!udc->driver)
2274 return 0;
2275
2276 mutex_lock(&udc->vbus_mutex);
2277
2278 if (!device_may_wakeup(dev)) {
2279 usba_stop(udc);
2280 goto out;
2281 }
2282
2283 /*
2284 * Device may wake up. We stay clocked if we failed
2285 * to request vbus irq, assuming always on.
2286 */
2287 if (udc->vbus_pin) {
2288 usba_stop(udc);
2289 enable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2290 }
2291
2292 out:
2293 mutex_unlock(&udc->vbus_mutex);
2294 return 0;
2295 }
2296
2297 static int usba_udc_resume(struct device *dev)
2298 {
2299 struct usba_udc *udc = dev_get_drvdata(dev);
2300
2301 /* Not started */
2302 if (!udc->driver)
2303 return 0;
2304
2305 if (device_may_wakeup(dev) && udc->vbus_pin)
2306 disable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2307
2308 /* If Vbus is present, enable the controller and wait for reset */
2309 mutex_lock(&udc->vbus_mutex);
2310 udc->vbus_prev = vbus_is_present(udc);
2311 if (udc->vbus_prev)
2312 usba_start(udc);
2313 mutex_unlock(&udc->vbus_mutex);
2314
2315 return 0;
2316 }
2317 #endif
2318
2319 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2320
2321 static struct platform_driver udc_driver = {
2322 .remove = usba_udc_remove,
2323 .driver = {
2324 .name = "atmel_usba_udc",
2325 .pm = &usba_udc_pm_ops,
2326 .of_match_table = atmel_udc_dt_ids,
2327 },
2328 };
2329
2330 module_platform_driver_probe(udc_driver, usba_udc_probe);
2331
2332 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2333 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2334 MODULE_LICENSE("GPL");
2335 MODULE_ALIAS("platform:atmel_usba_udc");
Linux with added FPC-III support