2 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/of_graph.h>
18 static const struct reg_sequence adv7533_fixed_registers
[] = {
27 static const struct reg_sequence adv7533_cec_fixed_registers
[] = {
35 static const struct regmap_config adv7533_cec_regmap_config
= {
40 .cache_type
= REGCACHE_RBTREE
,
43 static void adv7511_dsi_config_timing_gen(struct adv7511
*adv
)
45 struct mipi_dsi_device
*dsi
= adv
->dsi
;
46 struct drm_display_mode
*mode
= &adv
->curr_mode
;
47 unsigned int hsw
, hfp
, hbp
, vsw
, vfp
, vbp
;
48 u8 clock_div_by_lanes
[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */
50 hsw
= mode
->hsync_end
- mode
->hsync_start
;
51 hfp
= mode
->hsync_start
- mode
->hdisplay
;
52 hbp
= mode
->htotal
- mode
->hsync_end
;
53 vsw
= mode
->vsync_end
- mode
->vsync_start
;
54 vfp
= mode
->vsync_start
- mode
->vdisplay
;
55 vbp
= mode
->vtotal
- mode
->vsync_end
;
57 /* set pixel clock divider mode */
58 regmap_write(adv
->regmap_cec
, 0x16,
59 clock_div_by_lanes
[dsi
->lanes
- 2] << 3);
61 /* horizontal porch params */
62 regmap_write(adv
->regmap_cec
, 0x28, mode
->htotal
>> 4);
63 regmap_write(adv
->regmap_cec
, 0x29, (mode
->htotal
<< 4) & 0xff);
64 regmap_write(adv
->regmap_cec
, 0x2a, hsw
>> 4);
65 regmap_write(adv
->regmap_cec
, 0x2b, (hsw
<< 4) & 0xff);
66 regmap_write(adv
->regmap_cec
, 0x2c, hfp
>> 4);
67 regmap_write(adv
->regmap_cec
, 0x2d, (hfp
<< 4) & 0xff);
68 regmap_write(adv
->regmap_cec
, 0x2e, hbp
>> 4);
69 regmap_write(adv
->regmap_cec
, 0x2f, (hbp
<< 4) & 0xff);
71 /* vertical porch params */
72 regmap_write(adv
->regmap_cec
, 0x30, mode
->vtotal
>> 4);
73 regmap_write(adv
->regmap_cec
, 0x31, (mode
->vtotal
<< 4) & 0xff);
74 regmap_write(adv
->regmap_cec
, 0x32, vsw
>> 4);
75 regmap_write(adv
->regmap_cec
, 0x33, (vsw
<< 4) & 0xff);
76 regmap_write(adv
->regmap_cec
, 0x34, vfp
>> 4);
77 regmap_write(adv
->regmap_cec
, 0x35, (vfp
<< 4) & 0xff);
78 regmap_write(adv
->regmap_cec
, 0x36, vbp
>> 4);
79 regmap_write(adv
->regmap_cec
, 0x37, (vbp
<< 4) & 0xff);
82 void adv7533_dsi_power_on(struct adv7511
*adv
)
84 struct mipi_dsi_device
*dsi
= adv
->dsi
;
86 if (adv
->use_timing_gen
)
87 adv7511_dsi_config_timing_gen(adv
);
89 /* set number of dsi lanes */
90 regmap_write(adv
->regmap_cec
, 0x1c, dsi
->lanes
<< 4);
92 if (adv
->use_timing_gen
) {
93 /* reset internal timing generator */
94 regmap_write(adv
->regmap_cec
, 0x27, 0xcb);
95 regmap_write(adv
->regmap_cec
, 0x27, 0x8b);
96 regmap_write(adv
->regmap_cec
, 0x27, 0xcb);
98 /* disable internal timing generator */
99 regmap_write(adv
->regmap_cec
, 0x27, 0x0b);
103 regmap_write(adv
->regmap_cec
, 0x03, 0x89);
104 /* disable test mode */
105 regmap_write(adv
->regmap_cec
, 0x55, 0x00);
107 regmap_register_patch(adv
->regmap_cec
, adv7533_cec_fixed_registers
,
108 ARRAY_SIZE(adv7533_cec_fixed_registers
));
111 void adv7533_dsi_power_off(struct adv7511
*adv
)
114 regmap_write(adv
->regmap_cec
, 0x03, 0x0b);
115 /* disable internal timing generator */
116 regmap_write(adv
->regmap_cec
, 0x27, 0x0b);
119 void adv7533_mode_set(struct adv7511
*adv
, struct drm_display_mode
*mode
)
121 struct mipi_dsi_device
*dsi
= adv
->dsi
;
124 if (adv
->num_dsi_lanes
!= 4)
127 if (mode
->clock
> 80000)
132 if (lanes
!= dsi
->lanes
) {
133 mipi_dsi_detach(dsi
);
135 ret
= mipi_dsi_attach(dsi
);
137 dev_err(&dsi
->dev
, "failed to change host lanes\n");
141 int adv7533_patch_registers(struct adv7511
*adv
)
143 return regmap_register_patch(adv
->regmap
,
144 adv7533_fixed_registers
,
145 ARRAY_SIZE(adv7533_fixed_registers
));
148 void adv7533_uninit_cec(struct adv7511
*adv
)
150 i2c_unregister_device(adv
->i2c_cec
);
153 int adv7533_init_cec(struct adv7511
*adv
)
157 adv
->i2c_cec
= i2c_new_dummy(adv
->i2c_main
->adapter
,
158 adv
->i2c_main
->addr
- 1);
162 adv
->regmap_cec
= devm_regmap_init_i2c(adv
->i2c_cec
,
163 &adv7533_cec_regmap_config
);
164 if (IS_ERR(adv
->regmap_cec
)) {
165 ret
= PTR_ERR(adv
->regmap_cec
);
169 ret
= regmap_register_patch(adv
->regmap_cec
,
170 adv7533_cec_fixed_registers
,
171 ARRAY_SIZE(adv7533_cec_fixed_registers
));
177 adv7533_uninit_cec(adv
);
181 int adv7533_attach_dsi(struct adv7511
*adv
)
183 struct device
*dev
= &adv
->i2c_main
->dev
;
184 struct mipi_dsi_host
*host
;
185 struct mipi_dsi_device
*dsi
;
187 const struct mipi_dsi_device_info info
= { .type
= "adv7533",
192 host
= of_find_mipi_dsi_host_by_node(adv
->host_node
);
194 dev_err(dev
, "failed to find dsi host\n");
195 return -EPROBE_DEFER
;
198 dsi
= mipi_dsi_device_register_full(host
, &info
);
200 dev_err(dev
, "failed to create dsi device\n");
207 dsi
->lanes
= adv
->num_dsi_lanes
;
208 dsi
->format
= MIPI_DSI_FMT_RGB888
;
209 dsi
->mode_flags
= MIPI_DSI_MODE_VIDEO
| MIPI_DSI_MODE_VIDEO_SYNC_PULSE
|
210 MIPI_DSI_MODE_EOT_PACKET
| MIPI_DSI_MODE_VIDEO_HSE
;
212 ret
= mipi_dsi_attach(dsi
);
214 dev_err(dev
, "failed to attach dsi to host\n");
221 mipi_dsi_device_unregister(dsi
);
226 void adv7533_detach_dsi(struct adv7511
*adv
)
228 mipi_dsi_detach(adv
->dsi
);
229 mipi_dsi_device_unregister(adv
->dsi
);
232 int adv7533_parse_dt(struct device_node
*np
, struct adv7511
*adv
)
236 of_property_read_u32(np
, "adi,dsi-lanes", &num_lanes
);
238 if (num_lanes
< 1 || num_lanes
> 4)
241 adv
->num_dsi_lanes
= num_lanes
;
243 adv
->host_node
= of_graph_get_remote_node(np
, 0, 0);
247 of_node_put(adv
->host_node
);
249 adv
->use_timing_gen
= !of_property_read_bool(np
,
250 "adi,disable-timing-generator");
252 /* TODO: Check if these need to be parsed by DT or not */
254 adv
->embedded_sync
= false;