2 * Copyright 2009 VMware, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Michel Dänzer
25 #include <drm/radeon_drm.h>
26 #include "radeon_reg.h"
29 #define RADEON_TEST_COPY_BLIT 1
30 #define RADEON_TEST_COPY_DMA 0
33 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
34 static void radeon_do_test_moves(struct radeon_device
*rdev
, int flag
)
36 struct radeon_bo
*vram_obj
= NULL
;
37 struct radeon_bo
**gtt_obj
= NULL
;
38 uint64_t gtt_addr
, vram_addr
;
43 case RADEON_TEST_COPY_DMA
:
44 ring
= radeon_copy_dma_ring_index(rdev
);
46 case RADEON_TEST_COPY_BLIT
:
47 ring
= radeon_copy_blit_ring_index(rdev
);
50 DRM_ERROR("Unknown copy method\n");
57 * (Total GTT - IB pool - writeback page - ring buffers) / test size
59 n
= rdev
->mc
.gtt_size
- rdev
->gart_pin_size
;
62 gtt_obj
= kzalloc(n
* sizeof(*gtt_obj
), GFP_KERNEL
);
64 DRM_ERROR("Failed to allocate %d pointers\n", n
);
69 r
= radeon_bo_create(rdev
, size
, PAGE_SIZE
, true, RADEON_GEM_DOMAIN_VRAM
,
70 0, NULL
, NULL
, &vram_obj
);
72 DRM_ERROR("Failed to create VRAM object\n");
75 r
= radeon_bo_reserve(vram_obj
, false);
78 r
= radeon_bo_pin(vram_obj
, RADEON_GEM_DOMAIN_VRAM
, &vram_addr
);
80 DRM_ERROR("Failed to pin VRAM object\n");
83 for (i
= 0; i
< n
; i
++) {
84 void *gtt_map
, *vram_map
;
85 void **gtt_start
, **gtt_end
;
86 void **vram_start
, **vram_end
;
87 struct radeon_fence
*fence
= NULL
;
89 r
= radeon_bo_create(rdev
, size
, PAGE_SIZE
, true,
90 RADEON_GEM_DOMAIN_GTT
, 0, NULL
, NULL
,
93 DRM_ERROR("Failed to create GTT object %d\n", i
);
97 r
= radeon_bo_reserve(gtt_obj
[i
], false);
99 goto out_lclean_unref
;
100 r
= radeon_bo_pin(gtt_obj
[i
], RADEON_GEM_DOMAIN_GTT
, >t_addr
);
102 DRM_ERROR("Failed to pin GTT object %d\n", i
);
103 goto out_lclean_unres
;
106 r
= radeon_bo_kmap(gtt_obj
[i
], >t_map
);
108 DRM_ERROR("Failed to map GTT object %d\n", i
);
109 goto out_lclean_unpin
;
112 for (gtt_start
= gtt_map
, gtt_end
= gtt_map
+ size
;
115 *gtt_start
= gtt_start
;
117 radeon_bo_kunmap(gtt_obj
[i
]);
119 if (ring
== R600_RING_TYPE_DMA_INDEX
)
120 fence
= radeon_copy_dma(rdev
, gtt_addr
, vram_addr
,
121 size
/ RADEON_GPU_PAGE_SIZE
,
124 fence
= radeon_copy_blit(rdev
, gtt_addr
, vram_addr
,
125 size
/ RADEON_GPU_PAGE_SIZE
,
128 DRM_ERROR("Failed GTT->VRAM copy %d\n", i
);
130 goto out_lclean_unpin
;
133 r
= radeon_fence_wait(fence
, false);
135 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i
);
136 goto out_lclean_unpin
;
139 radeon_fence_unref(&fence
);
141 r
= radeon_bo_kmap(vram_obj
, &vram_map
);
143 DRM_ERROR("Failed to map VRAM object after copy %d\n", i
);
144 goto out_lclean_unpin
;
147 for (gtt_start
= gtt_map
, gtt_end
= gtt_map
+ size
,
148 vram_start
= vram_map
, vram_end
= vram_map
+ size
;
149 vram_start
< vram_end
;
150 gtt_start
++, vram_start
++) {
151 if (*vram_start
!= gtt_start
) {
152 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
153 "expected 0x%p (GTT/VRAM offset "
154 "0x%16llx/0x%16llx)\n",
155 i
, *vram_start
, gtt_start
,
157 (gtt_addr
- rdev
->mc
.gtt_start
+
158 (void*)gtt_start
- gtt_map
),
160 (vram_addr
- rdev
->mc
.vram_start
+
161 (void*)gtt_start
- gtt_map
));
162 radeon_bo_kunmap(vram_obj
);
163 goto out_lclean_unpin
;
165 *vram_start
= vram_start
;
168 radeon_bo_kunmap(vram_obj
);
170 if (ring
== R600_RING_TYPE_DMA_INDEX
)
171 fence
= radeon_copy_dma(rdev
, vram_addr
, gtt_addr
,
172 size
/ RADEON_GPU_PAGE_SIZE
,
175 fence
= radeon_copy_blit(rdev
, vram_addr
, gtt_addr
,
176 size
/ RADEON_GPU_PAGE_SIZE
,
179 DRM_ERROR("Failed VRAM->GTT copy %d\n", i
);
181 goto out_lclean_unpin
;
184 r
= radeon_fence_wait(fence
, false);
186 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i
);
187 goto out_lclean_unpin
;
190 radeon_fence_unref(&fence
);
192 r
= radeon_bo_kmap(gtt_obj
[i
], >t_map
);
194 DRM_ERROR("Failed to map GTT object after copy %d\n", i
);
195 goto out_lclean_unpin
;
198 for (gtt_start
= gtt_map
, gtt_end
= gtt_map
+ size
,
199 vram_start
= vram_map
, vram_end
= vram_map
+ size
;
201 gtt_start
++, vram_start
++) {
202 if (*gtt_start
!= vram_start
) {
203 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
204 "expected 0x%p (VRAM/GTT offset "
205 "0x%16llx/0x%16llx)\n",
206 i
, *gtt_start
, vram_start
,
208 (vram_addr
- rdev
->mc
.vram_start
+
209 (void*)vram_start
- vram_map
),
211 (gtt_addr
- rdev
->mc
.gtt_start
+
212 (void*)vram_start
- vram_map
));
213 radeon_bo_kunmap(gtt_obj
[i
]);
214 goto out_lclean_unpin
;
218 radeon_bo_kunmap(gtt_obj
[i
]);
220 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
221 gtt_addr
- rdev
->mc
.gtt_start
);
225 radeon_bo_unpin(gtt_obj
[i
]);
227 radeon_bo_unreserve(gtt_obj
[i
]);
229 radeon_bo_unref(>t_obj
[i
]);
231 for (--i
; i
>= 0; --i
) {
232 radeon_bo_unpin(gtt_obj
[i
]);
233 radeon_bo_unreserve(gtt_obj
[i
]);
234 radeon_bo_unref(>t_obj
[i
]);
236 if (fence
&& !IS_ERR(fence
))
237 radeon_fence_unref(&fence
);
241 radeon_bo_unpin(vram_obj
);
243 radeon_bo_unreserve(vram_obj
);
245 radeon_bo_unref(&vram_obj
);
249 pr_warn("Error while testing BO move\n");
253 void radeon_test_moves(struct radeon_device
*rdev
)
255 if (rdev
->asic
->copy
.dma
)
256 radeon_do_test_moves(rdev
, RADEON_TEST_COPY_DMA
);
257 if (rdev
->asic
->copy
.blit
)
258 radeon_do_test_moves(rdev
, RADEON_TEST_COPY_BLIT
);
261 static int radeon_test_create_and_emit_fence(struct radeon_device
*rdev
,
262 struct radeon_ring
*ring
,
263 struct radeon_fence
**fence
)
265 uint32_t handle
= ring
->idx
^ 0xdeafbeef;
268 if (ring
->idx
== R600_RING_TYPE_UVD_INDEX
) {
269 r
= radeon_uvd_get_create_msg(rdev
, ring
->idx
, handle
, NULL
);
271 DRM_ERROR("Failed to get dummy create msg\n");
275 r
= radeon_uvd_get_destroy_msg(rdev
, ring
->idx
, handle
, fence
);
277 DRM_ERROR("Failed to get dummy destroy msg\n");
281 } else if (ring
->idx
== TN_RING_TYPE_VCE1_INDEX
||
282 ring
->idx
== TN_RING_TYPE_VCE2_INDEX
) {
283 r
= radeon_vce_get_create_msg(rdev
, ring
->idx
, handle
, NULL
);
285 DRM_ERROR("Failed to get dummy create msg\n");
289 r
= radeon_vce_get_destroy_msg(rdev
, ring
->idx
, handle
, fence
);
291 DRM_ERROR("Failed to get dummy destroy msg\n");
296 r
= radeon_ring_lock(rdev
, ring
, 64);
298 DRM_ERROR("Failed to lock ring A %d\n", ring
->idx
);
301 r
= radeon_fence_emit(rdev
, fence
, ring
->idx
);
303 DRM_ERROR("Failed to emit fence\n");
304 radeon_ring_unlock_undo(rdev
, ring
);
307 radeon_ring_unlock_commit(rdev
, ring
, false);
312 void radeon_test_ring_sync(struct radeon_device
*rdev
,
313 struct radeon_ring
*ringA
,
314 struct radeon_ring
*ringB
)
316 struct radeon_fence
*fence1
= NULL
, *fence2
= NULL
;
317 struct radeon_semaphore
*semaphore
= NULL
;
320 r
= radeon_semaphore_create(rdev
, &semaphore
);
322 DRM_ERROR("Failed to create semaphore\n");
326 r
= radeon_ring_lock(rdev
, ringA
, 64);
328 DRM_ERROR("Failed to lock ring A %d\n", ringA
->idx
);
331 radeon_semaphore_emit_wait(rdev
, ringA
->idx
, semaphore
);
332 radeon_ring_unlock_commit(rdev
, ringA
, false);
334 r
= radeon_test_create_and_emit_fence(rdev
, ringA
, &fence1
);
338 r
= radeon_ring_lock(rdev
, ringA
, 64);
340 DRM_ERROR("Failed to lock ring A %d\n", ringA
->idx
);
343 radeon_semaphore_emit_wait(rdev
, ringA
->idx
, semaphore
);
344 radeon_ring_unlock_commit(rdev
, ringA
, false);
346 r
= radeon_test_create_and_emit_fence(rdev
, ringA
, &fence2
);
352 if (radeon_fence_signaled(fence1
)) {
353 DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
357 r
= radeon_ring_lock(rdev
, ringB
, 64);
359 DRM_ERROR("Failed to lock ring B %p\n", ringB
);
362 radeon_semaphore_emit_signal(rdev
, ringB
->idx
, semaphore
);
363 radeon_ring_unlock_commit(rdev
, ringB
, false);
365 r
= radeon_fence_wait(fence1
, false);
367 DRM_ERROR("Failed to wait for sync fence 1\n");
373 if (radeon_fence_signaled(fence2
)) {
374 DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
378 r
= radeon_ring_lock(rdev
, ringB
, 64);
380 DRM_ERROR("Failed to lock ring B %p\n", ringB
);
383 radeon_semaphore_emit_signal(rdev
, ringB
->idx
, semaphore
);
384 radeon_ring_unlock_commit(rdev
, ringB
, false);
386 r
= radeon_fence_wait(fence2
, false);
388 DRM_ERROR("Failed to wait for sync fence 1\n");
393 radeon_semaphore_free(rdev
, &semaphore
, NULL
);
396 radeon_fence_unref(&fence1
);
399 radeon_fence_unref(&fence2
);
402 pr_warn("Error while testing ring sync (%d)\n", r
);
405 static void radeon_test_ring_sync2(struct radeon_device
*rdev
,
406 struct radeon_ring
*ringA
,
407 struct radeon_ring
*ringB
,
408 struct radeon_ring
*ringC
)
410 struct radeon_fence
*fenceA
= NULL
, *fenceB
= NULL
;
411 struct radeon_semaphore
*semaphore
= NULL
;
415 r
= radeon_semaphore_create(rdev
, &semaphore
);
417 DRM_ERROR("Failed to create semaphore\n");
421 r
= radeon_ring_lock(rdev
, ringA
, 64);
423 DRM_ERROR("Failed to lock ring A %d\n", ringA
->idx
);
426 radeon_semaphore_emit_wait(rdev
, ringA
->idx
, semaphore
);
427 radeon_ring_unlock_commit(rdev
, ringA
, false);
429 r
= radeon_test_create_and_emit_fence(rdev
, ringA
, &fenceA
);
433 r
= radeon_ring_lock(rdev
, ringB
, 64);
435 DRM_ERROR("Failed to lock ring B %d\n", ringB
->idx
);
438 radeon_semaphore_emit_wait(rdev
, ringB
->idx
, semaphore
);
439 radeon_ring_unlock_commit(rdev
, ringB
, false);
440 r
= radeon_test_create_and_emit_fence(rdev
, ringB
, &fenceB
);
446 if (radeon_fence_signaled(fenceA
)) {
447 DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
450 if (radeon_fence_signaled(fenceB
)) {
451 DRM_ERROR("Fence B signaled without waiting for semaphore.\n");
455 r
= radeon_ring_lock(rdev
, ringC
, 64);
457 DRM_ERROR("Failed to lock ring B %p\n", ringC
);
460 radeon_semaphore_emit_signal(rdev
, ringC
->idx
, semaphore
);
461 radeon_ring_unlock_commit(rdev
, ringC
, false);
463 for (i
= 0; i
< 30; ++i
) {
465 sigA
= radeon_fence_signaled(fenceA
);
466 sigB
= radeon_fence_signaled(fenceB
);
471 if (!sigA
&& !sigB
) {
472 DRM_ERROR("Neither fence A nor B has been signaled\n");
474 } else if (sigA
&& sigB
) {
475 DRM_ERROR("Both fence A and B has been signaled\n");
479 DRM_INFO("Fence %c was first signaled\n", sigA
? 'A' : 'B');
481 r
= radeon_ring_lock(rdev
, ringC
, 64);
483 DRM_ERROR("Failed to lock ring B %p\n", ringC
);
486 radeon_semaphore_emit_signal(rdev
, ringC
->idx
, semaphore
);
487 radeon_ring_unlock_commit(rdev
, ringC
, false);
491 r
= radeon_fence_wait(fenceA
, false);
493 DRM_ERROR("Failed to wait for sync fence A\n");
496 r
= radeon_fence_wait(fenceB
, false);
498 DRM_ERROR("Failed to wait for sync fence B\n");
503 radeon_semaphore_free(rdev
, &semaphore
, NULL
);
506 radeon_fence_unref(&fenceA
);
509 radeon_fence_unref(&fenceB
);
512 pr_warn("Error while testing ring sync (%d)\n", r
);
515 static bool radeon_test_sync_possible(struct radeon_ring
*ringA
,
516 struct radeon_ring
*ringB
)
518 if (ringA
->idx
== TN_RING_TYPE_VCE2_INDEX
&&
519 ringB
->idx
== TN_RING_TYPE_VCE1_INDEX
)
525 void radeon_test_syncing(struct radeon_device
*rdev
)
529 for (i
= 1; i
< RADEON_NUM_RINGS
; ++i
) {
530 struct radeon_ring
*ringA
= &rdev
->ring
[i
];
534 for (j
= 0; j
< i
; ++j
) {
535 struct radeon_ring
*ringB
= &rdev
->ring
[j
];
539 if (!radeon_test_sync_possible(ringA
, ringB
))
542 DRM_INFO("Testing syncing between rings %d and %d...\n", i
, j
);
543 radeon_test_ring_sync(rdev
, ringA
, ringB
);
545 DRM_INFO("Testing syncing between rings %d and %d...\n", j
, i
);
546 radeon_test_ring_sync(rdev
, ringB
, ringA
);
548 for (k
= 0; k
< j
; ++k
) {
549 struct radeon_ring
*ringC
= &rdev
->ring
[k
];
553 if (!radeon_test_sync_possible(ringA
, ringC
))
556 if (!radeon_test_sync_possible(ringB
, ringC
))
559 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i
, j
, k
);
560 radeon_test_ring_sync2(rdev
, ringA
, ringB
, ringC
);
562 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i
, k
, j
);
563 radeon_test_ring_sync2(rdev
, ringA
, ringC
, ringB
);
565 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j
, i
, k
);
566 radeon_test_ring_sync2(rdev
, ringB
, ringA
, ringC
);
568 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j
, k
, i
);
569 radeon_test_ring_sync2(rdev
, ringB
, ringC
, ringA
);
571 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k
, i
, j
);
572 radeon_test_ring_sync2(rdev
, ringC
, ringA
, ringB
);
574 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k
, j
, i
);
575 radeon_test_ring_sync2(rdev
, ringC
, ringB
, ringA
);