2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
32 #include <drm/ttm/ttm_bo_api.h>
33 #include <drm/ttm/ttm_bo_driver.h>
34 #include <drm/ttm/ttm_placement.h>
35 #include <drm/ttm/ttm_module.h>
36 #include <drm/ttm/ttm_page_alloc.h>
38 #include <drm/radeon_drm.h>
39 #include <linux/seq_file.h>
40 #include <linux/slab.h>
41 #include <linux/swiotlb.h>
42 #include <linux/swap.h>
43 #include <linux/pagemap.h>
44 #include <linux/debugfs.h>
45 #include "radeon_reg.h"
48 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
50 static int radeon_ttm_debugfs_init(struct radeon_device
*rdev
);
51 static void radeon_ttm_debugfs_fini(struct radeon_device
*rdev
);
53 static struct radeon_device
*radeon_get_rdev(struct ttm_bo_device
*bdev
)
55 struct radeon_mman
*mman
;
56 struct radeon_device
*rdev
;
58 mman
= container_of(bdev
, struct radeon_mman
, bdev
);
59 rdev
= container_of(mman
, struct radeon_device
, mman
);
67 static int radeon_ttm_mem_global_init(struct drm_global_reference
*ref
)
69 return ttm_mem_global_init(ref
->object
);
72 static void radeon_ttm_mem_global_release(struct drm_global_reference
*ref
)
74 ttm_mem_global_release(ref
->object
);
77 static int radeon_ttm_global_init(struct radeon_device
*rdev
)
79 struct drm_global_reference
*global_ref
;
82 rdev
->mman
.mem_global_referenced
= false;
83 global_ref
= &rdev
->mman
.mem_global_ref
;
84 global_ref
->global_type
= DRM_GLOBAL_TTM_MEM
;
85 global_ref
->size
= sizeof(struct ttm_mem_global
);
86 global_ref
->init
= &radeon_ttm_mem_global_init
;
87 global_ref
->release
= &radeon_ttm_mem_global_release
;
88 r
= drm_global_item_ref(global_ref
);
90 DRM_ERROR("Failed setting up TTM memory accounting "
95 rdev
->mman
.bo_global_ref
.mem_glob
=
96 rdev
->mman
.mem_global_ref
.object
;
97 global_ref
= &rdev
->mman
.bo_global_ref
.ref
;
98 global_ref
->global_type
= DRM_GLOBAL_TTM_BO
;
99 global_ref
->size
= sizeof(struct ttm_bo_global
);
100 global_ref
->init
= &ttm_bo_global_init
;
101 global_ref
->release
= &ttm_bo_global_release
;
102 r
= drm_global_item_ref(global_ref
);
104 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
105 drm_global_item_unref(&rdev
->mman
.mem_global_ref
);
109 rdev
->mman
.mem_global_referenced
= true;
113 static void radeon_ttm_global_fini(struct radeon_device
*rdev
)
115 if (rdev
->mman
.mem_global_referenced
) {
116 drm_global_item_unref(&rdev
->mman
.bo_global_ref
.ref
);
117 drm_global_item_unref(&rdev
->mman
.mem_global_ref
);
118 rdev
->mman
.mem_global_referenced
= false;
122 static int radeon_invalidate_caches(struct ttm_bo_device
*bdev
, uint32_t flags
)
127 static int radeon_init_mem_type(struct ttm_bo_device
*bdev
, uint32_t type
,
128 struct ttm_mem_type_manager
*man
)
130 struct radeon_device
*rdev
;
132 rdev
= radeon_get_rdev(bdev
);
137 man
->flags
= TTM_MEMTYPE_FLAG_MAPPABLE
;
138 man
->available_caching
= TTM_PL_MASK_CACHING
;
139 man
->default_caching
= TTM_PL_FLAG_CACHED
;
142 man
->func
= &ttm_bo_manager_func
;
143 man
->gpu_offset
= rdev
->mc
.gtt_start
;
144 man
->available_caching
= TTM_PL_MASK_CACHING
;
145 man
->default_caching
= TTM_PL_FLAG_CACHED
;
146 man
->flags
= TTM_MEMTYPE_FLAG_MAPPABLE
| TTM_MEMTYPE_FLAG_CMA
;
147 #if IS_ENABLED(CONFIG_AGP)
148 if (rdev
->flags
& RADEON_IS_AGP
) {
149 if (!rdev
->ddev
->agp
) {
150 DRM_ERROR("AGP is not enabled for memory type %u\n",
154 if (!rdev
->ddev
->agp
->cant_use_aperture
)
155 man
->flags
= TTM_MEMTYPE_FLAG_MAPPABLE
;
156 man
->available_caching
= TTM_PL_FLAG_UNCACHED
|
158 man
->default_caching
= TTM_PL_FLAG_WC
;
163 /* "On-card" video ram */
164 man
->func
= &ttm_bo_manager_func
;
165 man
->gpu_offset
= rdev
->mc
.vram_start
;
166 man
->flags
= TTM_MEMTYPE_FLAG_FIXED
|
167 TTM_MEMTYPE_FLAG_MAPPABLE
;
168 man
->available_caching
= TTM_PL_FLAG_UNCACHED
| TTM_PL_FLAG_WC
;
169 man
->default_caching
= TTM_PL_FLAG_WC
;
172 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type
);
178 static void radeon_evict_flags(struct ttm_buffer_object
*bo
,
179 struct ttm_placement
*placement
)
181 static struct ttm_place placements
= {
184 .flags
= TTM_PL_MASK_CACHING
| TTM_PL_FLAG_SYSTEM
187 struct radeon_bo
*rbo
;
189 if (!radeon_ttm_bo_is_radeon_bo(bo
)) {
190 placement
->placement
= &placements
;
191 placement
->busy_placement
= &placements
;
192 placement
->num_placement
= 1;
193 placement
->num_busy_placement
= 1;
196 rbo
= container_of(bo
, struct radeon_bo
, tbo
);
197 switch (bo
->mem
.mem_type
) {
199 if (rbo
->rdev
->ring
[radeon_copy_ring_index(rbo
->rdev
)].ready
== false)
200 radeon_ttm_placement_from_domain(rbo
, RADEON_GEM_DOMAIN_CPU
);
201 else if (rbo
->rdev
->mc
.visible_vram_size
< rbo
->rdev
->mc
.real_vram_size
&&
202 bo
->mem
.start
< (rbo
->rdev
->mc
.visible_vram_size
>> PAGE_SHIFT
)) {
203 unsigned fpfn
= rbo
->rdev
->mc
.visible_vram_size
>> PAGE_SHIFT
;
206 /* Try evicting to the CPU inaccessible part of VRAM
207 * first, but only set GTT as busy placement, so this
208 * BO will be evicted to GTT rather than causing other
209 * BOs to be evicted from VRAM
211 radeon_ttm_placement_from_domain(rbo
, RADEON_GEM_DOMAIN_VRAM
|
212 RADEON_GEM_DOMAIN_GTT
);
213 rbo
->placement
.num_busy_placement
= 0;
214 for (i
= 0; i
< rbo
->placement
.num_placement
; i
++) {
215 if (rbo
->placements
[i
].flags
& TTM_PL_FLAG_VRAM
) {
216 if (rbo
->placements
[i
].fpfn
< fpfn
)
217 rbo
->placements
[i
].fpfn
= fpfn
;
219 rbo
->placement
.busy_placement
=
221 rbo
->placement
.num_busy_placement
= 1;
225 radeon_ttm_placement_from_domain(rbo
, RADEON_GEM_DOMAIN_GTT
);
229 radeon_ttm_placement_from_domain(rbo
, RADEON_GEM_DOMAIN_CPU
);
231 *placement
= rbo
->placement
;
234 static int radeon_verify_access(struct ttm_buffer_object
*bo
, struct file
*filp
)
236 struct radeon_bo
*rbo
= container_of(bo
, struct radeon_bo
, tbo
);
238 if (radeon_ttm_tt_has_userptr(bo
->ttm
))
240 return drm_vma_node_verify_access(&rbo
->gem_base
.vma_node
,
244 static void radeon_move_null(struct ttm_buffer_object
*bo
,
245 struct ttm_mem_reg
*new_mem
)
247 struct ttm_mem_reg
*old_mem
= &bo
->mem
;
249 BUG_ON(old_mem
->mm_node
!= NULL
);
251 new_mem
->mm_node
= NULL
;
254 static int radeon_move_blit(struct ttm_buffer_object
*bo
,
255 bool evict
, bool no_wait_gpu
,
256 struct ttm_mem_reg
*new_mem
,
257 struct ttm_mem_reg
*old_mem
)
259 struct radeon_device
*rdev
;
260 uint64_t old_start
, new_start
;
261 struct radeon_fence
*fence
;
265 rdev
= radeon_get_rdev(bo
->bdev
);
266 ridx
= radeon_copy_ring_index(rdev
);
267 old_start
= (u64
)old_mem
->start
<< PAGE_SHIFT
;
268 new_start
= (u64
)new_mem
->start
<< PAGE_SHIFT
;
270 switch (old_mem
->mem_type
) {
272 old_start
+= rdev
->mc
.vram_start
;
275 old_start
+= rdev
->mc
.gtt_start
;
278 DRM_ERROR("Unknown placement %d\n", old_mem
->mem_type
);
281 switch (new_mem
->mem_type
) {
283 new_start
+= rdev
->mc
.vram_start
;
286 new_start
+= rdev
->mc
.gtt_start
;
289 DRM_ERROR("Unknown placement %d\n", old_mem
->mem_type
);
292 if (!rdev
->ring
[ridx
].ready
) {
293 DRM_ERROR("Trying to move memory with ring turned off.\n");
297 BUILD_BUG_ON((PAGE_SIZE
% RADEON_GPU_PAGE_SIZE
) != 0);
299 num_pages
= new_mem
->num_pages
* (PAGE_SIZE
/ RADEON_GPU_PAGE_SIZE
);
300 fence
= radeon_copy(rdev
, old_start
, new_start
, num_pages
, bo
->resv
);
302 return PTR_ERR(fence
);
304 r
= ttm_bo_move_accel_cleanup(bo
, &fence
->base
, evict
, new_mem
);
305 radeon_fence_unref(&fence
);
309 static int radeon_move_vram_ram(struct ttm_buffer_object
*bo
,
310 bool evict
, bool interruptible
,
312 struct ttm_mem_reg
*new_mem
)
314 struct radeon_device
*rdev
;
315 struct ttm_mem_reg
*old_mem
= &bo
->mem
;
316 struct ttm_mem_reg tmp_mem
;
317 struct ttm_place placements
;
318 struct ttm_placement placement
;
321 rdev
= radeon_get_rdev(bo
->bdev
);
323 tmp_mem
.mm_node
= NULL
;
324 placement
.num_placement
= 1;
325 placement
.placement
= &placements
;
326 placement
.num_busy_placement
= 1;
327 placement
.busy_placement
= &placements
;
330 placements
.flags
= TTM_PL_MASK_CACHING
| TTM_PL_FLAG_TT
;
331 r
= ttm_bo_mem_space(bo
, &placement
, &tmp_mem
,
332 interruptible
, no_wait_gpu
);
337 r
= ttm_tt_set_placement_caching(bo
->ttm
, tmp_mem
.placement
);
342 r
= ttm_tt_bind(bo
->ttm
, &tmp_mem
);
346 r
= radeon_move_blit(bo
, true, no_wait_gpu
, &tmp_mem
, old_mem
);
350 r
= ttm_bo_move_ttm(bo
, interruptible
, no_wait_gpu
, new_mem
);
352 ttm_bo_mem_put(bo
, &tmp_mem
);
356 static int radeon_move_ram_vram(struct ttm_buffer_object
*bo
,
357 bool evict
, bool interruptible
,
359 struct ttm_mem_reg
*new_mem
)
361 struct radeon_device
*rdev
;
362 struct ttm_mem_reg
*old_mem
= &bo
->mem
;
363 struct ttm_mem_reg tmp_mem
;
364 struct ttm_placement placement
;
365 struct ttm_place placements
;
368 rdev
= radeon_get_rdev(bo
->bdev
);
370 tmp_mem
.mm_node
= NULL
;
371 placement
.num_placement
= 1;
372 placement
.placement
= &placements
;
373 placement
.num_busy_placement
= 1;
374 placement
.busy_placement
= &placements
;
377 placements
.flags
= TTM_PL_MASK_CACHING
| TTM_PL_FLAG_TT
;
378 r
= ttm_bo_mem_space(bo
, &placement
, &tmp_mem
,
379 interruptible
, no_wait_gpu
);
383 r
= ttm_bo_move_ttm(bo
, interruptible
, no_wait_gpu
, &tmp_mem
);
387 r
= radeon_move_blit(bo
, true, no_wait_gpu
, new_mem
, old_mem
);
392 ttm_bo_mem_put(bo
, &tmp_mem
);
396 static int radeon_bo_move(struct ttm_buffer_object
*bo
,
397 bool evict
, bool interruptible
,
399 struct ttm_mem_reg
*new_mem
)
401 struct radeon_device
*rdev
;
402 struct radeon_bo
*rbo
;
403 struct ttm_mem_reg
*old_mem
= &bo
->mem
;
406 r
= ttm_bo_wait(bo
, interruptible
, no_wait_gpu
);
410 /* Can't move a pinned BO */
411 rbo
= container_of(bo
, struct radeon_bo
, tbo
);
412 if (WARN_ON_ONCE(rbo
->pin_count
> 0))
415 rdev
= radeon_get_rdev(bo
->bdev
);
416 if (old_mem
->mem_type
== TTM_PL_SYSTEM
&& bo
->ttm
== NULL
) {
417 radeon_move_null(bo
, new_mem
);
420 if ((old_mem
->mem_type
== TTM_PL_TT
&&
421 new_mem
->mem_type
== TTM_PL_SYSTEM
) ||
422 (old_mem
->mem_type
== TTM_PL_SYSTEM
&&
423 new_mem
->mem_type
== TTM_PL_TT
)) {
425 radeon_move_null(bo
, new_mem
);
428 if (!rdev
->ring
[radeon_copy_ring_index(rdev
)].ready
||
429 rdev
->asic
->copy
.copy
== NULL
) {
434 if (old_mem
->mem_type
== TTM_PL_VRAM
&&
435 new_mem
->mem_type
== TTM_PL_SYSTEM
) {
436 r
= radeon_move_vram_ram(bo
, evict
, interruptible
,
437 no_wait_gpu
, new_mem
);
438 } else if (old_mem
->mem_type
== TTM_PL_SYSTEM
&&
439 new_mem
->mem_type
== TTM_PL_VRAM
) {
440 r
= radeon_move_ram_vram(bo
, evict
, interruptible
,
441 no_wait_gpu
, new_mem
);
443 r
= radeon_move_blit(bo
, evict
, no_wait_gpu
, new_mem
, old_mem
);
448 r
= ttm_bo_move_memcpy(bo
, interruptible
, no_wait_gpu
, new_mem
);
454 /* update statistics */
455 atomic64_add((u64
)bo
->num_pages
<< PAGE_SHIFT
, &rdev
->num_bytes_moved
);
459 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device
*bdev
, struct ttm_mem_reg
*mem
)
461 struct ttm_mem_type_manager
*man
= &bdev
->man
[mem
->mem_type
];
462 struct radeon_device
*rdev
= radeon_get_rdev(bdev
);
464 mem
->bus
.addr
= NULL
;
466 mem
->bus
.size
= mem
->num_pages
<< PAGE_SHIFT
;
468 mem
->bus
.is_iomem
= false;
469 if (!(man
->flags
& TTM_MEMTYPE_FLAG_MAPPABLE
))
471 switch (mem
->mem_type
) {
476 #if IS_ENABLED(CONFIG_AGP)
477 if (rdev
->flags
& RADEON_IS_AGP
) {
478 /* RADEON_IS_AGP is set only if AGP is active */
479 mem
->bus
.offset
= mem
->start
<< PAGE_SHIFT
;
480 mem
->bus
.base
= rdev
->mc
.agp_base
;
481 mem
->bus
.is_iomem
= !rdev
->ddev
->agp
->cant_use_aperture
;
486 mem
->bus
.offset
= mem
->start
<< PAGE_SHIFT
;
487 /* check if it's visible */
488 if ((mem
->bus
.offset
+ mem
->bus
.size
) > rdev
->mc
.visible_vram_size
)
490 mem
->bus
.base
= rdev
->mc
.aper_base
;
491 mem
->bus
.is_iomem
= true;
494 * Alpha: use bus.addr to hold the ioremap() return,
495 * so we can modify bus.base below.
497 if (mem
->placement
& TTM_PL_FLAG_WC
)
499 ioremap_wc(mem
->bus
.base
+ mem
->bus
.offset
,
503 ioremap_nocache(mem
->bus
.base
+ mem
->bus
.offset
,
509 * Alpha: Use just the bus offset plus
510 * the hose/domain memory base for bus.base.
511 * It then can be used to build PTEs for VRAM
512 * access, as done in ttm_bo_vm_fault().
514 mem
->bus
.base
= (mem
->bus
.base
& 0x0ffffffffUL
) +
515 rdev
->ddev
->hose
->dense_mem_base
;
524 static void radeon_ttm_io_mem_free(struct ttm_bo_device
*bdev
, struct ttm_mem_reg
*mem
)
529 * TTM backend functions.
531 struct radeon_ttm_tt
{
532 struct ttm_dma_tt ttm
;
533 struct radeon_device
*rdev
;
537 struct mm_struct
*usermm
;
541 /* prepare the sg table with the user pages */
542 static int radeon_ttm_tt_pin_userptr(struct ttm_tt
*ttm
)
544 struct radeon_device
*rdev
= radeon_get_rdev(ttm
->bdev
);
545 struct radeon_ttm_tt
*gtt
= (void *)ttm
;
546 unsigned pinned
= 0, nents
;
549 int write
= !(gtt
->userflags
& RADEON_GEM_USERPTR_READONLY
);
550 enum dma_data_direction direction
= write
?
551 DMA_BIDIRECTIONAL
: DMA_TO_DEVICE
;
553 if (current
->mm
!= gtt
->usermm
)
556 if (gtt
->userflags
& RADEON_GEM_USERPTR_ANONONLY
) {
557 /* check that we only pin down anonymous memory
558 to prevent problems with writeback */
559 unsigned long end
= gtt
->userptr
+ ttm
->num_pages
* PAGE_SIZE
;
560 struct vm_area_struct
*vma
;
561 vma
= find_vma(gtt
->usermm
, gtt
->userptr
);
562 if (!vma
|| vma
->vm_file
|| vma
->vm_end
< end
)
567 unsigned num_pages
= ttm
->num_pages
- pinned
;
568 uint64_t userptr
= gtt
->userptr
+ pinned
* PAGE_SIZE
;
569 struct page
**pages
= ttm
->pages
+ pinned
;
571 r
= get_user_pages(userptr
, num_pages
, write
? FOLL_WRITE
: 0,
578 } while (pinned
< ttm
->num_pages
);
580 r
= sg_alloc_table_from_pages(ttm
->sg
, ttm
->pages
, ttm
->num_pages
, 0,
581 ttm
->num_pages
<< PAGE_SHIFT
,
587 nents
= dma_map_sg(rdev
->dev
, ttm
->sg
->sgl
, ttm
->sg
->nents
, direction
);
588 if (nents
!= ttm
->sg
->nents
)
591 drm_prime_sg_to_page_addr_arrays(ttm
->sg
, ttm
->pages
,
592 gtt
->ttm
.dma_address
, ttm
->num_pages
);
600 release_pages(ttm
->pages
, pinned
, 0);
604 static void radeon_ttm_tt_unpin_userptr(struct ttm_tt
*ttm
)
606 struct radeon_device
*rdev
= radeon_get_rdev(ttm
->bdev
);
607 struct radeon_ttm_tt
*gtt
= (void *)ttm
;
608 struct sg_page_iter sg_iter
;
610 int write
= !(gtt
->userflags
& RADEON_GEM_USERPTR_READONLY
);
611 enum dma_data_direction direction
= write
?
612 DMA_BIDIRECTIONAL
: DMA_TO_DEVICE
;
614 /* double check that we don't free the table twice */
618 /* free the sg table and pages again */
619 dma_unmap_sg(rdev
->dev
, ttm
->sg
->sgl
, ttm
->sg
->nents
, direction
);
621 for_each_sg_page(ttm
->sg
->sgl
, &sg_iter
, ttm
->sg
->nents
, 0) {
622 struct page
*page
= sg_page_iter_page(&sg_iter
);
623 if (!(gtt
->userflags
& RADEON_GEM_USERPTR_READONLY
))
624 set_page_dirty(page
);
626 mark_page_accessed(page
);
630 sg_free_table(ttm
->sg
);
633 static int radeon_ttm_backend_bind(struct ttm_tt
*ttm
,
634 struct ttm_mem_reg
*bo_mem
)
636 struct radeon_ttm_tt
*gtt
= (void*)ttm
;
637 uint32_t flags
= RADEON_GART_PAGE_VALID
| RADEON_GART_PAGE_READ
|
638 RADEON_GART_PAGE_WRITE
;
642 radeon_ttm_tt_pin_userptr(ttm
);
643 flags
&= ~RADEON_GART_PAGE_WRITE
;
646 gtt
->offset
= (unsigned long)(bo_mem
->start
<< PAGE_SHIFT
);
647 if (!ttm
->num_pages
) {
648 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
649 ttm
->num_pages
, bo_mem
, ttm
);
651 if (ttm
->caching_state
== tt_cached
)
652 flags
|= RADEON_GART_PAGE_SNOOP
;
653 r
= radeon_gart_bind(gtt
->rdev
, gtt
->offset
, ttm
->num_pages
,
654 ttm
->pages
, gtt
->ttm
.dma_address
, flags
);
656 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
657 ttm
->num_pages
, (unsigned)gtt
->offset
);
663 static int radeon_ttm_backend_unbind(struct ttm_tt
*ttm
)
665 struct radeon_ttm_tt
*gtt
= (void *)ttm
;
667 radeon_gart_unbind(gtt
->rdev
, gtt
->offset
, ttm
->num_pages
);
670 radeon_ttm_tt_unpin_userptr(ttm
);
675 static void radeon_ttm_backend_destroy(struct ttm_tt
*ttm
)
677 struct radeon_ttm_tt
*gtt
= (void *)ttm
;
679 ttm_dma_tt_fini(>t
->ttm
);
683 static struct ttm_backend_func radeon_backend_func
= {
684 .bind
= &radeon_ttm_backend_bind
,
685 .unbind
= &radeon_ttm_backend_unbind
,
686 .destroy
= &radeon_ttm_backend_destroy
,
689 static struct ttm_tt
*radeon_ttm_tt_create(struct ttm_bo_device
*bdev
,
690 unsigned long size
, uint32_t page_flags
,
691 struct page
*dummy_read_page
)
693 struct radeon_device
*rdev
;
694 struct radeon_ttm_tt
*gtt
;
696 rdev
= radeon_get_rdev(bdev
);
697 #if IS_ENABLED(CONFIG_AGP)
698 if (rdev
->flags
& RADEON_IS_AGP
) {
699 return ttm_agp_tt_create(bdev
, rdev
->ddev
->agp
->bridge
,
700 size
, page_flags
, dummy_read_page
);
704 gtt
= kzalloc(sizeof(struct radeon_ttm_tt
), GFP_KERNEL
);
708 gtt
->ttm
.ttm
.func
= &radeon_backend_func
;
710 if (ttm_dma_tt_init(>t
->ttm
, bdev
, size
, page_flags
, dummy_read_page
)) {
714 return >t
->ttm
.ttm
;
717 static struct radeon_ttm_tt
*radeon_ttm_tt_to_gtt(struct ttm_tt
*ttm
)
719 if (!ttm
|| ttm
->func
!= &radeon_backend_func
)
721 return (struct radeon_ttm_tt
*)ttm
;
724 static int radeon_ttm_tt_populate(struct ttm_tt
*ttm
)
726 struct radeon_ttm_tt
*gtt
= radeon_ttm_tt_to_gtt(ttm
);
727 struct radeon_device
*rdev
;
730 bool slave
= !!(ttm
->page_flags
& TTM_PAGE_FLAG_SG
);
732 if (ttm
->state
!= tt_unpopulated
)
735 if (gtt
&& gtt
->userptr
) {
736 ttm
->sg
= kzalloc(sizeof(struct sg_table
), GFP_KERNEL
);
740 ttm
->page_flags
|= TTM_PAGE_FLAG_SG
;
741 ttm
->state
= tt_unbound
;
745 if (slave
&& ttm
->sg
) {
746 drm_prime_sg_to_page_addr_arrays(ttm
->sg
, ttm
->pages
,
747 gtt
->ttm
.dma_address
, ttm
->num_pages
);
748 ttm
->state
= tt_unbound
;
752 rdev
= radeon_get_rdev(ttm
->bdev
);
753 #if IS_ENABLED(CONFIG_AGP)
754 if (rdev
->flags
& RADEON_IS_AGP
) {
755 return ttm_agp_tt_populate(ttm
);
759 #ifdef CONFIG_SWIOTLB
760 if (swiotlb_nr_tbl()) {
761 return ttm_dma_populate(>t
->ttm
, rdev
->dev
);
765 r
= ttm_pool_populate(ttm
);
770 for (i
= 0; i
< ttm
->num_pages
; i
++) {
771 gtt
->ttm
.dma_address
[i
] = pci_map_page(rdev
->pdev
, ttm
->pages
[i
],
773 PCI_DMA_BIDIRECTIONAL
);
774 if (pci_dma_mapping_error(rdev
->pdev
, gtt
->ttm
.dma_address
[i
])) {
776 pci_unmap_page(rdev
->pdev
, gtt
->ttm
.dma_address
[i
],
777 PAGE_SIZE
, PCI_DMA_BIDIRECTIONAL
);
778 gtt
->ttm
.dma_address
[i
] = 0;
780 ttm_pool_unpopulate(ttm
);
787 static void radeon_ttm_tt_unpopulate(struct ttm_tt
*ttm
)
789 struct radeon_device
*rdev
;
790 struct radeon_ttm_tt
*gtt
= radeon_ttm_tt_to_gtt(ttm
);
792 bool slave
= !!(ttm
->page_flags
& TTM_PAGE_FLAG_SG
);
794 if (gtt
&& gtt
->userptr
) {
796 ttm
->page_flags
&= ~TTM_PAGE_FLAG_SG
;
803 rdev
= radeon_get_rdev(ttm
->bdev
);
804 #if IS_ENABLED(CONFIG_AGP)
805 if (rdev
->flags
& RADEON_IS_AGP
) {
806 ttm_agp_tt_unpopulate(ttm
);
811 #ifdef CONFIG_SWIOTLB
812 if (swiotlb_nr_tbl()) {
813 ttm_dma_unpopulate(>t
->ttm
, rdev
->dev
);
818 for (i
= 0; i
< ttm
->num_pages
; i
++) {
819 if (gtt
->ttm
.dma_address
[i
]) {
820 pci_unmap_page(rdev
->pdev
, gtt
->ttm
.dma_address
[i
],
821 PAGE_SIZE
, PCI_DMA_BIDIRECTIONAL
);
825 ttm_pool_unpopulate(ttm
);
828 int radeon_ttm_tt_set_userptr(struct ttm_tt
*ttm
, uint64_t addr
,
831 struct radeon_ttm_tt
*gtt
= radeon_ttm_tt_to_gtt(ttm
);
837 gtt
->usermm
= current
->mm
;
838 gtt
->userflags
= flags
;
842 bool radeon_ttm_tt_has_userptr(struct ttm_tt
*ttm
)
844 struct radeon_ttm_tt
*gtt
= radeon_ttm_tt_to_gtt(ttm
);
849 return !!gtt
->userptr
;
852 bool radeon_ttm_tt_is_readonly(struct ttm_tt
*ttm
)
854 struct radeon_ttm_tt
*gtt
= radeon_ttm_tt_to_gtt(ttm
);
859 return !!(gtt
->userflags
& RADEON_GEM_USERPTR_READONLY
);
862 static struct ttm_bo_driver radeon_bo_driver
= {
863 .ttm_tt_create
= &radeon_ttm_tt_create
,
864 .ttm_tt_populate
= &radeon_ttm_tt_populate
,
865 .ttm_tt_unpopulate
= &radeon_ttm_tt_unpopulate
,
866 .invalidate_caches
= &radeon_invalidate_caches
,
867 .init_mem_type
= &radeon_init_mem_type
,
868 .eviction_valuable
= ttm_bo_eviction_valuable
,
869 .evict_flags
= &radeon_evict_flags
,
870 .move
= &radeon_bo_move
,
871 .verify_access
= &radeon_verify_access
,
872 .move_notify
= &radeon_bo_move_notify
,
873 .fault_reserve_notify
= &radeon_bo_fault_reserve_notify
,
874 .io_mem_reserve
= &radeon_ttm_io_mem_reserve
,
875 .io_mem_free
= &radeon_ttm_io_mem_free
,
876 .io_mem_pfn
= ttm_bo_default_io_mem_pfn
,
879 int radeon_ttm_init(struct radeon_device
*rdev
)
883 r
= radeon_ttm_global_init(rdev
);
887 /* No others user of address space so set it to 0 */
888 r
= ttm_bo_device_init(&rdev
->mman
.bdev
,
889 rdev
->mman
.bo_global_ref
.ref
.object
,
891 rdev
->ddev
->anon_inode
->i_mapping
,
892 DRM_FILE_PAGE_OFFSET
,
895 DRM_ERROR("failed initializing buffer object driver(%d).\n", r
);
898 rdev
->mman
.initialized
= true;
899 r
= ttm_bo_init_mm(&rdev
->mman
.bdev
, TTM_PL_VRAM
,
900 rdev
->mc
.real_vram_size
>> PAGE_SHIFT
);
902 DRM_ERROR("Failed initializing VRAM heap.\n");
905 /* Change the size here instead of the init above so only lpfn is affected */
906 radeon_ttm_set_active_vram_size(rdev
, rdev
->mc
.visible_vram_size
);
908 r
= radeon_bo_create(rdev
, 256 * 1024, PAGE_SIZE
, true,
909 RADEON_GEM_DOMAIN_VRAM
, 0, NULL
,
910 NULL
, &rdev
->stollen_vga_memory
);
914 r
= radeon_bo_reserve(rdev
->stollen_vga_memory
, false);
917 r
= radeon_bo_pin(rdev
->stollen_vga_memory
, RADEON_GEM_DOMAIN_VRAM
, NULL
);
918 radeon_bo_unreserve(rdev
->stollen_vga_memory
);
920 radeon_bo_unref(&rdev
->stollen_vga_memory
);
923 DRM_INFO("radeon: %uM of VRAM memory ready\n",
924 (unsigned) (rdev
->mc
.real_vram_size
/ (1024 * 1024)));
925 r
= ttm_bo_init_mm(&rdev
->mman
.bdev
, TTM_PL_TT
,
926 rdev
->mc
.gtt_size
>> PAGE_SHIFT
);
928 DRM_ERROR("Failed initializing GTT heap.\n");
931 DRM_INFO("radeon: %uM of GTT memory ready.\n",
932 (unsigned)(rdev
->mc
.gtt_size
/ (1024 * 1024)));
934 r
= radeon_ttm_debugfs_init(rdev
);
936 DRM_ERROR("Failed to init debugfs\n");
942 void radeon_ttm_fini(struct radeon_device
*rdev
)
946 if (!rdev
->mman
.initialized
)
948 radeon_ttm_debugfs_fini(rdev
);
949 if (rdev
->stollen_vga_memory
) {
950 r
= radeon_bo_reserve(rdev
->stollen_vga_memory
, false);
952 radeon_bo_unpin(rdev
->stollen_vga_memory
);
953 radeon_bo_unreserve(rdev
->stollen_vga_memory
);
955 radeon_bo_unref(&rdev
->stollen_vga_memory
);
957 ttm_bo_clean_mm(&rdev
->mman
.bdev
, TTM_PL_VRAM
);
958 ttm_bo_clean_mm(&rdev
->mman
.bdev
, TTM_PL_TT
);
959 ttm_bo_device_release(&rdev
->mman
.bdev
);
960 radeon_gart_fini(rdev
);
961 radeon_ttm_global_fini(rdev
);
962 rdev
->mman
.initialized
= false;
963 DRM_INFO("radeon: ttm finalized\n");
966 /* this should only be called at bootup or when userspace
968 void radeon_ttm_set_active_vram_size(struct radeon_device
*rdev
, u64 size
)
970 struct ttm_mem_type_manager
*man
;
972 if (!rdev
->mman
.initialized
)
975 man
= &rdev
->mman
.bdev
.man
[TTM_PL_VRAM
];
976 /* this just adjusts TTM size idea, which sets lpfn to the correct value */
977 man
->size
= size
>> PAGE_SHIFT
;
980 static struct vm_operations_struct radeon_ttm_vm_ops
;
981 static const struct vm_operations_struct
*ttm_vm_ops
= NULL
;
983 static int radeon_ttm_fault(struct vm_fault
*vmf
)
985 struct ttm_buffer_object
*bo
;
986 struct radeon_device
*rdev
;
989 bo
= (struct ttm_buffer_object
*)vmf
->vma
->vm_private_data
;
991 return VM_FAULT_NOPAGE
;
993 rdev
= radeon_get_rdev(bo
->bdev
);
994 down_read(&rdev
->pm
.mclk_lock
);
995 r
= ttm_vm_ops
->fault(vmf
);
996 up_read(&rdev
->pm
.mclk_lock
);
1000 int radeon_mmap(struct file
*filp
, struct vm_area_struct
*vma
)
1002 struct drm_file
*file_priv
;
1003 struct radeon_device
*rdev
;
1006 if (unlikely(vma
->vm_pgoff
< DRM_FILE_PAGE_OFFSET
)) {
1010 file_priv
= filp
->private_data
;
1011 rdev
= file_priv
->minor
->dev
->dev_private
;
1015 r
= ttm_bo_mmap(filp
, vma
, &rdev
->mman
.bdev
);
1016 if (unlikely(r
!= 0)) {
1019 if (unlikely(ttm_vm_ops
== NULL
)) {
1020 ttm_vm_ops
= vma
->vm_ops
;
1021 radeon_ttm_vm_ops
= *ttm_vm_ops
;
1022 radeon_ttm_vm_ops
.fault
= &radeon_ttm_fault
;
1024 vma
->vm_ops
= &radeon_ttm_vm_ops
;
1028 #if defined(CONFIG_DEBUG_FS)
1030 static int radeon_mm_dump_table(struct seq_file
*m
, void *data
)
1032 struct drm_info_node
*node
= (struct drm_info_node
*)m
->private;
1033 unsigned ttm_pl
= *(int *)node
->info_ent
->data
;
1034 struct drm_device
*dev
= node
->minor
->dev
;
1035 struct radeon_device
*rdev
= dev
->dev_private
;
1036 struct drm_mm
*mm
= (struct drm_mm
*)rdev
->mman
.bdev
.man
[ttm_pl
].priv
;
1037 struct ttm_bo_global
*glob
= rdev
->mman
.bdev
.glob
;
1038 struct drm_printer p
= drm_seq_file_printer(m
);
1040 spin_lock(&glob
->lru_lock
);
1041 drm_mm_print(mm
, &p
);
1042 spin_unlock(&glob
->lru_lock
);
1046 static int ttm_pl_vram
= TTM_PL_VRAM
;
1047 static int ttm_pl_tt
= TTM_PL_TT
;
1049 static struct drm_info_list radeon_ttm_debugfs_list
[] = {
1050 {"radeon_vram_mm", radeon_mm_dump_table
, 0, &ttm_pl_vram
},
1051 {"radeon_gtt_mm", radeon_mm_dump_table
, 0, &ttm_pl_tt
},
1052 {"ttm_page_pool", ttm_page_alloc_debugfs
, 0, NULL
},
1053 #ifdef CONFIG_SWIOTLB
1054 {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs
, 0, NULL
}
1058 static int radeon_ttm_vram_open(struct inode
*inode
, struct file
*filep
)
1060 struct radeon_device
*rdev
= inode
->i_private
;
1061 i_size_write(inode
, rdev
->mc
.mc_vram_size
);
1062 filep
->private_data
= inode
->i_private
;
1066 static ssize_t
radeon_ttm_vram_read(struct file
*f
, char __user
*buf
,
1067 size_t size
, loff_t
*pos
)
1069 struct radeon_device
*rdev
= f
->private_data
;
1073 if (size
& 0x3 || *pos
& 0x3)
1077 unsigned long flags
;
1080 if (*pos
>= rdev
->mc
.mc_vram_size
)
1083 spin_lock_irqsave(&rdev
->mmio_idx_lock
, flags
);
1084 WREG32(RADEON_MM_INDEX
, ((uint32_t)*pos
) | 0x80000000);
1085 if (rdev
->family
>= CHIP_CEDAR
)
1086 WREG32(EVERGREEN_MM_INDEX_HI
, *pos
>> 31);
1087 value
= RREG32(RADEON_MM_DATA
);
1088 spin_unlock_irqrestore(&rdev
->mmio_idx_lock
, flags
);
1090 r
= put_user(value
, (uint32_t *)buf
);
1103 static const struct file_operations radeon_ttm_vram_fops
= {
1104 .owner
= THIS_MODULE
,
1105 .open
= radeon_ttm_vram_open
,
1106 .read
= radeon_ttm_vram_read
,
1107 .llseek
= default_llseek
1110 static int radeon_ttm_gtt_open(struct inode
*inode
, struct file
*filep
)
1112 struct radeon_device
*rdev
= inode
->i_private
;
1113 i_size_write(inode
, rdev
->mc
.gtt_size
);
1114 filep
->private_data
= inode
->i_private
;
1118 static ssize_t
radeon_ttm_gtt_read(struct file
*f
, char __user
*buf
,
1119 size_t size
, loff_t
*pos
)
1121 struct radeon_device
*rdev
= f
->private_data
;
1126 loff_t p
= *pos
/ PAGE_SIZE
;
1127 unsigned off
= *pos
& ~PAGE_MASK
;
1128 size_t cur_size
= min_t(size_t, size
, PAGE_SIZE
- off
);
1132 if (p
>= rdev
->gart
.num_cpu_pages
)
1135 page
= rdev
->gart
.pages
[p
];
1140 r
= copy_to_user(buf
, ptr
, cur_size
);
1141 kunmap(rdev
->gart
.pages
[p
]);
1143 r
= clear_user(buf
, cur_size
);
1157 static const struct file_operations radeon_ttm_gtt_fops
= {
1158 .owner
= THIS_MODULE
,
1159 .open
= radeon_ttm_gtt_open
,
1160 .read
= radeon_ttm_gtt_read
,
1161 .llseek
= default_llseek
1166 static int radeon_ttm_debugfs_init(struct radeon_device
*rdev
)
1168 #if defined(CONFIG_DEBUG_FS)
1171 struct drm_minor
*minor
= rdev
->ddev
->primary
;
1172 struct dentry
*ent
, *root
= minor
->debugfs_root
;
1174 ent
= debugfs_create_file("radeon_vram", S_IFREG
| S_IRUGO
, root
,
1175 rdev
, &radeon_ttm_vram_fops
);
1177 return PTR_ERR(ent
);
1178 rdev
->mman
.vram
= ent
;
1180 ent
= debugfs_create_file("radeon_gtt", S_IFREG
| S_IRUGO
, root
,
1181 rdev
, &radeon_ttm_gtt_fops
);
1183 return PTR_ERR(ent
);
1184 rdev
->mman
.gtt
= ent
;
1186 count
= ARRAY_SIZE(radeon_ttm_debugfs_list
);
1188 #ifdef CONFIG_SWIOTLB
1189 if (!swiotlb_nr_tbl())
1193 return radeon_debugfs_add_files(rdev
, radeon_ttm_debugfs_list
, count
);
1200 static void radeon_ttm_debugfs_fini(struct radeon_device
*rdev
)
1202 #if defined(CONFIG_DEBUG_FS)
1204 debugfs_remove(rdev
->mman
.vram
);
1205 rdev
->mman
.vram
= NULL
;
1207 debugfs_remove(rdev
->mman
.gtt
);
1208 rdev
->mman
.gtt
= NULL
;