2 * Copyright (C) STMicroelectronics SA 2017
4 * Authors: Philippe Cornu <philippe.cornu@st.com>
5 * Yannick Fertre <yannick.fertre@st.com>
6 * Fabien Dessenne <fabien.dessenne@st.com>
7 * Mickael Reulier <mickael.reulier@st.com>
9 * License terms: GNU General Public License (GPL), version 2
16 u32 hw_version
; /* hardware version */
17 u32 nb_layers
; /* number of supported layers */
18 u32 reg_ofs
; /* register offset for applicable regs */
19 u32 bus_width
; /* bus width (32 or 64 bits) */
20 const u32
*pix_fmt_hw
; /* supported pixel formats */
24 struct drm_fbdev_cma
*fbdev
;
26 struct clk
*pixel_clk
; /* lcd pixel clock */
27 struct drm_panel
*panel
;
28 struct mutex err_lock
; /* protecting error_status */
29 struct ltdc_caps caps
;
30 u32 clut
[256]; /* color look up table */
35 int ltdc_crtc_enable_vblank(struct drm_device
*dev
, unsigned int pipe
);
36 void ltdc_crtc_disable_vblank(struct drm_device
*dev
, unsigned int pipe
);
37 int ltdc_load(struct drm_device
*ddev
);
38 void ltdc_unload(struct drm_device
*ddev
);